--- /dev/null
+/** @file\r
+ *\r
+ * Static SMBIOS Table for the Qualcomm SDM845 Platform\r
+ * Derived from EmulatorPkg package\r
+ *\r
+ * Copyright (c) 2017-2018, Andrey Warkentin <andrey.warkentin@gmail.com>\r
+ * Copyright (c) 2013, Linaro.org\r
+ * Copyright (c) 2012, Apple Inc. All rights reserved.<BR>\r
+ * Copyright (c) Microsoft Corporation. All rights reserved.\r
+ * Copyright (c) 2020, ARM Limited. All rights reserved.\r
+ * Copyright (c) 2021, BigfootACA <bigfoot@classfun.cn>\r
+ *\r
+ * SPDX-License-Identifier: BSD-2-Clause-Patent\r
+ *\r
+ **/\r
+\r
+#include <Base.h>\r
+#include <IndustryStandard/SmBios.h>\r
+#include <Protocol/Smbios.h>\r
+#include <Guid/SmBios.h>\r
+#include <Library/ArmLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/UefiDriverEntryPoint.h>\r
+#include <Library/UefiLib.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/MemoryAllocationLib.h>\r
+#include <Library/TimeBaseLib.h>\r
+#include <Library/UefiBootServicesTableLib.h>\r
+#include <Library/UefiRuntimeServicesTableLib.h>\r
+#include <Library/PrintLib.h>\r
+\r
+/***********************************************************************\r
+ SMBIOS data definition TYPE0 BIOS Information\r
+************************************************************************/\r
+SMBIOS_TABLE_TYPE0 mBIOSInfoType0 = {\r
+ { EFI_SMBIOS_TYPE_BIOS_INFORMATION, sizeof (SMBIOS_TABLE_TYPE0), 0 },\r
+ 1, // Vendor String\r
+ 2, // BiosVersion String\r
+ 0xE800, // BiosSegment\r
+ 3, // BiosReleaseDate String\r
+ 0, // BiosSize (in 64KB)\r
+ { // BiosCharacteristics\r
+ 0, // Reserved :2; ///< Bits 0-1.\r
+ 0, // Unknown :1;\r
+ 0, // BiosCharacteristicsNotSupported :1;\r
+ 0, // IsaIsSupported :1;\r
+ 0, // McaIsSupported :1;\r
+ 0, // EisaIsSupported :1;\r
+ 1, // PciIsSupported :1; /// No PCIe support since we hide ECAM from the OS\r
+ 0, // PcmciaIsSupported :1;\r
+ 1, // PlugAndPlayIsSupported :1;\r
+ 0, // ApmIsSupported :1;\r
+ 1, // BiosIsUpgradable :1;\r
+ 0, // BiosShadowingAllowed :1;\r
+ 0, // VlVesaIsSupported :1;\r
+ 0, // EscdSupportIsAvailable :1;\r
+ 0, // BootFromCdIsSupported :1;\r
+ 1, // SelectableBootIsSupported :1;\r
+ 0, // RomBiosIsSocketed :1;\r
+ 0, // BootFromPcmciaIsSupported :1;\r
+ 0, // EDDSpecificationIsSupported :1;\r
+ 0, // JapaneseNecFloppyIsSupported :1;\r
+ 0, // JapaneseToshibaFloppyIsSupported :1;\r
+ 0, // Floppy525_360IsSupported :1;\r
+ 0, // Floppy525_12IsSupported :1;\r
+ 0, // Floppy35_720IsSupported :1;\r
+ 0, // Floppy35_288IsSupported :1;\r
+ 0, // PrintScreenIsSupported :1;\r
+ 0, // Keyboard8042IsSupported :1;\r
+ 1, // SerialIsSupported :1;\r
+ 0, // PrinterIsSupported :1;\r
+ 0, // CgaMonoIsSupported :1;\r
+ 0, // NecPc98 :1;\r
+ 0 // ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor\r
+ ///< and bits 48-63 reserved for System Vendor.\r
+ },\r
+ { // BIOSCharacteristicsExtensionBytes[]\r
+ 0x03, // AcpiIsSupported :1;\r
+ // UsbLegacyIsSupported :1;\r
+ // AgpIsSupported :1;\r
+ // I2OBootIsSupported :1;\r
+ // Ls120BootIsSupported :1;\r
+ // AtapiZipDriveBootIsSupported :1;\r
+ // Boot1394IsSupported :1;\r
+ // SmartBatteryIsSupported :1;\r
+ // BIOSCharacteristicsExtensionBytes[1]\r
+ 0x0C, // BiosBootSpecIsSupported :1;\r
+ // FunctionKeyNetworkBootIsSupported :1;\r
+ // TargetContentDistributionEnabled :1;\r
+ // UefiSpecificationSupported :1;\r
+ // VirtualMachineSupported :1;\r
+ // ExtensionByte2Reserved :3;\r
+ },\r
+ 0, // SystemBiosMajorRelease\r
+ 0, // SystemBiosMinorRelease\r
+ 0xFF, // EmbeddedControllerFirmwareMajorRelease\r
+ 0xFF, // EmbeddedControllerFirmwareMinorRelease\r
+};\r
+\r
+CHAR8 mBiosVendor[128] = "Renegade-Project";\r
+CHAR8 mBiosVersion[128] = "edk2-sdm845";\r
+CHAR8 mBiosDate[12] = __DATE__;\r
+\r
+CHAR8 *mBIOSInfoType0Strings[] = {\r
+ mBiosVendor, // Vendor\r
+ mBiosVersion, // Version\r
+ mBiosDate, // Release Date\r
+ NULL\r
+};\r
+\r
+/***********************************************************************\r
+ SMBIOS data definition TYPE1 System Information\r
+************************************************************************/\r
+SMBIOS_TABLE_TYPE1 mSysInfoType1 = {\r
+ { EFI_SMBIOS_TYPE_SYSTEM_INFORMATION, sizeof (SMBIOS_TABLE_TYPE1), 0 },\r
+ 1, // Manufacturer String\r
+ 2, // ProductName String\r
+ 3, // Version String\r
+ 4, // SerialNumber String\r
+ { 0x8A95D198, 0x7F46, 0x11E5, { 0xBF, 0x8B, 0x08, 0x00, 0x27, 0x04, 0xD4, 0x8E }},\r
+ SystemWakeupTypePowerSwitch,\r
+ 5, // SKUNumber String\r
+ 6, // Family String\r
+};\r
+\r
+CHAR8 mSysInfoManufName[128];\r
+CHAR8 mSysInfoProductName[128];\r
+CHAR8 mSysInfoVersionName[128];\r
+CHAR8 mSysInfoSerial[sizeof (UINT64) * 2 + 1] = "Serial Not Set";\r
+CHAR8 mSysInfoSKU[sizeof (UINT64) * 2 + 1] = "SKU Not Set";\r
+\r
+CHAR8 *mSysInfoType1Strings[] = {\r
+ mSysInfoManufName,\r
+ mSysInfoProductName,\r
+ mSysInfoVersionName,\r
+ mSysInfoSerial,\r
+ mSysInfoSKU,\r
+ "Snapdragon 845 Device",\r
+ NULL\r
+};\r
+\r
+/***********************************************************************\r
+ SMBIOS data definition TYPE2 Board Information\r
+************************************************************************/\r
+SMBIOS_TABLE_TYPE2 mBoardInfoType2 = {\r
+ { EFI_SMBIOS_TYPE_BASEBOARD_INFORMATION, sizeof (SMBIOS_TABLE_TYPE2), 0 },\r
+ 1, // Manufacturer String\r
+ 2, // ProductName String\r
+ 3, // Version String\r
+ 4, // SerialNumber String\r
+ 5, // AssetTag String\r
+ { // FeatureFlag\r
+ 1, // Motherboard :1;\r
+ 0, // RequiresDaughterCard :1;\r
+ 0, // Removable :1;\r
+ 0, // Replaceable :1;\r
+ 0, // HotSwappable :1;\r
+ 0, // Reserved :3;\r
+ },\r
+ 6, // LocationInChassis String\r
+ 0, // ChassisHandle;\r
+ BaseBoardTypeMotherBoard, // BoardType;\r
+ 0, // NumberOfContainedObjectHandles;\r
+ { 0 } // ContainedObjectHandles[1];\r
+};\r
+\r
+CHAR8 mChassisAssetTag[128];\r
+\r
+CHAR8 *mBoardInfoType2Strings[] = {\r
+ mSysInfoManufName,\r
+ mSysInfoProductName,\r
+ mSysInfoVersionName,\r
+ mSysInfoSerial,\r
+ mChassisAssetTag,\r
+ "Portable",\r
+ NULL\r
+};\r
+\r
+/***********************************************************************\r
+ SMBIOS data definition TYPE3 Enclosure Information\r
+************************************************************************/\r
+SMBIOS_TABLE_TYPE3 mEnclosureInfoType3 = {\r
+ { EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE, sizeof (SMBIOS_TABLE_TYPE3), 0 },\r
+ 1, // Manufacturer String\r
+ MiscChassisTypePortable, // Type;\r
+ 2, // Version String\r
+ 3, // SerialNumber String\r
+ 4, // AssetTag String\r
+ ChassisStateSafe, // BootupState;\r
+ ChassisStateSafe, // PowerSupplyState;\r
+ ChassisStateSafe, // ThermalState;\r
+ ChassisSecurityStatusNone, // SecurityStatus;\r
+ { 0, 0, 0, 0 }, // OemDefined[4];\r
+ 1, // Height;\r
+ 1, // NumberofPowerCords;\r
+ 0, // ContainedElementCount;\r
+ 0, // ContainedElementRecordLength;\r
+ { { 0 } }, // ContainedElements[1];\r
+};\r
+CHAR8 *mEnclosureInfoType3Strings[] = {\r
+ mSysInfoManufName,\r
+ mSysInfoProductName,\r
+ mSysInfoSerial,\r
+ mChassisAssetTag,\r
+ NULL\r
+};\r
+\r
+/***********************************************************************\r
+ SMBIOS data definition TYPE4 Processor Information\r
+************************************************************************/\r
+SMBIOS_TABLE_TYPE4 mProcessorInfoType4_a75 = {\r
+ { EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, sizeof (SMBIOS_TABLE_TYPE4), 0},\r
+ 1, // Socket String\r
+ CentralProcessor, // ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.\r
+ ProcessorFamilyIndicatorFamily2, // ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY2_DATA.\r
+ 2, // ProcessorManufacture String;\r
+ { // ProcessorId;\r
+ { 0x00, 0x00, 0x00, 0x00 },\r
+ { 0x00, 0x00, 0x00, 0x00 }\r
+ },\r
+ 3, // ProcessorVersion String;\r
+ { // Voltage;\r
+ 0, // ProcessorVoltageCapability5V :1;\r
+ 0, // ProcessorVoltageCapability3_3V :1;\r
+ 0, // ProcessorVoltageCapability2_9V :1;\r
+ 0, // ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.\r
+ 0, // ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.\r
+ 1 // ProcessorVoltageIndicateLegacy :1;\r
+ },\r
+ 0, // ExternalClock;\r
+ 2803, // MaxSpeed;\r
+ 2803, // CurrentSpeed;\r
+ 0x41, // Status;\r
+ ProcessorUpgradeOther, // ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.\r
+ 0, // L1CacheHandle;\r
+ 0, // L2CacheHandle;\r
+ 0xFFFF, // L3CacheHandle;\r
+ 0, // SerialNumber;\r
+ 0, // AssetTag;\r
+ 7, // PartNumber;\r
+ 4, // CoreCount;\r
+ 4, // EnabledCoreCount;\r
+ 0, // ThreadCount;\r
+ 0xEC, // ProcessorCharacteristics; ///< The enumeration value from PROCESSOR_CHARACTERISTIC_FLAGS\r
+ // ProcessorReserved1 :1;\r
+ // ProcessorUnknown :1;\r
+ // Processor64BitCapble :1;\r
+ // ProcessorMultiCore :1;\r
+ // ProcessorHardwareThread :1;\r
+ // ProcessorExecuteProtection :1;\r
+ // ProcessorEnhancedVirtualization :1;\r
+ // ProcessorPowerPerformanceCtrl :1;\r
+ // Processor128bitCapble :1;\r
+ // ProcessorReserved2 :7;\r
+ ProcessorFamilyARM, // ARM Processor Family;\r
+ 0, // CoreCount2;\r
+ 0, // EnabledCoreCount2;\r
+ 0, // ThreadCount2;\r
+};\r
+\r
+SMBIOS_TABLE_TYPE4 mProcessorInfoType4_a55 = {\r
+ { EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, sizeof (SMBIOS_TABLE_TYPE4), 0},\r
+ 1, // Socket String\r
+ CentralProcessor, // ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.\r
+ ProcessorFamilyIndicatorFamily2, // ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY2_DATA.\r
+ 2, // ProcessorManufacture String;\r
+ { // ProcessorId;\r
+ { 0x00, 0x00, 0x00, 0x00 },\r
+ { 0x00, 0x00, 0x00, 0x00 }\r
+ },\r
+ 3, // ProcessorVersion String;\r
+ { // Voltage;\r
+ 0, // ProcessorVoltageCapability5V :1;\r
+ 0, // ProcessorVoltageCapability3_3V :1;\r
+ 0, // ProcessorVoltageCapability2_9V :1;\r
+ 0, // ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.\r
+ 0, // ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.\r
+ 1 // ProcessorVoltageIndicateLegacy :1;\r
+ },\r
+ 0, // ExternalClock;\r
+ 1766, // MaxSpeed;\r
+ 1766, // CurrentSpeed;\r
+ 0x41, // Status;\r
+ ProcessorUpgradeOther, // ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.\r
+ 0, // L1CacheHandle;\r
+ 0, // L2CacheHandle;\r
+ 0xFFFF, // L3CacheHandle;\r
+ 0, // SerialNumber;\r
+ 0, // AssetTag;\r
+ 6, // PartNumber;\r
+ 4, // CoreCount;\r
+ 4, // EnabledCoreCount;\r
+ 0, // ThreadCount;\r
+ 0xEC, // ProcessorCharacteristics; ///< The enumeration value from PROCESSOR_CHARACTERISTIC_FLAGS\r
+ // ProcessorReserved1 :1;\r
+ // ProcessorUnknown :1;\r
+ // Processor64BitCapble :1;\r
+ // ProcessorMultiCore :1;\r
+ // ProcessorHardwareThread :1;\r
+ // ProcessorExecuteProtection :1;\r
+ // ProcessorEnhancedVirtualization :1;\r
+ // ProcessorPowerPerformanceCtrl :1;\r
+ // Processor128bitCapble :1;\r
+ // ProcessorReserved2 :7;\r
+ ProcessorFamilyARM, // ARM Processor Family;\r
+ 0, // CoreCount2;\r
+ 0, // EnabledCoreCount2;\r
+ 0, // ThreadCount2;\r
+};\r
+\r
+CHAR8 mCpuName[128] = "Qualcomm Snapdragon 845";\r
+\r
+CHAR8 *mProcessorInfoType4Strings[] = {\r
+ "BGA-1156",\r
+ "Qualcomm",\r
+ "Snapdragon 845",\r
+ NULL\r
+};\r
+\r
+/***********************************************************************\r
+ SMBIOS data definition TYPE7 Cache Information\r
+************************************************************************/\r
+SMBIOS_TABLE_TYPE7 mCacheInfoType7_a75_L1I = {\r
+ { EFI_SMBIOS_TYPE_CACHE_INFORMATION, sizeof (SMBIOS_TABLE_TYPE7), 0 },\r
+ 1, // SocketDesignation String\r
+ 0x380, // Cache Configuration\r
+ //Cache Level :3 (L1)\r
+ //Cache Socketed :1 (Not Socketed)\r
+ //Reserved :1\r
+ //Location :2 (Internal)\r
+ //Enabled/Disabled :1 (Enabled)\r
+ //Operational Mode :2 (Unknown)\r
+ //Reserved :6\r
+ 0x0030, // Maximum Size\r
+ 0x0030, // Install Size\r
+ { // Supported SRAM Type\r
+ 0, //Other :1\r
+ 1, //Unknown :1\r
+ 0, //NonBurst :1\r
+ 0, //Burst :1\r
+ 0, //PiplelineBurst :1\r
+ 0, //Synchronous :1\r
+ 0, //Asynchronous :1\r
+ 0 //Reserved :9\r
+ },\r
+ { // Current SRAM Type\r
+ 0, //Other :1\r
+ 1, //Unknown :1\r
+ 0, //NonBurst :1\r
+ 0, //Burst :1\r
+ 0, //PiplelineBurst :1\r
+ 0, //Synchronous :1\r
+ 0, //Asynchronous :1\r
+ 0 //Reserved :9\r
+ },\r
+ 0, // Cache Speed unknown\r
+ CacheErrorParity, // Error Correction\r
+ CacheTypeInstruction, // System Cache Type\r
+ CacheAssociativityOther // Associativity\r
+};\r
+\r
+SMBIOS_TABLE_TYPE7 mCacheInfoType7_a55_L1I = {\r
+ { EFI_SMBIOS_TYPE_CACHE_INFORMATION, sizeof (SMBIOS_TABLE_TYPE7), 0 },\r
+ 1, // SocketDesignation String\r
+ 0x380, // Cache Configuration\r
+ //Cache Level :3 (L1)\r
+ //Cache Socketed :1 (Not Socketed)\r
+ //Reserved :1\r
+ //Location :2 (Internal)\r
+ //Enabled/Disabled :1 (Enabled)\r
+ //Operational Mode :2 (Unknown)\r
+ //Reserved :6\r
+ 0x0030, // Maximum Size\r
+ 0x0030, // Install Size\r
+ { // Supported SRAM Type\r
+ 0, //Other :1\r
+ 1, //Unknown :1\r
+ 0, //NonBurst :1\r
+ 0, //Burst :1\r
+ 0, //PiplelineBurst :1\r
+ 0, //Synchronous :1\r
+ 0, //Asynchronous :1\r
+ 0 //Reserved :9\r
+ },\r
+ { // Current SRAM Type\r
+ 0, //Other :1\r
+ 1, //Unknown :1\r
+ 0, //NonBurst :1\r
+ 0, //Burst :1\r
+ 0, //PiplelineBurst :1\r
+ 0, //Synchronous :1\r
+ 0, //Asynchronous :1\r
+ 0 //Reserved :9\r
+ },\r
+ 0, // Cache Speed unknown\r
+ CacheErrorParity, // Error Correction\r
+ CacheTypeInstruction, // System Cache Type\r
+ CacheAssociativity2Way // Associativity\r
+};\r
+CHAR8 *mCacheInfoType7Strings[] = {\r
+ "L1 Instruction",\r
+ "L1 Data",\r
+ "L2",\r
+ NULL\r
+};\r
+\r
+SMBIOS_TABLE_TYPE7 mCacheInfoType7_a75_L1D = {\r
+ { EFI_SMBIOS_TYPE_CACHE_INFORMATION, sizeof (SMBIOS_TABLE_TYPE7), 0 },\r
+ 2, // SocketDesignation String\r
+ 0x180, // Cache Configuration\r
+ //Cache Level :3 (L1)\r
+ //Cache Socketed :1 (Not Socketed)\r
+ //Reserved :1\r
+ //Location :2 (Internal)\r
+ //Enabled/Disabled :1 (Enabled)\r
+ //Operational Mode :2 (WB)\r
+ //Reserved :6\r
+ 0x0020, // Maximum Size\r
+ 0x0020, // Install Size\r
+ { // Supported SRAM Type\r
+ 0, //Other :1\r
+ 1, //Unknown :1\r
+ 0, //NonBurst :1\r
+ 0, //Burst :1\r
+ 0, //PiplelineBurst :1\r
+ 0, //Synchronous :1\r
+ 0, //Asynchronous :1\r
+ 0 //Reserved :9\r
+ },\r
+ { // Current SRAM Type\r
+ 0, //Other :1\r
+ 1, //Unknown :1\r
+ 0, //NonBurst :1\r
+ 0, //Burst :1\r
+ 0, //PiplelineBurst :1\r
+ 0, //Synchronous :1\r
+ 0, //Asynchronous :1\r
+ 0 //Reserved :9\r
+ },\r
+ 0, // Cache Speed unknown\r
+ CacheErrorSingleBit, // Error Correction\r
+ CacheTypeData, // System Cache Type\r
+ CacheAssociativity2Way // Associativity\r
+};\r
+\r
+SMBIOS_TABLE_TYPE7 mCacheInfoType7_a55_L1D = {\r
+ { EFI_SMBIOS_TYPE_CACHE_INFORMATION, sizeof (SMBIOS_TABLE_TYPE7), 0 },\r
+ 2, // SocketDesignation String\r
+ 0x180, // Cache Configuration\r
+ //Cache Level :3 (L1)\r
+ //Cache Socketed :1 (Not Socketed)\r
+ //Reserved :1\r
+ //Location :2 (Internal)\r
+ //Enabled/Disabled :1 (Enabled)\r
+ //Operational Mode :2 (WB)\r
+ //Reserved :6\r
+ 0x0020, // Maximum Size\r
+ 0x0020, // Install Size\r
+ { // Supported SRAM Type\r
+ 0, //Other :1\r
+ 1, //Unknown :1\r
+ 0, //NonBurst :1\r
+ 0, //Burst :1\r
+ 0, //PiplelineBurst :1\r
+ 0, //Synchronous :1\r
+ 0, //Asynchronous :1\r
+ 0 //Reserved :9\r
+ },\r
+ { // Current SRAM Type\r
+ 0, //Other :1\r
+ 1, //Unknown :1\r
+ 0, //NonBurst :1\r
+ 0, //Burst :1\r
+ 0, //PiplelineBurst :1\r
+ 0, //Synchronous :1\r
+ 0, //Asynchronous :1\r
+ 0 //Reserved :9\r
+ },\r
+ 0, // Cache Speed unknown\r
+ CacheErrorSingleBit, // Error Correction\r
+ CacheTypeData, // System Cache Type\r
+ CacheAssociativity4Way // Associativity\r
+};\r
+\r
+SMBIOS_TABLE_TYPE7 mCacheInfoType7_a75_L2 = {\r
+ { EFI_SMBIOS_TYPE_CACHE_INFORMATION, sizeof (SMBIOS_TABLE_TYPE7), 0 },\r
+ 3, // SocketDesignation String\r
+ 0x0181, // Cache Configuration\r
+ //Cache Level :3 (L2)\r
+ //Cache Socketed :1 (Not Socketed)\r
+ //Reserved :1\r
+ //Location :2 (Internal)\r
+ //Enabled/Disabled :1 (Enabled)\r
+ //Operational Mode :2 (WB)\r
+ //Reserved :6\r
+ 0x0800, // Maximum Size\r
+ 0x0800, // Install Size\r
+ { // Supported SRAM Type\r
+ 0, //Other :1\r
+ 0, //Unknown :1\r
+ 1, //NonBurst :1\r
+ 0, //Burst :1\r
+ 0, //PiplelineBurst :1\r
+ 0, //Synchronous :1\r
+ 0, //Asynchronous :1\r
+ 0 //Reserved :9\r
+ },\r
+ { // Current SRAM Type\r
+ 0, //Other :1\r
+ 0, //Unknown :1\r
+ 1, //NonBurst :1\r
+ 0, //Burst :1\r
+ 0, //PiplelineBurst :1\r
+ 0, //Synchronous :1\r
+ 0, //Asynchronous :1\r
+ 0 //Reserved :9\r
+ },\r
+ 0, // Cache Speed unknown\r
+ CacheErrorSingleBit, // Error Correction Multi\r
+ CacheTypeUnified, // System Cache Type\r
+ CacheAssociativity16Way // Associativity\r
+};\r
+\r
+SMBIOS_TABLE_TYPE7 mCacheInfoType7_a55_L2 = {\r
+ { EFI_SMBIOS_TYPE_CACHE_INFORMATION, sizeof (SMBIOS_TABLE_TYPE7), 0 },\r
+ 3, // SocketDesignation String\r
+ 0x0181, // Cache Configuration\r
+ //Cache Level :3 (L2)\r
+ //Cache Socketed :1 (Not Socketed)\r
+ //Reserved :1\r
+ //Location :2 (Internal)\r
+ //Enabled/Disabled :1 (Enabled)\r
+ //Operational Mode :2 (WB)\r
+ //Reserved :6\r
+ 0x0800, // Maximum Size\r
+ 0x0800, // Install Size\r
+ { // Supported SRAM Type\r
+ 0, //Other :1\r
+ 1, //Unknown :1\r
+ 0, //NonBurst :1\r
+ 0, //Burst :1\r
+ 0, //PiplelineBurst :1\r
+ 0, //Synchronous :1\r
+ 0, //Asynchronous :1\r
+ 0 //Reserved :9\r
+ },\r
+ { // Current SRAM Type\r
+ 0, //Other :1\r
+ 0, //Unknown :1\r
+ 1, //NonBurst :1\r
+ 0, //Burst :1\r
+ 0, //PiplelineBurst :1\r
+ 0, //Synchronous :1\r
+ 0, //Asynchronous :1\r
+ 0 //Reserved :9\r
+ },\r
+ 0, // Cache Speed unknown\r
+ CacheErrorSingleBit, // Error Correction Multi\r
+ CacheTypeUnified, // System Cache Type\r
+ CacheAssociativity16Way // Associativity\r
+};\r
+\r
+/***********************************************************************\r
+ SMBIOS data definition TYPE9 System Slot Information\r
+************************************************************************/\r
+SMBIOS_TABLE_TYPE9 mSysSlotInfoType9_0 = {\r
+ { EFI_SMBIOS_TYPE_SYSTEM_SLOTS, sizeof (SMBIOS_TABLE_TYPE9), 0 },\r
+ 1, // SlotDesignation String\r
+ SlotTypePciExpressGen2X4, // SlotType; ///< The enumeration value from MISC_SLOT_TYPE.\r
+ SlotDataBusWidth1X, // SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.\r
+ SlotUsageUnknown, // CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.\r
+ SlotLengthShort, // SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.\r
+ 0, // SlotID;\r
+ { // SlotCharacteristics1;\r
+ 1, // CharacteristicsUnknown :1;\r
+ 0, // Provides50Volts :1;\r
+ 0, // Provides33Volts :1;\r
+ 0, // SharedSlot :1;\r
+ 0, // PcCard16Supported :1;\r
+ 0, // CardBusSupported :1;\r
+ 0, // ZoomVideoSupported :1;\r
+ 0, // ModemRingResumeSupported:1;\r
+ },\r
+ { // SlotCharacteristics2;\r
+ 1, // PmeSignalSupported :1;\r
+ 0, // HotPlugDevicesSupported :1;\r
+ 1, // SmbusSignalSupported :1;\r
+ 0, // Reserved :5; ///< Set to 0.\r
+ },\r
+ 0, // SegmentGroupNum;\r
+ 2, // BusNum;\r
+ 1, // DevFuncNum;\r
+};\r
+\r
+SMBIOS_TABLE_TYPE9 mSysSlotInfoType9_1 = {\r
+ { EFI_SMBIOS_TYPE_SYSTEM_SLOTS, sizeof (SMBIOS_TABLE_TYPE9), 0 },\r
+ 2, // SlotDesignation String\r
+ SlotTypePciExpressGen2X4, // SlotType; ///< The enumeration value from MISC_SLOT_TYPE.\r
+ SlotDataBusWidth1X, // SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.\r
+ SlotUsageUnknown, // CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.\r
+ SlotLengthShort, // SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.\r
+ 0, // SlotID;\r
+ { // SlotCharacteristics1;\r
+ 1, // CharacteristicsUnknown :1;\r
+ 0, // Provides50Volts :1;\r
+ 0, // Provides33Volts :1;\r
+ 0, // SharedSlot :1;\r
+ 0, // PcCard16Supported :1;\r
+ 0, // CardBusSupported :1;\r
+ 0, // ZoomVideoSupported :1;\r
+ 0, // ModemRingResumeSupported:1;\r
+ },\r
+ { // SlotCharacteristics2;\r
+ 1, // PmeSignalSupported :1;\r
+ 0, // HotPlugDevicesSupported :1;\r
+ 1, // SmbusSignalSupported :1;\r
+ 0, // Reserved :5; ///< Set to 0.\r
+ },\r
+ 0, // SegmentGroupNum;\r
+ 2, // BusNum;\r
+ 2, // DevFuncNum;\r
+};\r
+\r
+SMBIOS_TABLE_TYPE9 mSysSlotInfoType9_2 = {\r
+ { EFI_SMBIOS_TYPE_SYSTEM_SLOTS, sizeof (SMBIOS_TABLE_TYPE9), 0 },\r
+ 3, // SlotDesignation String\r
+ SlotTypePciExpressGen2X8, // SlotType; ///< The enumeration value from MISC_SLOT_TYPE.\r
+ SlotDataBusWidth4X, // SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.\r
+ SlotUsageUnknown, // CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.\r
+ SlotLengthShort, // SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.\r
+ 0, // SlotID;\r
+ { // SlotCharacteristics1;\r
+ 1, // CharacteristicsUnknown :1;\r
+ 0, // Provides50Volts :1;\r
+ 0, // Provides33Volts :1;\r
+ 0, // SharedSlot :1;\r
+ 0, // PcCard16Supported :1;\r
+ 0, // CardBusSupported :1;\r
+ 0, // ZoomVideoSupported :1;\r
+ 0, // ModemRingResumeSupported:1;\r
+ },\r
+ { // SlotCharacteristics2;\r
+ 1, // PmeSignalSupported :1;\r
+ 0, // HotPlugDevicesSupported :1;\r
+ 1, // SmbusSignalSupported :1;\r
+ 0, // Reserved :5; ///< Set to 0.\r
+ },\r
+ 0, // SegmentGroupNum;\r
+ 2, // BusNum;\r
+ 3, // DevFuncNum;\r
+};\r
+\r
+SMBIOS_TABLE_TYPE9 mSysSlotInfoType9_3 = {\r
+ { EFI_SMBIOS_TYPE_SYSTEM_SLOTS, sizeof (SMBIOS_TABLE_TYPE9), 0 },\r
+ 4, // SlotDesignation String\r
+ SlotTypePciExpressGen2X16,// SlotType; ///< The enumeration value from MISC_SLOT_TYPE.\r
+ SlotDataBusWidth4X, // SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.\r
+ SlotUsageUnknown, // CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.\r
+ SlotLengthShort, // SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.\r
+ 0, // SlotID;\r
+ { // SlotCharacteristics1;\r
+ 1, // CharacteristicsUnknown :1;\r
+ 0, // Provides50Volts :1;\r
+ 0, // Provides33Volts :1;\r
+ 0, // SharedSlot :1;\r
+ 0, // PcCard16Supported :1;\r
+ 0, // CardBusSupported :1;\r
+ 0, // ZoomVideoSupported :1;\r
+ 0, // ModemRingResumeSupported:1;\r
+ },\r
+ { // SlotCharacteristics2;\r
+ 1, // PmeSignalSupported :1;\r
+ 0, // HotPlugDevicesSupported :1;\r
+ 1, // SmbusSignalSupported :1;\r
+ 0, // Reserved :5; ///< Set to 0.\r
+ },\r
+ 0, // SegmentGroupNum;\r
+ 2, // BusNum;\r
+ 0xC // DevFuncNum;\r
+};\r
+\r
+CHAR8 *mSysSlotInfoType9Strings[] = {\r
+ "PCIE Slot 0",\r
+ "PCIE Slot 1",\r
+ "PCIE Slot 2",\r
+ "PCIE Slot 3",\r
+ NULL\r
+};\r
+\r
+\r
+/***********************************************************************\r
+ SMBIOS data definition TYPE 11 OEM Strings\r
+************************************************************************/\r
+\r
+SMBIOS_TABLE_TYPE11 mOemStringsType11 = {\r
+ { EFI_SMBIOS_TYPE_OEM_STRINGS, sizeof (SMBIOS_TABLE_TYPE11), 0 },\r
+ 1 // StringCount\r
+};\r
+CHAR8 *mOemStringsType11Strings[] = {\r
+ "https://github.com/edk2-porting/edk2-sdm845",\r
+ NULL\r
+};\r
+\r
+/***********************************************************************\r
+ SMBIOS data definition TYPE16 Physical Memory ArrayInformation\r
+************************************************************************/\r
+SMBIOS_TABLE_TYPE16 mPhyMemArrayInfoType16 = {\r
+ { EFI_SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY, sizeof (SMBIOS_TABLE_TYPE16), 0 },\r
+ MemoryArrayLocationSystemBoard, // Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.\r
+ MemoryArrayUseSystemMemory, // Use; ///< The enumeration value from MEMORY_ARRAY_USE.\r
+ MemoryErrorCorrectionNone, // MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.\r
+ 0x800000, // MaximumCapacity;\r
+ 0xFFFE, // MemoryErrorInformationHandle;\r
+ 1, // NumberOfMemoryDevices;\r
+ 0x00000000ULL, // ExtendedMaximumCapacity;\r
+};\r
+CHAR8 *mPhyMemArrayInfoType16Strings[] = {\r
+ NULL\r
+};\r
+\r
+/***********************************************************************\r
+ SMBIOS data definition TYPE17 Memory Device Information\r
+************************************************************************/\r
+SMBIOS_TABLE_TYPE17 mMemDevInfoType17 = {\r
+ { EFI_SMBIOS_TYPE_MEMORY_DEVICE, sizeof (SMBIOS_TABLE_TYPE17), 0 },\r
+ 0, // MemoryArrayHandle; // Should match SMBIOS_TABLE_TYPE16.Handle, initialized at runtime, refer to PhyMemArrayInfoUpdateSmbiosType16()\r
+ 0xFFFE, // MemoryErrorInformationHandle; (not provided)\r
+ 64, // TotalWidth; (unknown)\r
+ 64, // DataWidth; (unknown)\r
+ 0x2000, // Size; // When bit 15 is 0: Size in MB\r
+ // When bit 15 is 1: Size in KB, and continues in ExtendedSize\r
+ // initialized at runtime, refer to PhyMemArrayInfoUpdateSmbiosType16()\r
+ MemoryFormFactorRowOfChips, // FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.\r
+ 0, // DeviceSet;\r
+ 1, // DeviceLocator String\r
+ 2, // BankLocator String\r
+ MemoryTypeLpddr4, // MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.\r
+ { // TypeDetail;\r
+ 0, // Reserved :1;\r
+ 0, // Other :1;\r
+ 0, // Unknown :1;\r
+ 0, // FastPaged :1;\r
+ 0, // StaticColumn :1;\r
+ 0, // PseudoStatic :1;\r
+ 0, // Rambus :1;\r
+ 0, // Synchronous :1;\r
+ 0, // Cmos :1;\r
+ 0, // Edo :1;\r
+ 0, // WindowDram :1;\r
+ 0, // CacheDram :1;\r
+ 0, // Nonvolatile :1;\r
+ 0, // Registered :1;\r
+ 1, // Unbuffered :1;\r
+ 0, // Reserved1 :1;\r
+ },\r
+ 1866, // Speed; (unknown)\r
+ 2, // Manufacturer String\r
+ 0, // SerialNumber String\r
+ 0, // AssetTag String\r
+ 0, // PartNumber String\r
+ 0, // Attributes; (unknown rank)\r
+ 0, // ExtendedSize; (since Size < 32GB-1)\r
+ 0, // ConfiguredMemoryClockSpeed; (unknown)\r
+ 0, // MinimumVoltage; (unknown)\r
+ 0, // MaximumVoltage; (unknown)\r
+ 0, // ConfiguredVoltage; (unknown)\r
+ MemoryTechnologyDram, // MemoryTechnology ///< The enumeration value from MEMORY_DEVICE_TECHNOLOGY\r
+ {{ // MemoryOperatingModeCapability\r
+ 0, // Reserved :1;\r
+ 0, // Other :1;\r
+ 0, // Unknown :1;\r
+ 1, // VolatileMemory :1;\r
+ 0, // ByteAccessiblePersistentMemory :1;\r
+ 0, // BlockAccessiblePersistentMemory :1;\r
+ 0 // Reserved :10;\r
+ }},\r
+ 0, // FirwareVersion\r
+ 0, // ModuleManufacturerID (unknown)\r
+ 0, // ModuleProductID (unknown)\r
+ 0, // MemorySubsystemControllerManufacturerID (unknown)\r
+ 0, // MemorySubsystemControllerProductID (unknown)\r
+ 0, // NonVolatileSize\r
+ 0xFFFFFFFFFFFFFFFFULL,// VolatileSize // initialized at runtime, refer to PhyMemArrayInfoUpdateSmbiosType16()\r
+ 0, // CacheSize\r
+ 0, // LogicalSize (since MemoryType is not MemoryTypeLogicalNonVolatileDevice)\r
+ 0, // ExtendedSpeed,\r
+ 0 // ExtendedConfiguredMemorySpeed\r
+};\r
+CHAR8 *mMemDevInfoType17Strings[] = {\r
+ "Builtin",\r
+ "BANK 0",\r
+ NULL\r
+};\r
+\r
+/***********************************************************************\r
+ SMBIOS data definition TYPE19 Memory Array Mapped Address Information\r
+************************************************************************/\r
+SMBIOS_TABLE_TYPE19 mMemArrMapInfoType19 = {\r
+ { EFI_SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS, sizeof (SMBIOS_TABLE_TYPE19), 0 },\r
+ 0xFFFFFFFF, // StartingAddress;\r
+ 0xFFFFFFFF, // EndingAddress;\r
+ 0, // MemoryArrayHandle; // Should match SMBIOS_TABLE_TYPE16.Handle, initialized at runtime, refer to PhyMemArrayInfoUpdateSmbiosType16()\r
+ 1, // PartitionWidth;\r
+ 0x080000000, // ExtendedStartingAddress; // not used\r
+ 0x100000000, // ExtendedEndingAddress; // not used\r
+};\r
+CHAR8 *mMemArrMapInfoType19Strings[] = {\r
+ NULL\r
+};\r
+\r
+/***********************************************************************\r
+ SMBIOS data definition TYPE32 Boot Information\r
+************************************************************************/\r
+SMBIOS_TABLE_TYPE32 mBootInfoType32 = {\r
+ { EFI_SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION, sizeof (SMBIOS_TABLE_TYPE32), 0 },\r
+ { 0, 0, 0, 0, 0, 0 }, // Reserved[6];\r
+ BootInformationStatusNoError // BootStatus\r
+};\r
+\r
+CHAR8 *mBootInfoType32Strings[] = {\r
+ NULL\r
+};\r
+\r
+/**\r
+\r
+ Create SMBIOS record.\r
+\r
+ Converts a fixed SMBIOS structure and an array of pointers to strings into\r
+ an SMBIOS record where the strings are cat'ed on the end of the fixed record\r
+ and terminated via a double NULL and add to SMBIOS table.\r
+\r
+ SMBIOS_TABLE_TYPE32 gSmbiosType12 = {\r
+ { EFI_SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS, sizeof (SMBIOS_TABLE_TYPE12), 0 },\r
+ 1 // StringCount\r
+ };\r
+\r
+ CHAR8 *gSmbiosType12Strings[] = {\r
+ "Not Found",\r
+ NULL\r
+ };\r
+\r
+ ...\r
+\r
+ LogSmbiosData (\r
+ (EFI_SMBIOS_TABLE_HEADER*)&gSmbiosType12,\r
+ gSmbiosType12Strings\r
+ );\r
+\r
+ @param Template Fixed SMBIOS structure, required.\r
+ @param StringPack Array of strings to convert to an SMBIOS string pack.\r
+ NULL is OK.\r
+ @param DataSmbiosHandle The new SMBIOS record handle.\r
+ NULL is OK.\r
+**/\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+LogSmbiosData (\r
+ IN EFI_SMBIOS_TABLE_HEADER *Template,\r
+ IN CHAR8 **StringPack,\r
+ OUT EFI_SMBIOS_HANDLE *DataSmbiosHandle\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ EFI_SMBIOS_PROTOCOL *Smbios;\r
+ EFI_SMBIOS_HANDLE SmbiosHandle;\r
+ EFI_SMBIOS_TABLE_HEADER *Record;\r
+ UINTN Index;\r
+ UINTN StringSize;\r
+ UINTN Size;\r
+ CHAR8 *Str;\r
+\r
+ //\r
+ // Locate Smbios protocol.\r
+ //\r
+ Status = gBS->LocateProtocol (&gEfiSmbiosProtocolGuid, NULL, (VOID**)&Smbios);\r
+\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
+\r
+ // Calculate the size of the fixed record and optional string pack\r
+\r
+ Size = Template->Length;\r
+ if (StringPack == NULL) {\r
+ // At least a double null is required\r
+ Size += 2;\r
+ } else {\r
+ for (Index = 0; StringPack[Index] != NULL; Index++) {\r
+ StringSize = AsciiStrSize (StringPack[Index]);\r
+ Size += StringSize;\r
+ }\r
+ if (StringPack[0] == NULL) {\r
+ // At least a double null is required\r
+ Size += 1;\r
+ }\r
+\r
+ // Don't forget the terminating double null\r
+ Size += 1;\r
+ }\r
+\r
+ // Copy over Template\r
+ Record = (EFI_SMBIOS_TABLE_HEADER*)AllocateZeroPool (Size);\r
+ if (Record == NULL) {\r
+ return EFI_OUT_OF_RESOURCES;\r
+ }\r
+ CopyMem (Record, Template, Template->Length);\r
+\r
+ // Append string pack\r
+ Str = ((CHAR8*)Record) + Record->Length;\r
+\r
+ for (Index = 0; StringPack[Index] != NULL; Index++) {\r
+ StringSize = AsciiStrSize (StringPack[Index]);\r
+ CopyMem (Str, StringPack[Index], StringSize);\r
+ Str += StringSize;\r
+ }\r
+\r
+ *Str = 0;\r
+ SmbiosHandle = SMBIOS_HANDLE_PI_RESERVED;\r
+ Status = Smbios->Add (\r
+ Smbios,\r
+ gImageHandle,\r
+ &SmbiosHandle,\r
+ Record\r
+ );\r
+\r
+ if ((Status == EFI_SUCCESS) && (DataSmbiosHandle != NULL)) {\r
+ *DataSmbiosHandle = SmbiosHandle;\r
+ }\r
+\r
+ ASSERT_EFI_ERROR (Status);\r
+ FreePool (Record);\r
+ return Status;\r
+}\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+PlatformSmbiosDriverEntryPoint (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ )\r
+{\r
+ EFI_SMBIOS_HANDLE SmbiosHandle;\r
+\r
+ // TYPE0 BIOS Information\r
+ AsciiSPrint (mBiosVersion, sizeof (mBiosVersion), "edk2-sdm845 %s", (CHAR16 *)FixedPcdGetPtr(PcdFirmwareVersionString));\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mBIOSInfoType0, mBIOSInfoType0Strings, NULL);\r
+\r
+ // TYPE1 System Information\r
+ AsciiStrCpyS (mSysInfoManufName, sizeof(mSysInfoManufName), (CHAR8*)PcdGetPtr(PcdDeviceVendor));\r
+ AsciiStrCpyS (mSysInfoProductName, sizeof(mSysInfoProductName), (CHAR8*)PcdGetPtr(PcdDeviceProduct));\r
+ AsciiStrCpyS (mSysInfoVersionName, sizeof(mSysInfoVersionName), (CHAR8*)PcdGetPtr(PcdDeviceCodeName));\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mSysInfoType1, mSysInfoType1Strings, NULL);\r
+\r
+ // TYPE3 Enclosure Information\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mEnclosureInfoType3, mEnclosureInfoType3Strings, &SmbiosHandle);\r
+ mBoardInfoType2.ChassisHandle = (UINT16) SmbiosHandle;\r
+\r
+ // TYPE2 Board Information\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mBoardInfoType2, mBoardInfoType2Strings, NULL);\r
+\r
+ // TYPE7 Cache Information\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mCacheInfoType7_a75_L1I, mCacheInfoType7Strings, NULL);\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mCacheInfoType7_a55_L1I, mCacheInfoType7Strings, NULL);\r
+\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mCacheInfoType7_a75_L1D, mCacheInfoType7Strings, &SmbiosHandle);\r
+ mProcessorInfoType4_a75.L1CacheHandle = (UINT16) SmbiosHandle;\r
+\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mCacheInfoType7_a55_L1D, mCacheInfoType7Strings, &SmbiosHandle);\r
+ mProcessorInfoType4_a55.L1CacheHandle = (UINT16) SmbiosHandle;\r
+\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mCacheInfoType7_a75_L2, mCacheInfoType7Strings, &SmbiosHandle);\r
+ mProcessorInfoType4_a75.L2CacheHandle = (UINT16) SmbiosHandle;\r
+\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mCacheInfoType7_a55_L2, mCacheInfoType7Strings, &SmbiosHandle);\r
+ mProcessorInfoType4_a55.L2CacheHandle = (UINT16) SmbiosHandle;\r
+\r
+ // TYPE4 Processor Information\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mProcessorInfoType4_a75, mProcessorInfoType4Strings, NULL);\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mProcessorInfoType4_a55, mProcessorInfoType4Strings, NULL);\r
+\r
+ // TYPE9 System Slot Information\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mSysSlotInfoType9_0, mSysSlotInfoType9Strings, NULL);\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mSysSlotInfoType9_1, mSysSlotInfoType9Strings, NULL);\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mSysSlotInfoType9_2, mSysSlotInfoType9Strings, NULL);\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mSysSlotInfoType9_3, mSysSlotInfoType9Strings, NULL);\r
+\r
+ // TYPE11 OEM Strings\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mOemStringsType11, mOemStringsType11Strings, NULL);\r
+\r
+ // TYPE16 Physical Memory Array Information\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mPhyMemArrayInfoType16, mPhyMemArrayInfoType16Strings, &SmbiosHandle);\r
+ mMemDevInfoType17.MemoryArrayHandle = SmbiosHandle;\r
+ mMemArrMapInfoType19.MemoryArrayHandle = SmbiosHandle;\r
+\r
+ // TYPE17 Memory Device Information\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mMemDevInfoType17, mMemDevInfoType17Strings, NULL);\r
+\r
+ // TYPE19 Memory Array Map Information\r
+ mMemArrMapInfoType19.ExtendedStartingAddress = PcdGet64 (PcdSystemMemoryBase);\r
+ mMemArrMapInfoType19.ExtendedEndingAddress = PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize);\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mMemArrMapInfoType19, mMemArrMapInfoType19Strings, NULL);\r
+\r
+ // TYPE32 Boot Information\r
+ LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER*)&mBootInfoType32, mBootInfoType32Strings, NULL);\r
+\r
+ return EFI_SUCCESS;\r
+}\r
é¡¹ç® / edk2-sdm845.git / commitdiff