ramdisk
sdm845Pkg/Drivers/LogoDxe/Logo.bmp
.vscode
-device_specific/*.dts
+*.dts
*.swp
*.rej
*.orig
+++ /dev/null
-/*\r
- * Intel ACPI Component Architecture\r
- * AML/ASL+ Disassembler version 20200925 (32-bit version)\r
- * Copyright (c) 2000 - 2020 Intel Corporation\r
- * \r
- * Disassembly of ./nta/1.raw, Sat Jan 30 19:38:07 2021\r
- *\r
- * ACPI Data Table [DBG2]\r
- *\r
- * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue\r
- */\r
-\r
-[000h 0000 4] Signature : "DBG2" [Debug Port table type 2]\r
-[004h 0004 4] Table Length : 00000204\r
-[008h 0008 1] Revision : 01\r
-[009h 0009 1] Checksum : 84\r
-[00Ah 0010 6] Oem ID : "QCOM "\r
-[010h 0016 8] Oem Table ID : "QCOMEDK2"\r
-[018h 0024 4] Oem Revision : 00000850\r
-[01Ch 0028 4] Asl Compiler ID : "INTL"\r
-[020h 0032 4] Asl Compiler Revision : 20200528\r
-\r
-[024h 0036 4] Info Offset : 0000002C\r
-[028h 0040 4] Info Count : 00000003\r
-\r
-[02Ch 0044 1] Revision : 01\r
-[02Dh 0045 2] Length : 0030\r
-[02Fh 0047 1] Register Count : 01\r
-[030h 0048 2] Namepath Length : 000A\r
-[032h 0050 2] Namepath Offset : 0026\r
-[034h 0052 2] OEM Data Length : 0000 [Optional field not present]\r
-[036h 0054 2] OEM Data Offset : 0000 [Optional field not present]\r
-[038h 0056 2] Port Type : 8000\r
-[03Ah 0058 2] Port Subtype : 0011\r
-[03Ch 0060 2] Reserved : 0000\r
-[03Eh 0062 2] Base Address Offset : 0016\r
-[040h 0064 2] Address Size Offset : 0022\r
-\r
-[042h 0066 12] Base Address Register : [Generic Address Structure]\r
-[042h 0066 1] Space ID : 00 [SystemMemory]\r
-[043h 0067 1] Bit Width : 20\r
-[044h 0068 1] Bit Offset : 00\r
-[045h 0069 1] Encoded Access Width : 20 [Unknown Width Encoding]\r
-[046h 0070 8] Address : 0000000000A84000\r
-\r
-[04Eh 0078 4] Address Size : 00001000\r
-\r
-[052h 0082 10] Namepath : "\_SB.UARD"\r
-\r
-[05Ch 0092 1] Revision : 01\r
-[05Dh 0093 2] Length : 00D4\r
-[05Fh 0095 1] Register Count : 02\r
-[060h 0096 2] Namepath Length : 000A\r
-[062h 0098 2] Namepath Offset : 0036\r
-[064h 0100 2] OEM Data Length : 0094\r
-[066h 0102 2] OEM Data Offset : 0040\r
-[068h 0104 2] Port Type : 8003\r
-[06Ah 0106 2] Port Subtype : 5143\r
-[06Ch 0108 2] Reserved : 0000\r
-[06Eh 0110 2] Base Address Offset : 0016\r
-[070h 0112 2] Address Size Offset : 002E\r
-\r
-[072h 0114 12] Base Address Register : [Generic Address Structure]\r
-[072h 0114 1] Space ID : 00 [SystemMemory]\r
-[073h 0115 1] Bit Width : 20\r
-[074h 0116 1] Bit Offset : 00\r
-[075h 0117 1] Encoded Access Width : 20 [Unknown Width Encoding]\r
-[076h 0118 8] Address : 000000000A600000\r
-\r
-\r
-[07Eh 0126 12] Base Address Register : [Generic Address Structure]\r
-[07Eh 0126 1] Space ID : 00 [SystemMemory]\r
-[07Fh 0127 1] Bit Width : 20\r
-[080h 0128 1] Bit Offset : 00\r
-[081h 0129 1] Encoded Access Width : 20 [Unknown Width Encoding]\r
-[082h 0130 8] Address : 000000000A600000\r
-\r
-[08Ah 0138 4] Address Size : 000FFFFF\r
-[08Eh 0142 4] Address Size : 00001000\r
-\r
-[092h 0146 10] Namepath : "\_SB.URS0"\r
-[09Ch 0156 148] OEM Data : \\r
- 05 00 00 00 32 58 49 46 02 00 00 00 00 02 00 00 \\r
- 00 C7 00 00 F8 FF FF FF 00 00 00 00 00 02 00 00 \\r
- 10 88 0F 00 00 00 00 00 00 00 10 10 00 00 00 00 \\r
- 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \\r
- 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \\r
- 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \\r
- 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \\r
- 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \\r
- 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \\r
- 43 42 53 55 \r
-\r
-[130h 0304 1] Revision : 01\r
-[131h 0305 2] Length : 00D4\r
-[133h 0307 1] Register Count : 02\r
-[134h 0308 2] Namepath Length : 000A\r
-[136h 0310 2] Namepath Offset : 0036\r
-[138h 0312 2] OEM Data Length : 0094\r
-[13Ah 0314 2] OEM Data Offset : 0040\r
-[13Ch 0316 2] Port Type : 8003\r
-[13Eh 0318 2] Port Subtype : 5143\r
-[140h 0320 2] Reserved : 0000\r
-[142h 0322 2] Base Address Offset : 0016\r
-[144h 0324 2] Address Size Offset : 002E\r
-\r
-[146h 0326 12] Base Address Register : [Generic Address Structure]\r
-[146h 0326 1] Space ID : 00 [SystemMemory]\r
-[147h 0327 1] Bit Width : 20\r
-[148h 0328 1] Bit Offset : 00\r
-[149h 0329 1] Encoded Access Width : 20 [Unknown Width Encoding]\r
-[14Ah 0330 8] Address : 000000000A800000\r
-\r
-\r
-[152h 0338 12] Base Address Register : [Generic Address Structure]\r
-[152h 0338 1] Space ID : 00 [SystemMemory]\r
-[153h 0339 1] Bit Width : 20\r
-[154h 0340 1] Bit Offset : 00\r
-[155h 0341 1] Encoded Access Width : 20 [Unknown Width Encoding]\r
-[156h 0342 8] Address : 000000000A800000\r
-\r
-[15Eh 0350 4] Address Size : 000FFFFF\r
-[162h 0354 4] Address Size : 00001000\r
-\r
-[166h 0358 10] Namepath : "\_SB.USB1"\r
-[170h 0368 148] OEM Data : \\r
- 05 00 00 00 32 58 49 46 02 00 00 00 00 02 00 00 \\r
- 00 C7 00 00 F8 FF FF FF 00 00 00 00 00 02 00 00 \\r
- 10 88 0F 00 00 00 00 00 00 00 10 10 00 00 00 00 \\r
- 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \\r
- 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \\r
- 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \\r
- 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \\r
- 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \\r
- 00 00 00 00 00 00 00 00 00 00 00 00 01 00 00 00 \\r
- 43 42 53 55 \r
-\r
-Raw Table Data: Length 516 (0x204)\r
-\r
- 0000: 44 42 47 32 04 02 00 00 01 84 51 43 4F 4D 20 20 // DBG2......QCOM \r
- 0010: 51 43 4F 4D 45 44 4B 32 50 08 00 00 49 4E 54 4C // QCOMEDK2P...INTL\r
- 0020: 28 05 20 20 2C 00 00 00 03 00 00 00 01 30 00 01 // (. ,........0..\r
- 0030: 0A 00 26 00 00 00 00 00 00 80 11 00 00 00 16 00 // ..&.............\r
- 0040: 22 00 00 20 00 20 00 40 A8 00 00 00 00 00 00 10 // ".. . .@........\r
- 0050: 00 00 5C 5F 53 42 2E 55 41 52 44 00 01 D4 00 02 // ..\_SB.UARD.....\r
- 0060: 0A 00 36 00 94 00 40 00 03 80 43 51 00 00 16 00 // ..6...@...CQ....\r
- 0070: 2E 00 00 20 00 20 00 00 60 0A 00 00 00 00 00 20 // ... . ..`...... \r
- 0080: 00 20 00 00 60 0A 00 00 00 00 FF FF 0F 00 00 10 // . ..`...........\r
- 0090: 00 00 5C 5F 53 42 2E 55 52 53 30 00 05 00 00 00 // ..\_SB.URS0.....\r
- 00A0: 32 58 49 46 02 00 00 00 00 02 00 00 00 C7 00 00 // 2XIF............\r
- 00B0: F8 FF FF FF 00 00 00 00 00 02 00 00 10 88 0F 00 // ................\r
- 00C0: 00 00 00 00 00 00 10 10 00 00 00 00 00 00 00 00 // ................\r
- 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 00E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 00F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0120: 00 00 00 00 00 00 00 00 00 00 00 00 43 42 53 55 // ............CBSU\r
- 0130: 01 D4 00 02 0A 00 36 00 94 00 40 00 03 80 43 51 // ......6...@...CQ\r
- 0140: 00 00 16 00 2E 00 00 20 00 20 00 00 80 0A 00 00 // ....... . ......\r
- 0150: 00 00 00 20 00 20 00 00 80 0A 00 00 00 00 FF FF // ... . ..........\r
- 0160: 0F 00 00 10 00 00 5C 5F 53 42 2E 55 53 42 31 00 // ......\_SB.USB1.\r
- 0170: 05 00 00 00 32 58 49 46 02 00 00 00 00 02 00 00 // ....2XIF........\r
- 0180: 00 C7 00 00 F8 FF FF FF 00 00 00 00 00 02 00 00 // ................\r
- 0190: 10 88 0F 00 00 00 00 00 00 00 10 10 00 00 00 00 // ................\r
- 01A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 01B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 01C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 01D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 01E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 01F0: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................\r
- 0200: 43 42 53 55 // CBSU\r
+++ /dev/null
-/*\r
- * Intel ACPI Component Architecture\r
- * AML/ASL+ Disassembler version 20200925 (32-bit version)\r
- * Copyright (c) 2000 - 2020 Intel Corporation\r
- * \r
- * Disassembly of ./nta/3.raw, Sat Jan 30 19:38:15 2021\r
- *\r
- * ACPI Data Table [GTDT]\r
- *\r
- * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue\r
- */\r
-\r
-[000h 0000 4] Signature : "GTDT" [Generic Timer Description Table]\r
-[004h 0004 4] Table Length : 0000009C\r
-[008h 0008 1] Revision : 02\r
-[009h 0009 1] Checksum : B3\r
-[00Ah 0010 6] Oem ID : "QCOM "\r
-[010h 0016 8] Oem Table ID : "QCOMEDK2"\r
-[018h 0024 4] Oem Revision : 00000850\r
-[01Ch 0028 4] Asl Compiler ID : "INTL"\r
-[020h 0032 4] Asl Compiler Revision : 20200528\r
-\r
-[024h 0036 8] Counter Block Address : FFFFFFFFFFFFFFFF\r
-[02Ch 0044 4] Reserved : 00000000\r
-\r
-[030h 0048 4] Secure EL1 Interrupt : 00000011\r
-[034h 0052 4] EL1 Flags (decoded below) : 00000000\r
- Trigger Mode : 0\r
- Polarity : 0\r
- Always On : 0\r
-\r
-[038h 0056 4] Non-Secure EL1 Interrupt : 00000012\r
-[03Ch 0060 4] NEL1 Flags (decoded below) : 00000000\r
- Trigger Mode : 0\r
- Polarity : 0\r
- Always On : 0\r
-\r
-[040h 0064 4] Virtual Timer Interrupt : 00000013\r
-[044h 0068 4] VT Flags (decoded below) : 00000000\r
- Trigger Mode : 0\r
- Polarity : 0\r
- Always On : 0\r
-\r
-[048h 0072 4] Non-Secure EL2 Interrupt : 00000010\r
-[04Ch 0076 4] NEL2 Flags (decoded below) : 00000000\r
- Trigger Mode : 0\r
- Polarity : 0\r
- Always On : 0\r
-[050h 0080 8] Counter Read Block Address : FFFFFFFFFFFFFFFF\r
-\r
-[058h 0088 4] Platform Timer Count : 00000001\r
-[05Ch 0092 4] Platform Timer Offset : 00000060\r
-\r
-[060h 0096 1] Subtable Type : 00 [Generic Timer Block]\r
-[061h 0097 2] Length : 003C\r
-[063h 0099 1] Reserved : 00\r
-[064h 0100 8] Block Address : 0000000017C90000\r
-[06Ch 0108 4] Timer Count : 00000001\r
-[070h 0112 4] Timer Offset : 00000014\r
-\r
-[074h 0116 1] Frame Number : 00\r
-[075h 0117 3] Reserved : 000000\r
-[078h 0120 8] Base Address : 0000000017CA0000\r
-[080h 0128 8] EL0 Base Address : 0000000017CB0000\r
-[088h 0136 4] Timer Interrupt : 00000027\r
-[08Ch 0140 4] Timer Flags (decoded below) : 00000000\r
- Trigger Mode : 0\r
- Polarity : 0\r
-[090h 0144 4] Virtual Timer Interrupt : 00000026\r
-[094h 0148 4] Virtual Timer Flags (decoded below) : 00000000\r
- Trigger Mode : 0\r
- Polarity : 0\r
-[098h 0152 4] Common Flags (decoded below) : 00000002\r
- Secure : 0\r
- Always On : 1\r
-\r
-Raw Table Data: Length 156 (0x9C)\r
-\r
- 0000: 47 54 44 54 9C 00 00 00 02 B3 51 43 4F 4D 20 20 // GTDT......QCOM \r
- 0010: 51 43 4F 4D 45 44 4B 32 50 08 00 00 49 4E 54 4C // QCOMEDK2P...INTL\r
- 0020: 28 05 20 20 FF FF FF FF FF FF FF FF 00 00 00 00 // (. ............\r
- 0030: 11 00 00 00 00 00 00 00 12 00 00 00 00 00 00 00 // ................\r
- 0040: 13 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 // ................\r
- 0050: FF FF FF FF FF FF FF FF 01 00 00 00 60 00 00 00 // ............`...\r
- 0060: 00 3C 00 00 00 00 C9 17 00 00 00 00 01 00 00 00 // .<..............\r
- 0070: 14 00 00 00 00 00 00 00 00 00 CA 17 00 00 00 00 // ................\r
- 0080: 00 00 CB 17 00 00 00 00 27 00 00 00 00 00 00 00 // ........'.......\r
- 0090: 26 00 00 00 00 00 00 00 02 00 00 00 // &...........\r
+++ /dev/null
-/*\r
- * Intel ACPI Component Architecture\r
- * AML/ASL+ Disassembler version 20200925 (32-bit version)\r
- * Copyright (c) 2000 - 2020 Intel Corporation\r
- * \r
- * Disassembly of ./nta/5.raw, Sat Jan 30 19:38:43 2021\r
- *\r
- * ACPI Data Table [APIC]\r
- *\r
- * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue\r
- */\r
-\r
-[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]\r
-[004h 0004 4] Table Length : 000002EC\r
-[008h 0008 1] Revision : 05\r
-[009h 0009 1] Checksum : 25\r
-[00Ah 0010 6] Oem ID : "QCOM "\r
-[010h 0016 8] Oem Table ID : "QCOMEDK2"\r
-[018h 0024 4] Oem Revision : 00000850\r
-[01Ch 0028 4] Asl Compiler ID : "INTL"\r
-[020h 0032 4] Asl Compiler Revision : 20200528\r
-\r
-[024h 0036 4] Local Apic Address : 00000000\r
-[028h 0040 4] Flags (decoded below) : 00000000\r
- PC-AT Compatibility : 0\r
-\r
-[02Ch 0044 1] Subtable Type : 0B [Generic Interrupt Controller]\r
-[02Dh 0045 1] Length : 50\r
-[02Eh 0046 2] Reserved : 0000\r
-[030h 0048 4] CPU Interface Number : 00000000\r
-[034h 0052 4] Processor UID : 00000000\r
-[038h 0056 4] Flags (decoded below) : 00000001\r
- Processor Enabled : 1\r
- Performance Interrupt Trigger Mode : 0\r
- Virtual GIC Interrupt Trigger Mode : 0\r
-[03Ch 0060 4] Parking Protocol Version : 00000000\r
-[040h 0064 4] Performance Interrupt : 00000015\r
-[044h 0068 8] Parked Address : 0000000000000000\r
-[04Ch 0076 8] Base Address : 0000000000000000\r
-[054h 0084 8] Virtual GIC Base Address : 0000000000000000\r
-[05Ch 0092 8] Hypervisor GIC Base Address : 0000000000000000\r
-[064h 0100 4] Virtual GIC Interrupt : 00000018\r
-[068h 0104 8] Redistributor Base Address : 0000000000000000\r
-[070h 0112 8] ARM MPIDR : 0000000000000000\r
-[078h 0120 1] Efficiency Class : 00\r
-[079h 0121 1] Reserved : 00\r
-[07Ah 0122 2] SPE Overflow Interrupt : 0000\r
-\r
-[07Ch 0124 1] Subtable Type : 0B [Generic Interrupt Controller]\r
-[07Dh 0125 1] Length : 50\r
-[07Eh 0126 2] Reserved : 0000\r
-[080h 0128 4] CPU Interface Number : 00000001\r
-[084h 0132 4] Processor UID : 00000001\r
-[088h 0136 4] Flags (decoded below) : 00000001\r
- Processor Enabled : 1\r
- Performance Interrupt Trigger Mode : 0\r
- Virtual GIC Interrupt Trigger Mode : 0\r
-[08Ch 0140 4] Parking Protocol Version : 00000000\r
-[090h 0144 4] Performance Interrupt : 00000015\r
-[094h 0148 8] Parked Address : 0000000000000000\r
-[09Ch 0156 8] Base Address : 0000000000000000\r
-[0A4h 0164 8] Virtual GIC Base Address : 0000000000000000\r
-[0ACh 0172 8] Hypervisor GIC Base Address : 0000000000000000\r
-[0B4h 0180 4] Virtual GIC Interrupt : 00000018\r
-[0B8h 0184 8] Redistributor Base Address : 0000000000000000\r
-[0C0h 0192 8] ARM MPIDR : 0000000000000100\r
-[0C8h 0200 1] Efficiency Class : 00\r
-[0C9h 0201 1] Reserved : 00\r
-[0CAh 0202 2] SPE Overflow Interrupt : 0000\r
-\r
-[0CCh 0204 1] Subtable Type : 0B [Generic Interrupt Controller]\r
-[0CDh 0205 1] Length : 50\r
-[0CEh 0206 2] Reserved : 0000\r
-[0D0h 0208 4] CPU Interface Number : 00000002\r
-[0D4h 0212 4] Processor UID : 00000002\r
-[0D8h 0216 4] Flags (decoded below) : 00000001\r
- Processor Enabled : 1\r
- Performance Interrupt Trigger Mode : 0\r
- Virtual GIC Interrupt Trigger Mode : 0\r
-[0DCh 0220 4] Parking Protocol Version : 00000000\r
-[0E0h 0224 4] Performance Interrupt : 00000015\r
-[0E4h 0228 8] Parked Address : 0000000000000000\r
-[0ECh 0236 8] Base Address : 0000000000000000\r
-[0F4h 0244 8] Virtual GIC Base Address : 0000000000000000\r
-[0FCh 0252 8] Hypervisor GIC Base Address : 0000000000000000\r
-[104h 0260 4] Virtual GIC Interrupt : 00000018\r
-[108h 0264 8] Redistributor Base Address : 0000000000000000\r
-[110h 0272 8] ARM MPIDR : 0000000000000200\r
-[118h 0280 1] Efficiency Class : 00\r
-[119h 0281 1] Reserved : 00\r
-[11Ah 0282 2] SPE Overflow Interrupt : 0000\r
-\r
-[11Ch 0284 1] Subtable Type : 0B [Generic Interrupt Controller]\r
-[11Dh 0285 1] Length : 50\r
-[11Eh 0286 2] Reserved : 0000\r
-[120h 0288 4] CPU Interface Number : 00000003\r
-[124h 0292 4] Processor UID : 00000003\r
-[128h 0296 4] Flags (decoded below) : 00000001\r
- Processor Enabled : 1\r
- Performance Interrupt Trigger Mode : 0\r
- Virtual GIC Interrupt Trigger Mode : 0\r
-[12Ch 0300 4] Parking Protocol Version : 00000000\r
-[130h 0304 4] Performance Interrupt : 00000015\r
-[134h 0308 8] Parked Address : 0000000000000000\r
-[13Ch 0316 8] Base Address : 0000000000000000\r
-[144h 0324 8] Virtual GIC Base Address : 0000000000000000\r
-[14Ch 0332 8] Hypervisor GIC Base Address : 0000000000000000\r
-[154h 0340 4] Virtual GIC Interrupt : 00000018\r
-[158h 0344 8] Redistributor Base Address : 0000000000000000\r
-[160h 0352 8] ARM MPIDR : 0000000000000300\r
-[168h 0360 1] Efficiency Class : 00\r
-[169h 0361 1] Reserved : 00\r
-[16Ah 0362 2] SPE Overflow Interrupt : 0000\r
-\r
-[16Ch 0364 1] Subtable Type : 0B [Generic Interrupt Controller]\r
-[16Dh 0365 1] Length : 50\r
-[16Eh 0366 2] Reserved : 0000\r
-[170h 0368 4] CPU Interface Number : 00000004\r
-[174h 0372 4] Processor UID : 00000004\r
-[178h 0376 4] Flags (decoded below) : 00000001\r
- Processor Enabled : 1\r
- Performance Interrupt Trigger Mode : 0\r
- Virtual GIC Interrupt Trigger Mode : 0\r
-[17Ch 0380 4] Parking Protocol Version : 00000000\r
-[180h 0384 4] Performance Interrupt : 00000015\r
-[184h 0388 8] Parked Address : 0000000000000000\r
-[18Ch 0396 8] Base Address : 0000000000000000\r
-[194h 0404 8] Virtual GIC Base Address : 0000000000000000\r
-[19Ch 0412 8] Hypervisor GIC Base Address : 0000000000000000\r
-[1A4h 0420 4] Virtual GIC Interrupt : 00000018\r
-[1A8h 0424 8] Redistributor Base Address : 0000000000000000\r
-[1B0h 0432 8] ARM MPIDR : 0000000000000400\r
-[1B8h 0440 1] Efficiency Class : 01\r
-[1B9h 0441 1] Reserved : 00\r
-[1BAh 0442 2] SPE Overflow Interrupt : 0000\r
-\r
-[1BCh 0444 1] Subtable Type : 0B [Generic Interrupt Controller]\r
-[1BDh 0445 1] Length : 50\r
-[1BEh 0446 2] Reserved : 0000\r
-[1C0h 0448 4] CPU Interface Number : 00000005\r
-[1C4h 0452 4] Processor UID : 00000005\r
-[1C8h 0456 4] Flags (decoded below) : 00000001\r
- Processor Enabled : 1\r
- Performance Interrupt Trigger Mode : 0\r
- Virtual GIC Interrupt Trigger Mode : 0\r
-[1CCh 0460 4] Parking Protocol Version : 00000000\r
-[1D0h 0464 4] Performance Interrupt : 00000015\r
-[1D4h 0468 8] Parked Address : 0000000000000000\r
-[1DCh 0476 8] Base Address : 0000000000000000\r
-[1E4h 0484 8] Virtual GIC Base Address : 0000000000000000\r
-[1ECh 0492 8] Hypervisor GIC Base Address : 0000000000000000\r
-[1F4h 0500 4] Virtual GIC Interrupt : 00000018\r
-[1F8h 0504 8] Redistributor Base Address : 0000000000000000\r
-[200h 0512 8] ARM MPIDR : 0000000000000500\r
-[208h 0520 1] Efficiency Class : 01\r
-[209h 0521 1] Reserved : 00\r
-[20Ah 0522 2] SPE Overflow Interrupt : 0000\r
-\r
-[20Ch 0524 1] Subtable Type : 0B [Generic Interrupt Controller]\r
-[20Dh 0525 1] Length : 50\r
-[20Eh 0526 2] Reserved : 0000\r
-[210h 0528 4] CPU Interface Number : 00000006\r
-[214h 0532 4] Processor UID : 00000006\r
-[218h 0536 4] Flags (decoded below) : 00000001\r
- Processor Enabled : 1\r
- Performance Interrupt Trigger Mode : 0\r
- Virtual GIC Interrupt Trigger Mode : 0\r
-[21Ch 0540 4] Parking Protocol Version : 00000000\r
-[220h 0544 4] Performance Interrupt : 00000015\r
-[224h 0548 8] Parked Address : 0000000000000000\r
-[22Ch 0556 8] Base Address : 0000000000000000\r
-[234h 0564 8] Virtual GIC Base Address : 0000000000000000\r
-[23Ch 0572 8] Hypervisor GIC Base Address : 0000000000000000\r
-[244h 0580 4] Virtual GIC Interrupt : 00000018\r
-[248h 0584 8] Redistributor Base Address : 0000000000000000\r
-[250h 0592 8] ARM MPIDR : 0000000000000600\r
-[258h 0600 1] Efficiency Class : 01\r
-[259h 0601 1] Reserved : 00\r
-[25Ah 0602 2] SPE Overflow Interrupt : 0000\r
-\r
-[25Ch 0604 1] Subtable Type : 0B [Generic Interrupt Controller]\r
-[25Dh 0605 1] Length : 50\r
-[25Eh 0606 2] Reserved : 0000\r
-[260h 0608 4] CPU Interface Number : 00000007\r
-[264h 0612 4] Processor UID : 00000007\r
-[268h 0616 4] Flags (decoded below) : 00000001\r
- Processor Enabled : 1\r
- Performance Interrupt Trigger Mode : 0\r
- Virtual GIC Interrupt Trigger Mode : 0\r
-[26Ch 0620 4] Parking Protocol Version : 00000000\r
-[270h 0624 4] Performance Interrupt : 00000015\r
-[274h 0628 8] Parked Address : 0000000000000000\r
-[27Ch 0636 8] Base Address : 0000000000000000\r
-[284h 0644 8] Virtual GIC Base Address : 0000000000000000\r
-[28Ch 0652 8] Hypervisor GIC Base Address : 0000000000000000\r
-[294h 0660 4] Virtual GIC Interrupt : 00000018\r
-[298h 0664 8] Redistributor Base Address : 0000000000000000\r
-[2A0h 0672 8] ARM MPIDR : 0000000000000700\r
-[2A8h 0680 1] Efficiency Class : 01\r
-[2A9h 0681 1] Reserved : 00\r
-[2AAh 0682 2] SPE Overflow Interrupt : 0000\r
-\r
-[2ACh 0684 1] Subtable Type : 0C [Generic Interrupt Distributor]\r
-[2ADh 0685 1] Length : 18\r
-[2AEh 0686 2] Reserved : 0000\r
-[2B0h 0688 4] Local GIC Hardware ID : 00000000\r
-[2B4h 0692 8] Base Address : 0000000017A00000\r
-[2BCh 0700 4] Interrupt Base : 00000000\r
-[2C0h 0704 1] Version : 03\r
-[2C1h 0705 3] Reserved : 000000\r
-\r
-[2C4h 0708 1] Subtable Type : 0E [Generic Interrupt Redistributor]\r
-[2C5h 0709 1] Length : 10\r
-[2C6h 0710 2] Reserved : 0000\r
-[2C8h 0712 8] Base Address : 0000000017A60000\r
-[2D0h 0720 4] Length : 00100000\r
-\r
-[2D4h 0724 1] Subtable Type : 0D [Generic MSI Frame]\r
-[2D5h 0725 1] Length : 18\r
-[2D6h 0726 2] Reserved : 0000\r
-[2D8h 0728 4] MSI Frame ID : 00000000\r
-[2DCh 0732 8] Base Address : 0000000017A10000\r
-[2E4h 0740 4] Flags (decoded below) : 00000001\r
- Select SPI : 1\r
-[2E8h 0744 2] SPI Count : 0040\r
-[2EAh 0746 2] SPI Base : 02A0\r
-\r
-Raw Table Data: Length 748 (0x2EC)\r
-\r
- 0000: 41 50 49 43 EC 02 00 00 05 25 51 43 4F 4D 20 20 // APIC.....%QCOM \r
- 0010: 51 43 4F 4D 45 44 4B 32 50 08 00 00 49 4E 54 4C // QCOMEDK2P...INTL\r
- 0020: 28 05 20 20 00 00 00 00 00 00 00 00 0B 50 00 00 // (. .........P..\r
- 0030: 00 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 // ................\r
- 0040: 15 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0060: 00 00 00 00 18 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0070: 00 00 00 00 00 00 00 00 00 00 00 00 0B 50 00 00 // .............P..\r
- 0080: 01 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00 // ................\r
- 0090: 15 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 00B0: 00 00 00 00 18 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 00C0: 00 01 00 00 00 00 00 00 00 00 00 00 0B 50 00 00 // .............P..\r
- 00D0: 02 00 00 00 02 00 00 00 01 00 00 00 00 00 00 00 // ................\r
- 00E0: 15 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 00F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0100: 00 00 00 00 18 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0110: 00 02 00 00 00 00 00 00 00 00 00 00 0B 50 00 00 // .............P..\r
- 0120: 03 00 00 00 03 00 00 00 01 00 00 00 00 00 00 00 // ................\r
- 0130: 15 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0150: 00 00 00 00 18 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0160: 00 03 00 00 00 00 00 00 00 00 00 00 0B 50 00 00 // .............P..\r
- 0170: 04 00 00 00 04 00 00 00 01 00 00 00 00 00 00 00 // ................\r
- 0180: 15 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 01A0: 00 00 00 00 18 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 01B0: 00 04 00 00 00 00 00 00 01 00 00 00 0B 50 00 00 // .............P..\r
- 01C0: 05 00 00 00 05 00 00 00 01 00 00 00 00 00 00 00 // ................\r
- 01D0: 15 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 01E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 01F0: 00 00 00 00 18 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0200: 00 05 00 00 00 00 00 00 01 00 00 00 0B 50 00 00 // .............P..\r
- 0210: 06 00 00 00 06 00 00 00 01 00 00 00 00 00 00 00 // ................\r
- 0220: 15 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0230: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0240: 00 00 00 00 18 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0250: 00 06 00 00 00 00 00 00 01 00 00 00 0B 50 00 00 // .............P..\r
- 0260: 07 00 00 00 07 00 00 00 01 00 00 00 00 00 00 00 // ................\r
- 0270: 15 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0280: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0290: 00 00 00 00 18 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 02A0: 00 07 00 00 00 00 00 00 01 00 00 00 0C 18 00 00 // ................\r
- 02B0: 00 00 00 00 00 00 A0 17 00 00 00 00 00 00 00 00 // ................\r
- 02C0: 03 00 00 00 0E 10 00 00 00 00 A6 17 00 00 00 00 // ................\r
- 02D0: 00 00 10 00 0D 18 00 00 00 00 00 00 00 00 A1 17 // ................\r
- 02E0: 00 00 00 00 01 00 00 00 40 00 A0 02 // ........@...\r
+++ /dev/null
-/*\r
- * Intel ACPI Component Architecture\r
- * AML/ASL+ Disassembler version 20200925 (32-bit version)\r
- * Copyright (c) 2000 - 2020 Intel Corporation\r
- * \r
- * Disassembly of ./nta/6.raw, Sat Jan 30 19:38:46 2021\r
- *\r
- * ACPI Data Table [PPTT]\r
- *\r
- * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue\r
- */\r
-\r
-[000h 0000 4] Signature : "PPTT" [Processor Properties Topology Table]\r
-[004h 0004 4] Table Length : 0000019E\r
-[008h 0008 1] Revision : 01\r
-[009h 0009 1] Checksum : FB\r
-[00Ah 0010 6] Oem ID : "QCOM "\r
-[010h 0016 8] Oem Table ID : "QCOMEDK2"\r
-[018h 0024 4] Oem Revision : 00000850\r
-[01Ch 0028 4] Asl Compiler ID : "INTL"\r
-[020h 0032 4] Asl Compiler Revision : 20200528\r
-\r
-\r
-[024h 0036 1] Subtable Type : 01 [Cache Type]\r
-[025h 0037 1] Length : 18\r
-[026h 0038 2] Reserved : 0000\r
-[028h 0040 4] Flags (decoded below) : 00000000\r
- Size valid : 0\r
- Number of Sets valid : 0\r
- Associativity valid : 0\r
- Allocation Type valid : 0\r
- Cache Type valid : 0\r
- Write Policy valid : 0\r
- Line Size valid : 0\r
-[02Ch 0044 4] Next Level of Cache : 00000000\r
-[030h 0048 4] Size : 00000000\r
-[034h 0052 4] Number of Sets : 00000000\r
-[038h 0056 1] Associativity : 00\r
-[039h 0057 1] Attributes : 00\r
- Allocation Type : 0\r
- Cache Type : 0\r
- Write Policy : 0\r
-[03Ah 0058 2] Line Size : 0000\r
-\r
-[03Ch 0060 1] Subtable Type : 02 [ID]\r
-[03Dh 0061 1] Length : 1E\r
-[03Eh 0062 2] Reserved : 0000\r
-[040h 0064 4] Vendor ID : 00000000\r
-[044h 0068 8] Level1 ID : 0000000000000000\r
-[04Ch 0076 8] Level2 ID : 0000000000000000\r
-[054h 0084 2] Major revision : 0000\r
-[056h 0086 2] Minor revision : 0000\r
-[058h 0088 2] Spin revision : 0000\r
-\r
-[05Ah 0090 1] Subtable Type : 00 [Processor Hierarchy Node]\r
-[05Bh 0091 1] Length : 1C\r
-[05Ch 0092 2] Reserved : 0000\r
-[05Eh 0094 4] Flags (decoded below) : 00000001\r
- Physical package : 1\r
- ACPI Processor ID valid : 0\r
- Processor is a thread : 0\r
- Node is a leaf : 0\r
- Identical Implementation : 0\r
-[062h 0098 4] Parent : 00000000\r
-[066h 0102 4] ACPI Processor ID : 00000000\r
-[06Ah 0106 4] Private Resource Number : 00000002\r
-[06Eh 0110 4] Private Resource : 00000024\r
-[072h 0114 4] Private Resource : 0000003C\r
-\r
-[076h 0118 1] Subtable Type : 01 [Cache Type]\r
-[077h 0119 1] Length : 18\r
-[078h 0120 2] Reserved : 0000\r
-[07Ah 0122 4] Flags (decoded below) : 00000000\r
- Size valid : 0\r
- Number of Sets valid : 0\r
- Associativity valid : 0\r
- Allocation Type valid : 0\r
- Cache Type valid : 0\r
- Write Policy valid : 0\r
- Line Size valid : 0\r
-[07Eh 0126 4] Next Level of Cache : 00000000\r
-[082h 0130 4] Size : 00000000\r
-[086h 0134 4] Number of Sets : 00000000\r
-[08Ah 0138 1] Associativity : 00\r
-[08Bh 0139 1] Attributes : 00\r
- Allocation Type : 0\r
- Cache Type : 0\r
- Write Policy : 0\r
-[08Ch 0140 2] Line Size : 0000\r
-\r
-[08Eh 0142 1] Subtable Type : 01 [Cache Type]\r
-[08Fh 0143 1] Length : 18\r
-[090h 0144 2] Reserved : 0000\r
-[092h 0146 4] Flags (decoded below) : 00000000\r
- Size valid : 0\r
- Number of Sets valid : 0\r
- Associativity valid : 0\r
- Allocation Type valid : 0\r
- Cache Type valid : 0\r
- Write Policy valid : 0\r
- Line Size valid : 0\r
-[096h 0150 4] Next Level of Cache : 00000076\r
-[09Ah 0154 4] Size : 00000000\r
-[09Eh 0158 4] Number of Sets : 00000000\r
-[0A2h 0162 1] Associativity : 00\r
-[0A3h 0163 1] Attributes : 00\r
- Allocation Type : 0\r
- Cache Type : 0\r
- Write Policy : 0\r
-[0A4h 0164 2] Line Size : 0000\r
-\r
-[0A6h 0166 1] Subtable Type : 01 [Cache Type]\r
-[0A7h 0167 1] Length : 18\r
-[0A8h 0168 2] Reserved : 0000\r
-[0AAh 0170 4] Flags (decoded below) : 00000000\r
- Size valid : 0\r
- Number of Sets valid : 0\r
- Associativity valid : 0\r
- Allocation Type valid : 0\r
- Cache Type valid : 0\r
- Write Policy valid : 0\r
- Line Size valid : 0\r
-[0AEh 0174 4] Next Level of Cache : 00000076\r
-[0B2h 0178 4] Size : 00000000\r
-[0B6h 0182 4] Number of Sets : 00000000\r
-[0BAh 0186 1] Associativity : 00\r
-[0BBh 0187 1] Attributes : 00\r
- Allocation Type : 0\r
- Cache Type : 0\r
- Write Policy : 0\r
-[0BCh 0188 2] Line Size : 0000\r
-\r
-[0BEh 0190 1] Subtable Type : 00 [Processor Hierarchy Node]\r
-[0BFh 0191 1] Length : 1C\r
-[0C0h 0192 2] Reserved : 0000\r
-[0C2h 0194 4] Flags (decoded below) : 00000002\r
- Physical package : 0\r
- ACPI Processor ID valid : 1\r
- Processor is a thread : 0\r
- Node is a leaf : 0\r
- Identical Implementation : 0\r
-[0C6h 0198 4] Parent : 0000005A\r
-[0CAh 0202 4] ACPI Processor ID : 00000000\r
-[0CEh 0206 4] Private Resource Number : 00000002\r
-[0D2h 0210 4] Private Resource : 0000008E\r
-[0D6h 0214 4] Private Resource : 000000A6\r
-\r
-[0DAh 0218 1] Subtable Type : 00 [Processor Hierarchy Node]\r
-[0DBh 0219 1] Length : 1C\r
-[0DCh 0220 2] Reserved : 0000\r
-[0DEh 0222 4] Flags (decoded below) : 00000002\r
- Physical package : 0\r
- ACPI Processor ID valid : 1\r
- Processor is a thread : 0\r
- Node is a leaf : 0\r
- Identical Implementation : 0\r
-[0E2h 0226 4] Parent : 0000005A\r
-[0E6h 0230 4] ACPI Processor ID : 00000001\r
-[0EAh 0234 4] Private Resource Number : 00000002\r
-[0EEh 0238 4] Private Resource : 0000008E\r
-[0F2h 0242 4] Private Resource : 000000A6\r
-\r
-[0F6h 0246 1] Subtable Type : 00 [Processor Hierarchy Node]\r
-[0F7h 0247 1] Length : 1C\r
-[0F8h 0248 2] Reserved : 0000\r
-[0FAh 0250 4] Flags (decoded below) : 00000002\r
- Physical package : 0\r
- ACPI Processor ID valid : 1\r
- Processor is a thread : 0\r
- Node is a leaf : 0\r
- Identical Implementation : 0\r
-[0FEh 0254 4] Parent : 0000005A\r
-[102h 0258 4] ACPI Processor ID : 00000002\r
-[106h 0262 4] Private Resource Number : 00000002\r
-[10Ah 0266 4] Private Resource : 0000008E\r
-[10Eh 0270 4] Private Resource : 000000A6\r
-\r
-[112h 0274 1] Subtable Type : 00 [Processor Hierarchy Node]\r
-[113h 0275 1] Length : 1C\r
-[114h 0276 2] Reserved : 0000\r
-[116h 0278 4] Flags (decoded below) : 00000002\r
- Physical package : 0\r
- ACPI Processor ID valid : 1\r
- Processor is a thread : 0\r
- Node is a leaf : 0\r
- Identical Implementation : 0\r
-[11Ah 0282 4] Parent : 0000005A\r
-[11Eh 0286 4] ACPI Processor ID : 00000003\r
-[122h 0290 4] Private Resource Number : 00000002\r
-[126h 0294 4] Private Resource : 0000008E\r
-[12Ah 0298 4] Private Resource : 000000A6\r
-\r
-[12Eh 0302 1] Subtable Type : 00 [Processor Hierarchy Node]\r
-[12Fh 0303 1] Length : 1C\r
-[130h 0304 2] Reserved : 0000\r
-[132h 0306 4] Flags (decoded below) : 00000002\r
- Physical package : 0\r
- ACPI Processor ID valid : 1\r
- Processor is a thread : 0\r
- Node is a leaf : 0\r
- Identical Implementation : 0\r
-[136h 0310 4] Parent : 0000005A\r
-[13Ah 0314 4] ACPI Processor ID : 00000004\r
-[13Eh 0318 4] Private Resource Number : 00000002\r
-[142h 0322 4] Private Resource : 0000008E\r
-[146h 0326 4] Private Resource : 000000A6\r
-\r
-[14Ah 0330 1] Subtable Type : 00 [Processor Hierarchy Node]\r
-[14Bh 0331 1] Length : 1C\r
-[14Ch 0332 2] Reserved : 0000\r
-[14Eh 0334 4] Flags (decoded below) : 00000002\r
- Physical package : 0\r
- ACPI Processor ID valid : 1\r
- Processor is a thread : 0\r
- Node is a leaf : 0\r
- Identical Implementation : 0\r
-[152h 0338 4] Parent : 0000005A\r
-[156h 0342 4] ACPI Processor ID : 00000005\r
-[15Ah 0346 4] Private Resource Number : 00000002\r
-[15Eh 0350 4] Private Resource : 0000008E\r
-[162h 0354 4] Private Resource : 000000A6\r
-\r
-[166h 0358 1] Subtable Type : 00 [Processor Hierarchy Node]\r
-[167h 0359 1] Length : 1C\r
-[168h 0360 2] Reserved : 0000\r
-[16Ah 0362 4] Flags (decoded below) : 00000002\r
- Physical package : 0\r
- ACPI Processor ID valid : 1\r
- Processor is a thread : 0\r
- Node is a leaf : 0\r
- Identical Implementation : 0\r
-[16Eh 0366 4] Parent : 0000005A\r
-[172h 0370 4] ACPI Processor ID : 00000006\r
-[176h 0374 4] Private Resource Number : 00000002\r
-[17Ah 0378 4] Private Resource : 0000008E\r
-[17Eh 0382 4] Private Resource : 000000A6\r
-\r
-[182h 0386 1] Subtable Type : 00 [Processor Hierarchy Node]\r
-[183h 0387 1] Length : 1C\r
-[184h 0388 2] Reserved : 0000\r
-[186h 0390 4] Flags (decoded below) : 00000002\r
- Physical package : 0\r
- ACPI Processor ID valid : 1\r
- Processor is a thread : 0\r
- Node is a leaf : 0\r
- Identical Implementation : 0\r
-[18Ah 0394 4] Parent : 0000005A\r
-[18Eh 0398 4] ACPI Processor ID : 00000007\r
-[192h 0402 4] Private Resource Number : 00000002\r
-[196h 0406 4] Private Resource : 0000008E\r
-[19Ah 0410 4] Private Resource : 000000A6\r
-\r
-Raw Table Data: Length 414 (0x19E)\r
-\r
- 0000: 50 50 54 54 9E 01 00 00 01 FB 51 43 4F 4D 20 20 // PPTT......QCOM \r
- 0010: 51 43 4F 4D 45 44 4B 32 50 08 00 00 49 4E 54 4C // QCOMEDK2P...INTL\r
- 0020: 28 05 20 20 01 18 00 00 00 00 00 00 00 00 00 00 // (. ............\r
- 0030: 00 00 00 00 00 00 00 00 00 00 00 00 02 1E 00 00 // ................\r
- 0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................\r
- 0050: 00 00 00 00 00 00 00 00 00 00 00 1C 00 00 01 00 // ................\r
- 0060: 00 00 00 00 00 00 00 00 00 00 02 00 00 00 24 00 // ..............$.\r
- 0070: 00 00 3C 00 00 00 01 18 00 00 00 00 00 00 00 00 // ..<.............\r
- 0080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 18 // ................\r
- 0090: 00 00 00 00 00 00 76 00 00 00 00 00 00 00 00 00 // ......v.........\r
- 00A0: 00 00 00 00 00 00 01 18 00 00 00 00 00 00 76 00 // ..............v.\r
- 00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1C // ................\r
- 00C0: 00 00 02 00 00 00 5A 00 00 00 00 00 00 00 02 00 // ......Z.........\r
- 00D0: 00 00 8E 00 00 00 A6 00 00 00 00 1C 00 00 02 00 // ................\r
- 00E0: 00 00 5A 00 00 00 01 00 00 00 02 00 00 00 8E 00 // ..Z.............\r
- 00F0: 00 00 A6 00 00 00 00 1C 00 00 02 00 00 00 5A 00 // ..............Z.\r
- 0100: 00 00 02 00 00 00 02 00 00 00 8E 00 00 00 A6 00 // ................\r
- 0110: 00 00 00 1C 00 00 02 00 00 00 5A 00 00 00 03 00 // ..........Z.....\r
- 0120: 00 00 02 00 00 00 8E 00 00 00 A6 00 00 00 00 1C // ................\r
- 0130: 00 00 02 00 00 00 5A 00 00 00 04 00 00 00 02 00 // ......Z.........\r
- 0140: 00 00 8E 00 00 00 A6 00 00 00 00 1C 00 00 02 00 // ................\r
- 0150: 00 00 5A 00 00 00 05 00 00 00 02 00 00 00 8E 00 // ..Z.............\r
- 0160: 00 00 A6 00 00 00 00 1C 00 00 02 00 00 00 5A 00 // ..............Z.\r
- 0170: 00 00 06 00 00 00 02 00 00 00 8E 00 00 00 A6 00 // ................\r
- 0180: 00 00 00 1C 00 00 02 00 00 00 5A 00 00 00 07 00 // ..........Z.....\r
- 0190: 00 00 02 00 00 00 8E 00 00 00 A6 00 00 00 // ..............\r
+++ /dev/null
-\ 2B¹7®\7fE\91L¡\96Ùf\9fÓG£\ 2|Þa\9e'\99(O\9f=2\a\ 5Ø\18\ 1\ 3\b
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-\ 2i\ 4v°\f\97zH¤µ(Û{EÎñ\ 2ÐÇåô9ÒËGªÍ\7ffïv28\ 2E\z\15²!ÅCº|\82/î_å\99\ 2\8e\b\97ëßÏÆI¾KÙ\ 6¥²\ e\86\ 3\ 3\ 3\b
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-\ 2i\ 4v°\f\97zH¤µ(Û{EÎñ\ 2ÐÇåô9ÒËGªÍ\7ffïv28\ 2E\z\15²!ÅCº|\82/î_å\99\ 2\8e\b\97ëßÏÆI¾KÙ\ 6¥²\ e\86\ 3\ 3\ 3\b
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-\ 2i\ 4v°\f\97zH¤µ(Û{EÎñ\ 2ÐÇåô9ÒËGªÍ\7ffïv28\ 2E\z\15²!ÅCº|\82/î_å\99\ 2\8e\b\97ëßÏÆI¾KÙ\ 6¥²\ e\86\ 3\ 3\ 3\b
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-\ 2i\ 4v°\f\97zH¤µ(Û{EÎñ\ 2ÐÇåô9ÒËGªÍ\7ffïv28\ 2E\z\15²!ÅCº|\82/î_å\99\ 2\8e\b\97ëßÏÆI¾KÙ\ 6¥²\ e\86\ 3\ 3\ 3\b
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\ No newline at end of file
+++ /dev/null
-\ 2i\ 4v°\f\97zH¤µ(Û{EÎñ\ 2ÐÇåô9ÒËGªÍ\7ffïv28\ 2E\z\15²!ÅCº|\82/î_å\99\ 2\8e\b\97ëßÏÆI¾KÙ\ 6¥²\ e\86\ 3\ 3\ 3\b
\ No newline at end of file
+++ /dev/null
-\ 6\b
\ No newline at end of file
+++ /dev/null
-\ 6\b
\ No newline at end of file
+++ /dev/null
-\ 6\b
\ No newline at end of file
+++ /dev/null
-\ 6\b
\ No newline at end of file
+++ /dev/null
-\ 2ÐÇåô9ÒËGªÍ\7ffïv28\b
\ No newline at end of file
SECTION RAW = sdm845Pkg/AcpiTables/testing/MCFG.aml
SECTION RAW = sdm845Pkg/AcpiTables/testing/MADT.aml
SECTION RAW = sdm845Pkg/AcpiTables/testing/PPTT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/TPM2.aml
+ # SECTION RAW = sdm845Pkg/AcpiTables/testing/TPM2.aml
SECTION UI = "AcpiTables"
}
+++ /dev/null
-#
-# Copyright (c) 2018, Linaro Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-################################################################################
-#
-# FD Section
-# The [FD] Section is made up of the definition statements and a
-# description of what goes into the Flash Device Image. Each FD section
-# defines one flash "device" image. A flash device image may be one of
-# the following: Removable media bootable image (like a boot floppy
-# image,) an Option ROM image (that would be "flashed" into an add-in
-# card,) a System "Flash" image (that would be burned into a system's
-# flash) or an Update ("Capsule") image that will be used to update and
-# existing system flash.
-#
-################################################################################
-
-[FD.sdm845Pkg_UEFI]
-BaseAddress = 0xd0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
-Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
-ErasePolarity = 1
-
-# This one is tricky, it must be: BlockSize * NumBlocks = Size
-BlockSize = 0x00001000
-NumBlocks = 0x200
-
-################################################################################
-#
-# Following are lists of FD Region layout which correspond to the locations of different
-# images within the flash device.
-#
-# Regions must be defined in ascending order and may not overlap.
-#
-# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
-# the pipe "|" character, followed by the size of the region, also in hex with the leading
-# "0x" characters. Like:
-# Offset|Size
-# PcdOffsetCName|PcdSizeCName
-# RegionType <FV, DATA, or FILE>
-#
-################################################################################
-
-# from ArmVirtPkg/ArmVirtQemuKernel.fdf
-#
-# Implement the Linux kernel header layout so that the loader will identify
-# it as something bootable, and execute it with a FDT pointer in x0 or r2.
-#
-0x00000000|0x00008000
-DATA = {
- 0x01, 0x00, 0x00, 0x10, # code0: adr x1, .
- 0xff, 0x1f, 0x00, 0x14, # code1: b 0x8000
- 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, # text_offset: 512 KB
- 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, # image_size: 2 MB
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # flags
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res2
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res3
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res4
- 0x41, 0x52, 0x4d, 0x64, # magic: "ARM\x64"
- 0x00, 0x00, 0x00, 0x00 # res5
-}
-
-0x00008000|0x001f8000
-gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
-FV = FVMAIN_COMPACT
-
-
-################################################################################
-#
-# FV Section
-#
-# [FV] section is used to define what components or modules are placed within a flash
-# device file. This section also defines order the components and modules are positioned
-# within the image. The [FV] section consists of define statements, set statements and
-# module statements.
-#
-################################################################################
-
-[FV.FvMain]
-BlockSize = 0x40
-NumBlocks = 0 # This FV gets compressed so make it just big enough
-FvAlignment = 8 # FV alignment and FV attributes setting.
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-
- APRIORI DXE {
-
-
- #
- # PI DXE Drivers producing Architectural Protocols (EFI Services)
- #
- INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
- INF MdeModulePkg/Core/Dxe/DxeMain.inf
- INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
- INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
- INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
- INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
- INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
- INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
- INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
- INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
- INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-
- #
- # FAT filesystem + GPT/MBR partitioning
- #
- INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
- INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
- INF FatPkg/EnhancedFatDxe/Fat.inf
- INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
- INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
-
- INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
- INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
- INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
- INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
- INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
- INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
-
- INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
- INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
- INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
-
-
-
- FILE DRIVER = 9A5163E7-5C29-453F-825C-837A46A81E15 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.efi
- SECTION UI = "SerialDxe"
- }
-
- FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.efi
- SECTION UI = "SmemDxe"
- }
-
- FILE DRIVER = 8E9BD160-B184-11DF-94E2-0800200C9A66 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALSys/DALSys.depex
- SECTION PE32 = sdm845Pkg/Binary/845/DALSys/DALSys.efi
- SECTION UI = "DALSys"
- }
-
- FILE DRIVER = 8681CC5A-0DF6-441E-B4B8-E915C538F067 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.depex
- SECTION PE32 = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.efi
- SECTION UI = "HWIODxeDriver"
- }
-
- FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.efi
- SECTION UI = "ChipInfo"
- }
-
- FILE DRIVER = B105211B-BBBD-4ADD-A3B0-D1CF4A52154C {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.depex
- SECTION PE32 = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.efi
- SECTION UI = "PlatformInfoDxeDriver"
- }
-
- FILE DRIVER = 9A00771F-36D4-4DD5-8916-C48ED9B16B86 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.depex
- SECTION PE32 = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.efi
- SECTION UI = "HALIOMMU"
- }
-
- FILE DRIVER = E43128A8-8692-42B6-8AFA-676158578D18 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.efi
- SECTION UI = "ULogDxe"
- }
-
- FILE DRIVER = ABA01FF8-2CCB-4E12-8B2E-CD3F4A742993 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.efi
- SECTION UI = "CmdDbDxe"
- }
-
- FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219711 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.efi
- SECTION UI = "NpaDxe"
- }
-
- FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219766 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.efi
- SECTION UI = "RpmhDxe"
- }
-
- FILE DRIVER = B43C22DB-6333-490C-872D-0A73439059FD {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.efi
- SECTION UI = "PdcDxe"
- }
-
- FILE DRIVER = 4DB5DEA6-5302-4D1A-8A82-677A683B0D29 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.efi
- SECTION UI = "ClockDxe"
- }
-
- FILE DRIVER = 1B52138D-3FA3-4E50-B958-20887353F809 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.efi
- SECTION UI = "CPRDxe"
- }
-
- FILE DRIVER = AF9763A2-033B-4109-8E17-56A98D380C92 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.depex
- SECTION PE32 = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.efi
- SECTION UI = "DALTLMM"
- }
-
- FILE DRIVER = 04DE8591-D2B3-4077-BBBE-B12070094EB6 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/I2C/I2C.depex
- SECTION PE32 = sdm845Pkg/Binary/845/I2C/I2C.efi
- SECTION UI = "I2C"
- }
-
- FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SPMI/SPMI.depex
- SECTION PE32 = sdm845Pkg/Binary/845/SPMI/SPMI.efi
- SECTION UI = "SPMI"
- }
-
- FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.efi
- SECTION UI = "PmicDxe"
- }
-
- FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi
- SECTION UI = "UsbPwrCtrlDxe"
- }
-
- FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi
- SECTION UI = "UsbfnDwc3Dxe"
- }
-
- FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.efi
- SECTION UI = "UsbConfigDxe"
- }
-
- FILE DRIVER = 0A134F0E-075E-40B3-9C63-3B3906804663 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.efi
- SECTION UI = "UsbInitDxe"
- }
-
- FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.efi
- SECTION UI = "UsbDeviceDxe"
- }
-
- FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.efi
- SECTION UI = "ButtonsDxe"
- }
-
-
- INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
-
-}
-
- INF MdeModulePkg/Core/Dxe/DxeMain.inf
-
-
- #
- # PI DXE Drivers producing Architectural Protocols (EFI Services)
- #
- INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
- INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
- INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
- INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
- INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
- INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
- INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
- INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
- INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-
-
-
- #
- # Multiple Console IO support
- #
- INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
- INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
- INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
- INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
-
-
- INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
- INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
-
- INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
-
- FILE DRIVER = 9A5163E7-5C29-453F-825C-837A46A81E15 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.efi
- SECTION UI = "SerialDxe"
- }
-
- FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.efi
- SECTION UI = "SmemDxe"
- }
-
- FILE DRIVER = 8E9BD160-B184-11DF-94E2-0800200C9A66 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALSys/DALSys.depex
- SECTION PE32 = sdm845Pkg/Binary/845/DALSys/DALSys.efi
- SECTION UI = "DALSys"
- }
-
- FILE DRIVER = 8681CC5A-0DF6-441E-B4B8-E915C538F067 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.depex
- SECTION PE32 = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.efi
- SECTION UI = "HWIODxeDriver"
- }
-
- FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.efi
- SECTION UI = "ChipInfo"
- }
-
- FILE DRIVER = B105211B-BBBD-4ADD-A3B0-D1CF4A52154C {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.depex
- SECTION PE32 = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.efi
- SECTION UI = "PlatformInfoDxeDriver"
- }
-
- FILE DRIVER = 9A00771F-36D4-4DD5-8916-C48ED9B16B86 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.depex
- SECTION PE32 = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.efi
- SECTION UI = "HALIOMMU"
- }
-
- FILE DRIVER = E43128A8-8692-42B6-8AFA-676158578D18 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.efi
- SECTION UI = "ULogDxe"
- }
-
- FILE DRIVER = ABA01FF8-2CCB-4E12-8B2E-CD3F4A742993 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.efi
- SECTION UI = "CmdDbDxe"
- }
-
- FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219711 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.efi
- SECTION UI = "NpaDxe"
- }
-
- FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219766 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.efi
- SECTION UI = "RpmhDxe"
- }
-
- FILE DRIVER = B43C22DB-6333-490C-872D-0A73439059FD {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.efi
- SECTION UI = "PdcDxe"
- }
-
- FILE DRIVER = 4DB5DEA6-5302-4D1A-8A82-677A683B0D29 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.efi
- SECTION UI = "ClockDxe"
- }
-
- FILE DRIVER = 1B52138D-3FA3-4E50-B958-20887353F809 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.efi
- SECTION UI = "CPRDxe"
- }
-
- FILE DRIVER = AF9763A2-033B-4109-8E17-56A98D380C92 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.depex
- SECTION PE32 = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.efi
- SECTION UI = "DALTLMM"
- }
-
- FILE DRIVER = 04DE8591-D2B3-4077-BBBE-B12070094EB6 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/I2C/I2C.depex
- SECTION PE32 = sdm845Pkg/Binary/845/I2C/I2C.efi
- SECTION UI = "I2C"
- }
-
- FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SPMI/SPMI.depex
- SECTION PE32 = sdm845Pkg/Binary/845/SPMI/SPMI.efi
- SECTION UI = "SPMI"
- }
-
- FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.efi
- SECTION UI = "PmicDxe"
- }
-
- FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi
- SECTION UI = "UsbPwrCtrlDxe"
- }
-
- FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi
- SECTION UI = "UsbfnDwc3Dxe"
- }
-
- FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.efi
- SECTION UI = "UsbConfigDxe"
- }
-
- FILE DRIVER = 0A134F0E-075E-40B3-9C63-3B3906804663 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.efi
- SECTION UI = "UsbInitDxe"
- }
-
- FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.efi
- SECTION UI = "UsbDeviceDxe"
- }
-
- FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.efi
- SECTION UI = "ButtonsDxe"
- }
-
- FILE DRIVER = 5af77f10-90df-4e7e-8325-a17ec09d5443 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbMsdDxe/UsbMsdDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbMsdDxe/UsbMsdDxe.efi
- SECTION UI = "UsbMsdDxe"
- }
-
- FILE DRIVER = 0d35cd8e-97ea-4f9a-96af-0f0d89f76567 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UFSDxe/UFSDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UFSDxe/UFSDxe.efi
- SECTION UI = "UFSDxe"
- }
-
-
- #
- # GPIO
- #
-
- #
- # Virtual Keyboard
- #
- INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf
-
- INF sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.inf
- INF sdm845Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf
-
-
-
-
-
- #
- # USB Host Support
- #
- INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
-
- #
- # USB Mass Storage Support
- #
- INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
-
- #
- # USB Peripheral Support
- #
- INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf
-
- #
- # Fastboot
- #
- INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf
-
- #
- # FAT filesystem + GPT/MBR partitioning
- #
- INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
- INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
- INF FatPkg/EnhancedFatDxe/Fat.inf
- INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
-
- INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
-
- INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
-
- #
- # ACPI Support
- #
- INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
- INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
- INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
- # INF RuleOverride = ACPITABLE sdm845Pkg/AcpiTables/AcpiTables.inf
-
- FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD {
-
-
- SECTION RAW = sdm845Pkg/AcpiTables/testing/DBG2.aml
- SECTION RAW = sdm845Pkg/AcpiTables/845/DSDT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/CSRT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/FADT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/FACS.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/GTDT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/IORT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/MCFG.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/MADT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/PPTT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/TPM2.aml
- SECTION UI = "AcpiTables"
- }
-
- #
- # SMBIOS Support
- #
- INF sdm845Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
- INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
-
- #
- # UEFI applications
- #
- INF ShellPkg/Application/Shell/Shell.inf
-!ifdef $(INCLUDE_TFTP_COMMAND)
- INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
-!endif #$(INCLUDE_TFTP_COMMAND)
-
- #
- # Bds
- #
- INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf
- INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
- INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
- INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
- INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
- INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
- INF MdeModulePkg/Application/UiApp/UiApp.inf
- INF sdm845Pkg/Drivers/LogoDxe/LogoDxe.inf
-
-[FV.FVMAIN_COMPACT]
-FvAlignment = 8
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-
- INF ArmPlatformPkg/PrePi/PeiUniCore.inf
-
- FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
- SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
- SECTION FV_IMAGE = FVMAIN
- }
- }
-
-!include sdm845Pkg/CommonFdf.fdf.inc
-
-
+++ /dev/null
-#
-# Copyright (c) 2018, Linaro Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-################################################################################
-#
-# FD Section
-# The [FD] Section is made up of the definition statements and a
-# description of what goes into the Flash Device Image. Each FD section
-# defines one flash "device" image. A flash device image may be one of
-# the following: Removable media bootable image (like a boot floppy
-# image,) an Option ROM image (that would be "flashed" into an add-in
-# card,) a System "Flash" image (that would be burned into a system's
-# flash) or an Update ("Capsule") image that will be used to update and
-# existing system flash.
-#
-################################################################################
-
-[FD.sdm845Pkg_UEFI]
-BaseAddress = 0xd0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
-Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
-ErasePolarity = 1
-
-# This one is tricky, it must be: BlockSize * NumBlocks = Size
-BlockSize = 0x00001000
-NumBlocks = 0x200
-
-################################################################################
-#
-# Following are lists of FD Region layout which correspond to the locations of different
-# images within the flash device.
-#
-# Regions must be defined in ascending order and may not overlap.
-#
-# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
-# the pipe "|" character, followed by the size of the region, also in hex with the leading
-# "0x" characters. Like:
-# Offset|Size
-# PcdOffsetCName|PcdSizeCName
-# RegionType <FV, DATA, or FILE>
-#
-################################################################################
-
-# from ArmVirtPkg/ArmVirtQemuKernel.fdf
-#
-# Implement the Linux kernel header layout so that the loader will identify
-# it as something bootable, and execute it with a FDT pointer in x0 or r2.
-#
-0x00000000|0x00008000
-DATA = {
- 0x01, 0x00, 0x00, 0x10, # code0: adr x1, .
- 0xff, 0x1f, 0x00, 0x14, # code1: b 0x8000
- 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, # text_offset: 512 KB
- 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, # image_size: 2 MB
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # flags
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res2
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res3
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res4
- 0x41, 0x52, 0x4d, 0x64, # magic: "ARM\x64"
- 0x00, 0x00, 0x00, 0x00 # res5
-}
-
-0x00008000|0x001f8000
-gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
-FV = FVMAIN_COMPACT
-
-
-################################################################################
-#
-# FV Section
-#
-# [FV] section is used to define what components or modules are placed within a flash
-# device file. This section also defines order the components and modules are positioned
-# within the image. The [FV] section consists of define statements, set statements and
-# module statements.
-#
-################################################################################
-
-[FV.FvMain]
-BlockSize = 0x40
-NumBlocks = 0 # This FV gets compressed so make it just big enough
-FvAlignment = 8 # FV alignment and FV attributes setting.
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-
- APRIORI DXE {
- INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
- }
-
- INF MdeModulePkg/Core/Dxe/DxeMain.inf
-
- #
- # PI DXE Drivers producing Architectural Protocols (EFI Services)
- #
- INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
- INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
- INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
- INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
- INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
- INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
- INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
- INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-
- FILE DRIVER = af9763a2-033b-4109-8e17-56a98d380c92 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/HWIODxeDriver/HWIODxeDriver.depex
- SECTION PE32 = sdm845Pkg/Binary/dipper/HWIODxeDriver/HWIODxeDriver.efi
- SECTION UI = "HWIODxeDriver"
- }
-
- FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/PmicDxe/PmicDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/dipper/PmicDxe/PmicDxe.efi
- SECTION UI = "PmicDxe"
- }
-
- FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/ButtonsDxe/ButtonsDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/dipper/ButtonsDxe/ButtonsDxe.efi
- SECTION UI = "ButtonsDxe"
- }
-
- #
- # Multiple Console IO support
- #
- INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
- INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
- INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
- INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
- INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
-
- INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
- INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
-
- INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
-
- INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
-
- FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/UsbDeviceDxe/UsbDeviceDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/dipper/UsbDeviceDxe/UsbDeviceDxe.efi
- SECTION UI = "UsbDeviceDxe"
- }
-
- FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/dipper/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi
- SECTION UI = "UsbPwrCtrlDxe"
- }
-
- FILE DRIVER = 5af77f10-90df-4e7e-8325-a17ec09d5443 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/UsbMsdDxe/UsbMsdDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/dipper/UsbMsdDxe/UsbMsdDxe.efi
- SECTION UI = "UsbMsdDxe"
- }
-
- FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex
- SECTION PE32 = sdm845Pkg/Binary/dipper/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi
- SECTION UI = "UsbfnDwc3Dxe"
- }
-
- FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/UsbConfigDxe/UsbConfigDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/dipper/UsbConfigDxe/UsbConfigDxe.efi
- SECTION UI = "UsbDeviceDxe"
- }
-
- #
- # GPIO
- #
-
- #
- # Virtual Keyboard
- #
- INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf
-
- INF sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.inf
- INF sdm845Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf
-
- FILE DRIVER = 0d35cd8e-97ea-4f9a-96af-0f0d89f76567 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/UFSDxe/UFSDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/dipper/UFSDxe/UFSDxe.efi
- SECTION UI = "UFSDxe"
- }
- FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/SPMI/SPMI.depex
- SECTION PE32 = sdm845Pkg/Binary/dipper/SPMI/SPMI.efi
- SECTION UI = "SPMI"
- }
-
- FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/SmemDxe/SmemDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/dipper/SmemDxe/SmemDxe.efi
- SECTION UI = "SmemDxe"
- }
-
- FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/ChipInfo/ChipInfo.depex
- SECTION PE32 = sdm845Pkg/Binary/dipper/ChipInfo/ChipInfo.efi
- SECTION UI = "ChipInfo"
- }
-
- FILE DRIVER = 7a32bd23-f735-4f57-aa1a-447d2fe3be0d {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/dipper/SPI/SPI.depex
- SECTION PE32 = sdm845Pkg/Binary/dipper/SPI/SPI.efi
- SECTION UI = "SPI"
- }
-
-
- #
- # USB Host Support
- #
- INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
-
- #
- # USB Mass Storage Support
- #
- INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
-
- #
- # USB Peripheral Support
- #
- INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf
-
- #
- # Fastboot
- #
- INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf
-
- #
- # FAT filesystem + GPT/MBR partitioning
- #
- INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
- INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
- INF FatPkg/EnhancedFatDxe/Fat.inf
- INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
-
- INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
-
- INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
-
- #
- # ACPI Support
- #
- INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
- INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
- INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
- # INF RuleOverride = ACPITABLE sdm845Pkg/AcpiTables/AcpiTables.inf
-
- FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD {
- # SECTION RAW = sdm845Pkg/AcpiTables/minimal/DBG2.aml
- # SECTION RAW = sdm845Pkg/AcpiTables/minimal/DSDT.aml
- # SECTION RAW = sdm845Pkg/AcpiTables/minimal/FACP.aml
- # SECTION RAW = sdm845Pkg/AcpiTables/minimal/GTDT.aml
- # SECTION RAW = sdm845Pkg/AcpiTables/minimal/APIC.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/DBG2.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/DSDT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/CSRT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/FADT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/FACS.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/GTDT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/IORT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/MCFG.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/MADT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/PPTT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/TPM2.aml
- SECTION UI = "AcpiTables"
- }
-
- #
- # SMBIOS Support
- #
- INF sdm845Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
- INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
-
- #
- # UEFI applications
- #
- INF ShellPkg/Application/Shell/Shell.inf
-!ifdef $(INCLUDE_TFTP_COMMAND)
- INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
-!endif #$(INCLUDE_TFTP_COMMAND)
-
- #
- # Bds
- #
- INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf
- INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
- INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
- INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
- INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
- INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
- INF MdeModulePkg/Application/UiApp/UiApp.inf
- INF sdm845Pkg/Drivers/LogoDxe/LogoDxe.inf
-
-[FV.FVMAIN_COMPACT]
-FvAlignment = 8
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-
- INF ArmPlatformPkg/PrePi/PeiUniCore.inf
-
- FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
- SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
- SECTION FV_IMAGE = FVMAIN
- }
- }
-
-!include sdm845Pkg/CommonFdf.fdf.inc
+++ /dev/null
-
-#
-# Copyright (c) 2018, Linaro Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-################################################################################
-#
-# FD Section
-# The [FD] Section is made up of the definition statements and a
-# description of what goes into the Flash Device Image. Each FD section
-# defines one flash "device" image. A flash device image may be one of
-# the following: Removable media bootable image (like a boot floppy
-# image,) an Option ROM image (that would be "flashed" into an add-in
-# card,) a System "Flash" image (that would be burned into a system's
-# flash) or an Update ("Capsule") image that will be used to update and
-# existing system flash.
-#
-################################################################################
-
-[FD.sdm845Pkg_UEFI]
-BaseAddress = 0xd0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
-Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
-ErasePolarity = 1
-
-# This one is tricky, it must be: BlockSize * NumBlocks = Size
-BlockSize = 0x00001000
-NumBlocks = 0x200
-
-################################################################################
-#
-# Following are lists of FD Region layout which correspond to the locations of different
-# images within the flash device.
-#
-# Regions must be defined in ascending order and may not overlap.
-#
-# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
-# the pipe "|" character, followed by the size of the region, also in hex with the leading
-# "0x" characters. Like:
-# Offset|Size
-# PcdOffsetCName|PcdSizeCName
-# RegionType <FV, DATA, or FILE>
-#
-################################################################################
-
-# from ArmVirtPkg/ArmVirtQemuKernel.fdf
-#
-# Implement the Linux kernel header layout so that the loader will identify
-# it as something bootable, and execute it with a FDT pointer in x0 or r2.
-#
-0x00000000|0x00008000
-DATA = {
- 0x01, 0x00, 0x00, 0x10, # code0: adr x1, .
- 0xff, 0x1f, 0x00, 0x14, # code1: b 0x8000
- 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, # text_offset: 512 KB
- 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, # image_size: 2 MB
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # flags
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res2
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res3
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res4
- 0x41, 0x52, 0x4d, 0x64, # magic: "ARM\x64"
- 0x00, 0x00, 0x00, 0x00 # res5
-}
-
-0x00008000|0x001f8000
-gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
-FV = FVMAIN_COMPACT
-
-
-################################################################################
-#
-# FV Section
-#
-# [FV] section is used to define what components or modules are placed within a flash
-# device file. This section also defines order the components and modules are positioned
-# within the image. The [FV] section consists of define statements, set statements and
-# module statements.
-#
-################################################################################
-
-[FV.FvMain]
-BlockSize = 0x40
-NumBlocks = 0 # This FV gets compressed so make it just big enough
-FvAlignment = 8 # FV alignment and FV attributes setting.
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-
- APRIORI DXE {
-
-
- #
- # PI DXE Drivers producing Architectural Protocols (EFI Services)
- #
- INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
- INF MdeModulePkg/Core/Dxe/DxeMain.inf
- INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
- INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
- INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
- INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
- INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
- INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
- INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
- INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
- INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-
- #
- # FAT filesystem + GPT/MBR partitioning
- #
- INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
- INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
- INF FatPkg/EnhancedFatDxe/Fat.inf
- INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
- INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
-
- INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
- INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
- INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
- INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
- INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
- INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
-
- INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
- INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
- INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
-
-
-
- FILE DRIVER = 9A5163E7-5C29-453F-825C-837A46A81E15 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.efi
- SECTION UI = "SerialDxe"
- }
-
- FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.efi
- SECTION UI = "SmemDxe"
- }
-
- FILE DRIVER = 8E9BD160-B184-11DF-94E2-0800200C9A66 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALSys/DALSys.depex
- SECTION PE32 = sdm845Pkg/Binary/845/DALSys/DALSys.efi
- SECTION UI = "DALSys"
- }
-
- FILE DRIVER = 8681CC5A-0DF6-441E-B4B8-E915C538F067 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.depex
- SECTION PE32 = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.efi
- SECTION UI = "HWIODxeDriver"
- }
-
- FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.efi
- SECTION UI = "ChipInfo"
- }
-
- FILE DRIVER = B105211B-BBBD-4ADD-A3B0-D1CF4A52154C {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.depex
- SECTION PE32 = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.efi
- SECTION UI = "PlatformInfoDxeDriver"
- }
-
- FILE DRIVER = 9A00771F-36D4-4DD5-8916-C48ED9B16B86 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.depex
- SECTION PE32 = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.efi
- SECTION UI = "HALIOMMU"
- }
-
- FILE DRIVER = E43128A8-8692-42B6-8AFA-676158578D18 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.efi
- SECTION UI = "ULogDxe"
- }
-
- FILE DRIVER = ABA01FF8-2CCB-4E12-8B2E-CD3F4A742993 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.efi
- SECTION UI = "CmdDbDxe"
- }
-
- FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219711 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.efi
- SECTION UI = "NpaDxe"
- }
-
- FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219766 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.efi
- SECTION UI = "RpmhDxe"
- }
-
- FILE DRIVER = B43C22DB-6333-490C-872D-0A73439059FD {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.efi
- SECTION UI = "PdcDxe"
- }
-
- FILE DRIVER = 4DB5DEA6-5302-4D1A-8A82-677A683B0D29 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.efi
- SECTION UI = "ClockDxe"
- }
-
- FILE DRIVER = 1B52138D-3FA3-4E50-B958-20887353F809 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.efi
- SECTION UI = "CPRDxe"
- }
-
- FILE DRIVER = AF9763A2-033B-4109-8E17-56A98D380C92 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.depex
- SECTION PE32 = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.efi
- SECTION UI = "DALTLMM"
- }
-
- FILE DRIVER = 04DE8591-D2B3-4077-BBBE-B12070094EB6 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/I2C/I2C.depex
- SECTION PE32 = sdm845Pkg/Binary/845/I2C/I2C.efi
- SECTION UI = "I2C"
- }
-
- FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SPMI/SPMI.depex
- SECTION PE32 = sdm845Pkg/Binary/845/SPMI/SPMI.efi
- SECTION UI = "SPMI"
- }
-
- FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.efi
- SECTION UI = "PmicDxe"
- }
-
- FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi
- SECTION UI = "UsbPwrCtrlDxe"
- }
-
- FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi
- SECTION UI = "UsbfnDwc3Dxe"
- }
-
- FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.efi
- SECTION UI = "UsbConfigDxe"
- }
-
- FILE DRIVER = 0A134F0E-075E-40B3-9C63-3B3906804663 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.efi
- SECTION UI = "UsbInitDxe"
- }
-
- FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.efi
- SECTION UI = "UsbDeviceDxe"
- }
-
- FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.efi
- SECTION UI = "ButtonsDxe"
- }
-
-
- INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
-
-}
-
- INF MdeModulePkg/Core/Dxe/DxeMain.inf
-
-
- #
- # PI DXE Drivers producing Architectural Protocols (EFI Services)
- #
- INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
- INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
- INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
- INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
- INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
- INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
- INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
- INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
- INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-
-
-
- #
- # Multiple Console IO support
- #
- INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
- INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
- INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
- INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
-
-
- INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
- INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
-
- INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
-
- FILE DRIVER = 9A5163E7-5C29-453F-825C-837A46A81E15 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.efi
- SECTION UI = "SerialDxe"
- }
-
- FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.efi
- SECTION UI = "SmemDxe"
- }
-
- FILE DRIVER = 8E9BD160-B184-11DF-94E2-0800200C9A66 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALSys/DALSys.depex
- SECTION PE32 = sdm845Pkg/Binary/845/DALSys/DALSys.efi
- SECTION UI = "DALSys"
- }
-
- FILE DRIVER = 8681CC5A-0DF6-441E-B4B8-E915C538F067 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.depex
- SECTION PE32 = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.efi
- SECTION UI = "HWIODxeDriver"
- }
-
- FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.efi
- SECTION UI = "ChipInfo"
- }
-
- FILE DRIVER = B105211B-BBBD-4ADD-A3B0-D1CF4A52154C {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.depex
- SECTION PE32 = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.efi
- SECTION UI = "PlatformInfoDxeDriver"
- }
-
- FILE DRIVER = 9A00771F-36D4-4DD5-8916-C48ED9B16B86 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.depex
- SECTION PE32 = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.efi
- SECTION UI = "HALIOMMU"
- }
-
- FILE DRIVER = E43128A8-8692-42B6-8AFA-676158578D18 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.efi
- SECTION UI = "ULogDxe"
- }
-
- FILE DRIVER = ABA01FF8-2CCB-4E12-8B2E-CD3F4A742993 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.efi
- SECTION UI = "CmdDbDxe"
- }
-
- FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219711 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.efi
- SECTION UI = "NpaDxe"
- }
-
- FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219766 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.efi
- SECTION UI = "RpmhDxe"
- }
-
- FILE DRIVER = B43C22DB-6333-490C-872D-0A73439059FD {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.efi
- SECTION UI = "PdcDxe"
- }
-
- FILE DRIVER = 4DB5DEA6-5302-4D1A-8A82-677A683B0D29 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.efi
- SECTION UI = "ClockDxe"
- }
-
- FILE DRIVER = 1B52138D-3FA3-4E50-B958-20887353F809 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.efi
- SECTION UI = "CPRDxe"
- }
-
- FILE DRIVER = AF9763A2-033B-4109-8E17-56A98D380C92 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.depex
- SECTION PE32 = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.efi
- SECTION UI = "DALTLMM"
- }
-
- FILE DRIVER = 04DE8591-D2B3-4077-BBBE-B12070094EB6 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/I2C/I2C.depex
- SECTION PE32 = sdm845Pkg/Binary/845/I2C/I2C.efi
- SECTION UI = "I2C"
- }
-
- FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SPMI/SPMI.depex
- SECTION PE32 = sdm845Pkg/Binary/845/SPMI/SPMI.efi
- SECTION UI = "SPMI"
- }
-
- FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.efi
- SECTION UI = "PmicDxe"
- }
-
- FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi
- SECTION UI = "UsbPwrCtrlDxe"
- }
-
- FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi
- SECTION UI = "UsbfnDwc3Dxe"
- }
-
- FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.efi
- SECTION UI = "UsbConfigDxe"
- }
-
- FILE DRIVER = 0A134F0E-075E-40B3-9C63-3B3906804663 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.efi
- SECTION UI = "UsbInitDxe"
- }
-
- FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.efi
- SECTION UI = "UsbDeviceDxe"
- }
-
- FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.efi
- SECTION UI = "ButtonsDxe"
- }
-
- FILE DRIVER = 5af77f10-90df-4e7e-8325-a17ec09d5443 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbMsdDxe/UsbMsdDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbMsdDxe/UsbMsdDxe.efi
- SECTION UI = "UsbMsdDxe"
- }
-
- FILE DRIVER = 0d35cd8e-97ea-4f9a-96af-0f0d89f76567 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UFSDxe/UFSDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UFSDxe/UFSDxe.efi
- SECTION UI = "UFSDxe"
- }
-
- FILE DRIVER = F0D87C5E-4D5D-4FB5-939F-A6768AE8A309 {
- SECTION DXE_DEPEX = OnePlus6Pkg/Binary/enchilada/Synaptics/SynapticsTouchDxe.depex
- SECTION PE32 = OnePlus6Pkg/Binary/enchilada/Synaptics/SynapticsTouchDxe.efi
- SECTION UI = "SynapticsTouchDxe"
- }
-
- FILE DRIVER = F0D87C5E-4D5D-4FB5-939F-A6768AE8A310 {
- SECTION DXE_DEPEX = OnePlus6Pkg/Binary/enchilada/Synaptics/SynapticsTouchDeviceDxe.depex
- SECTION PE32 = OnePlus6Pkg/Binary/enchilada/Synaptics/SynapticsTouchDeviceDxe.efi
- SECTION UI = "SynapticsTouchDeviceDxe"
- }
-
-
- #
- # GPIO
- #
-
- #
- # Virtual Keyboard
- #
- INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf
-
- INF sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.inf
- INF sdm845Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf
-
-
-
-
-
- #
- # USB Host Support
- #
- INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
-
- #
- # USB Mass Storage Support
- #
- INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
-
- #
- # USB Peripheral Support
- #
- INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf
-
- #
- # Fastboot
- #
- INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf
-
- #
- # FAT filesystem + GPT/MBR partitioning
- #
- INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
- INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
- INF FatPkg/EnhancedFatDxe/Fat.inf
- INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
-
- INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
-
- INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
-
- #
- # ACPI Support
- #
- INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
- INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
- INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
- # INF RuleOverride = ACPITABLE sdm845Pkg/AcpiTables/AcpiTables.inf
-
- FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD {
-
-
- SECTION RAW = sdm845Pkg/AcpiTables/testing/DBG2.aml
- SECTION RAW = sdm845Pkg/AcpiTables/845/DSDT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/CSRT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/FADT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/FACS.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/GTDT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/IORT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/MCFG.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/MADT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/PPTT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/TPM2.aml
- SECTION UI = "AcpiTables"
- }
-
- #
- # SMBIOS Support
- #
- INF sdm845Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
- INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
-
- #
- # UEFI applications
- #
- INF ShellPkg/Application/Shell/Shell.inf
-!ifdef $(INCLUDE_TFTP_COMMAND)
- INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
-!endif #$(INCLUDE_TFTP_COMMAND)
-
- #
- # Bds
- #
- INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf
- INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
- INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
- INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
- INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
- INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
- INF MdeModulePkg/Application/UiApp/UiApp.inf
- INF sdm845Pkg/Drivers/LogoDxe/LogoDxe.inf
-
-[FV.FVMAIN_COMPACT]
-FvAlignment = 8
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-
- INF ArmPlatformPkg/PrePi/PeiUniCore.inf
-
- FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
- SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
- SECTION FV_IMAGE = FVMAIN
- }
- }
-
-!include sdm845Pkg/CommonFdf.fdf.inc
-
-
-© 2021 GitHub, Inc.
-Terms
-Privacy
-Security
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-Docs
-Contact GitHub
-Pricing
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-Training
-Blog
-About
+++ /dev/null
-#
-# Copyright (c) 2018, Linaro Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-################################################################################
-#
-# FD Section
-# The [FD] Section is made up of the definition statements and a
-# description of what goes into the Flash Device Image. Each FD section
-# defines one flash "device" image. A flash device image may be one of
-# the following: Removable media bootable image (like a boot floppy
-# image,) an Option ROM image (that would be "flashed" into an add-in
-# card,) a System "Flash" image (that would be burned into a system's
-# flash) or an Update ("Capsule") image that will be used to update and
-# existing system flash.
-#
-################################################################################
-
-[FD.sdm845Pkg_UEFI]
-BaseAddress = 0xd0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
-Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
-ErasePolarity = 1
-
-# This one is tricky, it must be: BlockSize * NumBlocks = Size
-BlockSize = 0x00001000
-NumBlocks = 0x200
-
-################################################################################
-#
-# Following are lists of FD Region layout which correspond to the locations of different
-# images within the flash device.
-#
-# Regions must be defined in ascending order and may not overlap.
-#
-# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
-# the pipe "|" character, followed by the size of the region, also in hex with the leading
-# "0x" characters. Like:
-# Offset|Size
-# PcdOffsetCName|PcdSizeCName
-# RegionType <FV, DATA, or FILE>
-#
-################################################################################
-
-# from ArmVirtPkg/ArmVirtQemuKernel.fdf
-#
-# Implement the Linux kernel header layout so that the loader will identify
-# it as something bootable, and execute it with a FDT pointer in x0 or r2.
-#
-0x00000000|0x00008000
-DATA = {
- 0x01, 0x00, 0x00, 0x10, # code0: adr x1, .
- 0xff, 0x1f, 0x00, 0x14, # code1: b 0x8000
- 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, # text_offset: 512 KB
- 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, # image_size: 2 MB
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # flags
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res2
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res3
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res4
- 0x41, 0x52, 0x4d, 0x64, # magic: "ARM\x64"
- 0x00, 0x00, 0x00, 0x00 # res5
-}
-
-0x00008000|0x001f8000
-gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
-FV = FVMAIN_COMPACT
-
-
-################################################################################
-#
-# FV Section
-#
-# [FV] section is used to define what components or modules are placed within a flash
-# device file. This section also defines order the components and modules are positioned
-# within the image. The [FV] section consists of define statements, set statements and
-# module statements.
-#
-################################################################################
-
-[FV.FvMain]
-BlockSize = 0x40
-NumBlocks = 0 # This FV gets compressed so make it just big enough
-FvAlignment = 8 # FV alignment and FV attributes setting.
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-
-APRIORI DXE {
-
- #
- # PI DXE Drivers producing Architectural Protocols (EFI Services)
- #
- INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
- INF MdeModulePkg/Core/Dxe/DxeMain.inf
- INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
- INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
- INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
- INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
- INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
- INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
- INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
- INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
- INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-
- #
- # FAT filesystem + GPT/MBR partitioning
- #
- INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
- INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
- INF FatPkg/EnhancedFatDxe/Fat.inf
- INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
- INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
-
- INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
- INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
- INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
- INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
- INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
- INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
-
- INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
- INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
- INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
-
- FILE DRIVER = 9A5163E7-5C29-453F-825C-837A46A81E15 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.efi
- SECTION UI = "SerialDxe"
- }
-
- FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.efi
- SECTION UI = "SmemDxe"
- }
-
- FILE DRIVER = 8E9BD160-B184-11DF-94E2-0800200C9A66 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALSys/DALSys.depex
- SECTION PE32 = sdm845Pkg/Binary/845/DALSys/DALSys.efi
- SECTION UI = "DALSys"
- }
-
- FILE DRIVER = 8681CC5A-0DF6-441E-B4B8-E915C538F067 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.depex
- SECTION PE32 = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.efi
- SECTION UI = "HWIODxeDriver"
- }
-
- FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.efi
- SECTION UI = "ChipInfo"
- }
-
- FILE DRIVER = B105211B-BBBD-4ADD-A3B0-D1CF4A52154C {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.depex
- SECTION PE32 = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.efi
- SECTION UI = "PlatformInfoDxeDriver"
- }
-
- FILE DRIVER = 9A00771F-36D4-4DD5-8916-C48ED9B16B86 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.depex
- SECTION PE32 = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.efi
- SECTION UI = "HALIOMMU"
- }
-
- FILE DRIVER = E43128A8-8692-42B6-8AFA-676158578D18 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.efi
- SECTION UI = "ULogDxe"
- }
-
- FILE DRIVER = ABA01FF8-2CCB-4E12-8B2E-CD3F4A742993 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.efi
- SECTION UI = "CmdDbDxe"
- }
-
- FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219711 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.efi
- SECTION UI = "NpaDxe"
- }
-
- FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219766 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.efi
- SECTION UI = "RpmhDxe"
- }
-
- FILE DRIVER = B43C22DB-6333-490C-872D-0A73439059FD {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.efi
- SECTION UI = "PdcDxe"
- }
-
- FILE DRIVER = 4DB5DEA6-5302-4D1A-8A82-677A683B0D29 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.efi
- SECTION UI = "ClockDxe"
- }
-
- FILE DRIVER = 1B52138D-3FA3-4E50-B958-20887353F809 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.efi
- SECTION UI = "CPRDxe"
- }
-
- FILE DRIVER = AF9763A2-033B-4109-8E17-56A98D380C92 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.depex
- SECTION PE32 = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.efi
- SECTION UI = "DALTLMM"
- }
-
- FILE DRIVER = 04DE8591-D2B3-4077-BBBE-B12070094EB6 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/I2C/I2C.depex
- SECTION PE32 = sdm845Pkg/Binary/845/I2C/I2C.efi
- SECTION UI = "I2C"
- }
-
- FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SPMI/SPMI.depex
- SECTION PE32 = sdm845Pkg/Binary/845/SPMI/SPMI.efi
- SECTION UI = "SPMI"
- }
-
- FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.efi
- SECTION UI = "PmicDxe"
- }
-
- FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi
- SECTION UI = "UsbPwrCtrlDxe"
- }
-
- FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi
- SECTION UI = "UsbfnDwc3Dxe"
- }
-
- FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.efi
- SECTION UI = "UsbConfigDxe"
- }
-
- FILE DRIVER = 0A134F0E-075E-40B3-9C63-3B3906804663 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.efi
- SECTION UI = "UsbInitDxe"
- }
-
- FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.efi
- SECTION UI = "UsbDeviceDxe"
- }
-
- FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.efi
- SECTION UI = "ButtonsDxe"
- }
-
- INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
-
-}
-
- INF MdeModulePkg/Core/Dxe/DxeMain.inf
-
- #
- # PI DXE Drivers producing Architectural Protocols (EFI Services)
- #
- INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
- INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
- INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
- INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
- INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
- INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
- INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
- INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
- INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-
- #
- # Multiple Console IO support
- #
- INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
- INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
- INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
- INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
-
- INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
- INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
-
- INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
-
- FILE DRIVER = 9A5163E7-5C29-453F-825C-837A46A81E15 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/SerialDxe/SerialDxe.efi
- SECTION UI = "SerialDxe"
- }
-
- FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/SmemDxe/SmemDxe.efi
- SECTION UI = "SmemDxe"
- }
-
- FILE DRIVER = 8E9BD160-B184-11DF-94E2-0800200C9A66 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALSys/DALSys.depex
- SECTION PE32 = sdm845Pkg/Binary/845/DALSys/DALSys.efi
- SECTION UI = "DALSys"
- }
-
- FILE DRIVER = 8681CC5A-0DF6-441E-B4B8-E915C538F067 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.depex
- SECTION PE32 = sdm845Pkg/Binary/845/HWIODxeDriver/HWIODxeDriver.efi
- SECTION UI = "HWIODxeDriver"
- }
-
- FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ChipInfo/ChipInfo.efi
- SECTION UI = "ChipInfo"
- }
-
- FILE DRIVER = B105211B-BBBD-4ADD-A3B0-D1CF4A52154C {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.depex
- SECTION PE32 = sdm845Pkg/Binary/845/PlatformInfoDxeDriver/PlatformInfoDxeDriver.efi
- SECTION UI = "PlatformInfoDxeDriver"
- }
-
- FILE DRIVER = 9A00771F-36D4-4DD5-8916-C48ED9B16B86 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.depex
- SECTION PE32 = sdm845Pkg/Binary/845/HALIOMMU/HALIOMMU.efi
- SECTION UI = "HALIOMMU"
- }
-
- FILE DRIVER = E43128A8-8692-42B6-8AFA-676158578D18 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ULogDxe/ULogDxe.efi
- SECTION UI = "ULogDxe"
- }
-
- FILE DRIVER = ABA01FF8-2CCB-4E12-8B2E-CD3F4A742993 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/CmdDbDxe/CmdDbDxe.efi
- SECTION UI = "CmdDbDxe"
- }
-
- FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219711 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/NpaDxe/NpaDxe.efi
- SECTION UI = "NpaDxe"
- }
-
- FILE DRIVER = CB29F4D1-7F37-4692-A416-93E82E219766 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/RpmhDxe/RpmhDxe.efi
- SECTION UI = "RpmhDxe"
- }
-
- FILE DRIVER = B43C22DB-6333-490C-872D-0A73439059FD {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/PdcDxe/PdcDxe.efi
- SECTION UI = "PdcDxe"
- }
-
- FILE DRIVER = 4DB5DEA6-5302-4D1A-8A82-677A683B0D29 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ClockDxe/ClockDxe.efi
- SECTION UI = "ClockDxe"
- }
-
- FILE DRIVER = 1B52138D-3FA3-4E50-B958-20887353F809 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/CPRDxe/CPRDxe.efi
- SECTION UI = "CPRDxe"
- }
-
- FILE DRIVER = AF9763A2-033B-4109-8E17-56A98D380C92 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.depex
- SECTION PE32 = sdm845Pkg/Binary/845/DALTLMM/DALTLMM.efi
- SECTION UI = "DALTLMM"
- }
-
- FILE DRIVER = 04DE8591-D2B3-4077-BBBE-B12070094EB6 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/I2C/I2C.depex
- SECTION PE32 = sdm845Pkg/Binary/845/I2C/I2C.efi
- SECTION UI = "I2C"
- }
-
- FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/SPMI/SPMI.depex
- SECTION PE32 = sdm845Pkg/Binary/845/SPMI/SPMI.efi
- SECTION UI = "SPMI"
- }
-
- FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/PmicDxe/PmicDxe.efi
- SECTION UI = "PmicDxe"
- }
-
- FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi
- SECTION UI = "UsbPwrCtrlDxe"
- }
-
- FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi
- SECTION UI = "UsbfnDwc3Dxe"
- }
-
- FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbConfigDxe/UsbConfigDxe.efi
- SECTION UI = "UsbConfigDxe"
- }
-
- FILE DRIVER = 0A134F0E-075E-40B3-9C63-3B3906804663 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbInitDxe/UsbInitDxe.efi
- SECTION UI = "UsbInitDxe"
- }
-
- FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbDeviceDxe/UsbDeviceDxe.efi
- SECTION UI = "UsbDeviceDxe"
- }
-
- FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/ButtonsDxe/ButtonsDxe.efi
- SECTION UI = "ButtonsDxe"
- }
-
- FILE DRIVER = 5af77f10-90df-4e7e-8325-a17ec09d5443 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UsbMsdDxe/UsbMsdDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UsbMsdDxe/UsbMsdDxe.efi
- SECTION UI = "UsbMsdDxe"
- }
-
- FILE DRIVER = 0d35cd8e-97ea-4f9a-96af-0f0d89f76567 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/UFSDxe/UFSDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/UFSDxe/UFSDxe.efi
- SECTION UI = "UFSDxe"
- }
-
- FILE DRIVER = F0D87C5E-4D5D-4FB5-939F-A6768AE8A309 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/Synaptics/SynapticsTouchDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/Synaptics/SynapticsTouchDxe.efi
- SECTION UI = "SynapticsTouchDxe"
- }
-
- FILE DRIVER = F0D87C5E-4D5D-4FB5-939F-A6768AE8A310 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/845/Synaptics/SynapticsTouchDeviceDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/845/Synaptics/SynapticsTouchDeviceDxe.efi
- SECTION UI = "SynapticsTouchDeviceDxe"
- }
-
-
- #
- # Virtual Keyboard
- #
- INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf
-
- INF sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.inf
- INF sdm845Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf
-
- #
- # USB Host Support
- #
- INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
-
- #
- # USB Mass Storage Support
- #
- INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
-
- #
- # USB Peripheral Support
- #
- INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf
-
- #
- # Fastboot
- #
- INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf
-
- #
- # FAT filesystem + GPT/MBR partitioning
- #
- INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
- INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
- INF FatPkg/EnhancedFatDxe/Fat.inf
- INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
-
- INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
-
- INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
-
- #
- # ACPI Support
- #
- INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
- INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
- INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
- # INF RuleOverride = ACPITABLE sdm845Pkg/AcpiTables/AcpiTables.inf
-
- FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD {
- SECTION RAW = sdm845Pkg/AcpiTables/testing/DBG2.aml
- SECTION RAW = sdm845Pkg/AcpiTables/845/DSDT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/CSRT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/FADT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/FACS.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/GTDT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/IORT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/MCFG.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/MADT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/PPTT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/TPM2.aml
- SECTION UI = "AcpiTables"
- }
-
- #
- # SMBIOS Support
- #
- INF sdm845Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
- INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
-
- #
- # UEFI applications
- #
- INF ShellPkg/Application/Shell/Shell.inf
-!ifdef $(INCLUDE_TFTP_COMMAND)
- INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
-!endif #$(INCLUDE_TFTP_COMMAND)
-
- #
- # Bds
- #
- INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf
- INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
- INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
- INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
- INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
- INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
- INF MdeModulePkg/Application/UiApp/UiApp.inf
- INF sdm845Pkg/Drivers/LogoDxe/LogoDxe.inf
-
- #
- # OnePlus 6T A/B Slot Support
- #
- INF sdm845Pkg/Drivers/Op6tSlotDxe/Op6tSlotDxe.inf
-
-[FV.FVMAIN_COMPACT]
-FvAlignment = 8
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-
- INF ArmPlatformPkg/PrePi/PeiUniCore.inf
-
- FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
- SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
- SECTION FV_IMAGE = FVMAIN
- }
- }
-
-!include sdm845Pkg/CommonFdf.fdf.inc
-
-
+++ /dev/null
-#
-# Copyright (c) 2018, Linaro Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-################################################################################
-#
-# FD Section
-# The [FD] Section is made up of the definition statements and a
-# description of what goes into the Flash Device Image. Each FD section
-# defines one flash "device" image. A flash device image may be one of
-# the following: Removable media bootable image (like a boot floppy
-# image,) an Option ROM image (that would be "flashed" into an add-in
-# card,) a System "Flash" image (that would be burned into a system's
-# flash) or an Update ("Capsule") image that will be used to update and
-# existing system flash.
-#
-################################################################################
-
-[FD.sdm845Pkg_UEFI]
-BaseAddress = 0xd0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
-Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
-ErasePolarity = 1
-
-# This one is tricky, it must be: BlockSize * NumBlocks = Size
-BlockSize = 0x00001000
-NumBlocks = 0x200
-
-################################################################################
-#
-# Following are lists of FD Region layout which correspond to the locations of different
-# images within the flash device.
-#
-# Regions must be defined in ascending order and may not overlap.
-#
-# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
-# the pipe "|" character, followed by the size of the region, also in hex with the leading
-# "0x" characters. Like:
-# Offset|Size
-# PcdOffsetCName|PcdSizeCName
-# RegionType <FV, DATA, or FILE>
-#
-################################################################################
-
-# from ArmVirtPkg/ArmVirtQemuKernel.fdf
-#
-# Implement the Linux kernel header layout so that the loader will identify
-# it as something bootable, and execute it with a FDT pointer in x0 or r2.
-#
-0x00000000|0x00008000
-DATA = {
- 0x01, 0x00, 0x00, 0x10, # code0: adr x1, .
- 0xff, 0x1f, 0x00, 0x14, # code1: b 0x8000
- 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, # text_offset: 512 KB
- 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, # image_size: 2 MB
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # flags
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res2
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res3
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, # res4
- 0x41, 0x52, 0x4d, 0x64, # magic: "ARM\x64"
- 0x00, 0x00, 0x00, 0x00 # res5
-}
-
-0x00008000|0x001f8000
-gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
-FV = FVMAIN_COMPACT
-
-
-################################################################################
-#
-# FV Section
-#
-# [FV] section is used to define what components or modules are placed within a flash
-# device file. This section also defines order the components and modules are positioned
-# within the image. The [FV] section consists of define statements, set statements and
-# module statements.
-#
-################################################################################
-
-[FV.FvMain]
-BlockSize = 0x40
-NumBlocks = 0 # This FV gets compressed so make it just big enough
-FvAlignment = 8 # FV alignment and FV attributes setting.
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-
- APRIORI DXE {
- INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
- }
-
- INF MdeModulePkg/Core/Dxe/DxeMain.inf
-
- #
- # PI DXE Drivers producing Architectural Protocols (EFI Services)
- #
- INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
- INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
- INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
- INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
- INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
- INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
- INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
- INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-
- FILE DRIVER = af9763a2-033b-4109-8e17-56a98d380c92 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/HWIODxeDriver/HWIODxeDriver.depex
- SECTION PE32 = sdm845Pkg/Binary/perseus/HWIODxeDriver/HWIODxeDriver.efi
- SECTION UI = "HWIODxeDriver"
- }
-
- FILE DRIVER = 4db5dea6-5302-4d1a-8a82-677a683b0d29 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/ClockDxe/ClockDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/perseus/ClockDxe/ClockDxe.efi
- SECTION UI = "ClockDxe"
- }
-
- FILE DRIVER = 5776232e-082d-4b75-9a0e-fe1d13f7a5d9 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/PmicDxe/PmicDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/perseus/PmicDxe/PmicDxe.efi
- SECTION UI = "PmicDxe"
- }
-
- FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/ButtonsDxe/ButtonsDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/perseus/ButtonsDxe/ButtonsDxe.efi
- SECTION UI = "ButtonsDxe"
- }
-
- #
- # Multiple Console IO support
- #
- INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
- INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
- INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
- INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
- INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
-
- INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
- INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
-
- INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
-
- INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
-
- FILE DRIVER = 3299a266-15f0-4346-8318-716336736d3e {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/UsbDeviceDxe/UsbDeviceDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/perseus/UsbDeviceDxe/UsbDeviceDxe.efi
- SECTION UI = "UsbDeviceDxe"
- }
-
- FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/perseus/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi
- SECTION UI = "UsbPwrCtrlDxe"
- }
-
- FILE DRIVER = 5af77f10-90df-4e7e-8325-a17ec09d5443 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/UsbMsdDxe/UsbMsdDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/perseus/UsbMsdDxe/UsbMsdDxe.efi
- SECTION UI = "UsbMsdDxe"
- }
-
- FILE DRIVER = 94f8a6a7-dc34-4101-88c1-99179cceae83 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/UsbfnDwc3Dxe/UsbfnDwc3Dxe.depex
- SECTION PE32 = sdm845Pkg/Binary/perseus/UsbfnDwc3Dxe/UsbfnDwc3Dxe.efi
- SECTION UI = "UsbfnDwc3Dxe"
- }
-
- FILE DRIVER = cd823a4d-7dec-4531-ae5d-4134fa4127b8 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/UsbConfigDxe/UsbConfigDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/perseus/UsbConfigDxe/UsbConfigDxe.efi
- SECTION UI = "UsbConfigDxe"
- }
-
- #
- # GPIO
- #
-
- #
- # Virtual Keyboard
- #
- INF EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboardDxe.inf
-
- INF sdm845Pkg/Drivers/sdm845Dxe/sdm845Dxe.inf
- INF sdm845Pkg/Drivers/SimpleFbDxe/SimpleFbDxe.inf
-
- FILE DRIVER = 0d35cd8e-97ea-4f9a-96af-0f0d89f76567 {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/UFSDxe/UFSDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/perseus/UFSDxe/UFSDxe.efi
- SECTION UI = "UFSDxe"
- }
-
- FILE DRIVER = 2a7b4bef-80cd-49e1-b473-374ba4d673fc {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/SPMI/SPMI.depex
- SECTION PE32 = sdm845Pkg/Binary/perseus/SPMI/SPMI.efi
- SECTION UI = "SPMI"
- }
-
- FILE DRIVER = f541d663-4a48-40aa-aabf-ff158ccae34c {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/SmemDxe/SmemDxe.depex
- SECTION PE32 = sdm845Pkg/Binary/perseus/SmemDxe/SmemDxe.efi
- SECTION UI = "SmemDxe"
- }
-
- FILE DRIVER = 10e193df-9966-44e7-b17c-59dd831e20fc {
- SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/ChipInfo/ChipInfo.depex
- SECTION PE32 = sdm845Pkg/Binary/perseus/ChipInfo/ChipInfo.efi
- SECTION UI = "ChipInfo"
- }
-
- # FILE DRIVER = 7a32bd23-f735-4f57-aa1a-447d2fe3be0d {
- # SECTION DXE_DEPEX = sdm845Pkg/Binary/perseus/SPI/SPI.depex
- # SECTION PE32 = sdm845Pkg/Binary/perseus/SPI/SPI.efi
- # SECTION UI = "SPI"
- # }
-
-
- #
- # USB Host Support
- #
- INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
-
- #
- # USB Mass Storage Support
- #
- INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
-
- #
- # USB Peripheral Support
- #
- INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf
-
- #
- # Fastboot
- #
- INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf
-
- #
- # FAT filesystem + GPT/MBR partitioning
- #
- INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
- INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
- INF FatPkg/EnhancedFatDxe/Fat.inf
- INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
-
- INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
-
- INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
-
- #
- # ACPI Support
- #
- INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
- INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
- INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
- # INF RuleOverride = ACPITABLE sdm845Pkg/AcpiTables/AcpiTables.inf
-
- FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD {
- SECTION RAW = sdm845Pkg/AcpiTables/testing/CSRT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/DBG2.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/DSDT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/FACS.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/FADT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/GTDT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/IORT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/MADT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/MCFG.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/PPTT.aml
- SECTION RAW = sdm845Pkg/AcpiTables/testing/TPM2.aml
-
- # SECTION RAW = sdm845Pkg/AcpiTables/test2/CSRT.aml
- # SECTION RAW = sdm845Pkg/AcpiTables/test2/DBG2.aml
- # SECTION RAW = sdm845Pkg/AcpiTables/test2/DSDT.aml
- # SECTION RAW = sdm845Pkg/AcpiTables/test2/FACS.aml
- # SECTION RAW = sdm845Pkg/AcpiTables/test2/FADT.aml
- # SECTION RAW = sdm845Pkg/AcpiTables/test2/GTDT.aml
- # SECTION RAW = sdm845Pkg/AcpiTables/test2/IORT.aml
- # SECTION RAW = sdm845Pkg/AcpiTables/test2/MADT.aml
- # SECTION RAW = sdm845Pkg/AcpiTables/test2/MCFG.aml
- # SECTION RAW = sdm845Pkg/AcpiTables/test2/PPTT.aml
-
- SECTION UI = "AcpiTables"
- }
-
- #
- # FDT support
- #
- INF EmbeddedPkg/Drivers/DtPlatformDxe/DtPlatformDxe.inf
-
- FILE FREEFORM = 25462CDA-221F-47DF-AC1D-259CFAA4E326 {
- SECTION RAW = sdm845Pkg/FdtBlob/sdm845-xiaomi-perseus.dtb
- }
-
- #
- # SMBIOS Support
- #
- INF sdm845Pkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
- INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
-
- #
- # UEFI applications
- #
- INF ShellPkg/Application/Shell/Shell.inf
-!ifdef $(INCLUDE_TFTP_COMMAND)
- INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
-!endif #$(INCLUDE_TFTP_COMMAND)
-
- #
- # Bds
- #
- INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf
- INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
- INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
- INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
- INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
- INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
- INF MdeModulePkg/Application/UiApp/UiApp.inf
- INF sdm845Pkg/Drivers/LogoDxe/LogoDxe.inf
-
-[FV.FVMAIN_COMPACT]
-FvAlignment = 8
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-
- INF ArmPlatformPkg/PrePi/PeiUniCore.inf
-
- FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
- SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
- SECTION FV_IMAGE = FVMAIN
- }
- }
-
-!include sdm845Pkg/CommonFdf.fdf.inc
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/* Copyright 2018 Google LLC. */
-
-#include <dt-bindings/spmi/spmi.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-
-&spmi_bus {
- pm8005_lsid0: pmic@4 {
- compatible = "qcom,pm8005", "qcom,spmi-pmic";
- reg = <0x4 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pm8005_gpio: gpios@c000 {
- compatible = "qcom,pm8005-gpio", "qcom,spmi-gpio";
- reg = <0xc000>;
- gpio-controller;
- gpio-ranges = <&pm8005_gpio 0 0 4>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- };
-
- pm8005_lsid1: pmic@5 {
- compatible = "qcom,pm8005", "qcom,spmi-pmic";
- reg = <0x5 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-};
+++ /dev/null
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/* Copyright 2018 Google LLC. */
-
-#include <dt-bindings/iio/qcom,spmi-vadc.h>
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/spmi/spmi.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
- thermal-zones {
- pm8998 {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&pm8998_temp>;
-
- trips {
- pm8998_alert0: pm8998-alert0 {
- temperature = <105000>;
- hysteresis = <2000>;
- type = "passive";
- };
- pm8998_crit: pm8998-crit {
- temperature = <125000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- };
- };
-};
-
-&spmi_bus {
- pm8998_lsid0: pmic@0 {
- compatible = "qcom,pm8998", "qcom,spmi-pmic";
- reg = <0x0 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pm8998_pon: pon@800 {
- compatible = "qcom,pm8998-pon";
-
- reg = <0x800>;
- mode-bootloader = <0x2>;
- mode-recovery = <0x1>;
-
- pm8998_pwrkey: pwrkey {
- compatible = "qcom,pm8941-pwrkey";
- interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
- debounce = <15625>;
- bias-pull-up;
- linux,code = <KEY_POWER>;
- };
- };
-
- pm8998_temp: temp-alarm@2400 {
- compatible = "qcom,spmi-temp-alarm";
- reg = <0x2400>;
- interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>;
- io-channels = <&pm8998_adc ADC5_DIE_TEMP>;
- io-channel-names = "thermal";
- #thermal-sensor-cells = <0>;
- };
-
- pm8998_coincell: coincell@2800 {
- compatible = "qcom,pm8941-coincell";
- reg = <0x2800>;
-
- status = "disabled";
- };
-
- pm8998_adc: adc@3100 {
- compatible = "qcom,spmi-adc-rev2";
- reg = <0x3100>;
- interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- #io-channel-cells = <1>;
-
- adc-chan@6 {
- reg = <ADC5_DIE_TEMP>;
- label = "die_temp";
- };
- };
-
- rtc@6000 {
- compatible = "qcom,pm8941-rtc";
- reg = <0x6000>, <0x6100>;
- reg-names = "rtc", "alarm";
- interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
- };
-
- pm8998_gpio: gpios@c000 {
- compatible = "qcom,pm8998-gpio", "qcom,spmi-gpio";
- reg = <0xc000>;
- gpio-controller;
- gpio-ranges = <&pm8998_gpio 0 0 26>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- };
-
- pm8998_lsid1: pmic@1 {
- compatible = "qcom,pm8998", "qcom,spmi-pmic";
- reg = <0x1 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-};
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/spmi/spmi.h>
-
-&spmi_bus {
- pmi8998_lsid0: pmic@2 {
- compatible = "qcom,pmi8998", "qcom,spmi-pmic";
- reg = <0x2 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pmi8998_gpio: gpios@c000 {
- compatible = "qcom,pmi8998-gpio", "qcom,spmi-gpio";
- reg = <0xc000>;
- gpio-controller;
- gpio-ranges = <&pmi8998_gpio 0 0 14>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <0x2 0xc0 0 IRQ_TYPE_NONE>,
- <0x2 0xc1 0 IRQ_TYPE_NONE>,
- <0x2 0xc2 0 IRQ_TYPE_NONE>,
- <0x2 0xc4 0 IRQ_TYPE_NONE>,
- <0x2 0xc5 0 IRQ_TYPE_NONE>,
- <0x2 0xc7 0 IRQ_TYPE_NONE>,
- <0x2 0xc8 0 IRQ_TYPE_NONE>,
- <0x2 0xc9 0 IRQ_TYPE_NONE>,
- <0x2 0xca 0 IRQ_TYPE_NONE>,
- <0x2 0xcb 0 IRQ_TYPE_NONE>,
- <0x2 0xcd 0 IRQ_TYPE_NONE>;
- interrupt-names = "pmi8998_gpio1", "pmi8998_gpio2",
- "pmi8998_gpio3", "pmi8998_gpio5",
- "pmi8998_gpio6", "pmi8998_gpio8",
- "pmi8998_gpio9", "pmi8998_gpio10",
- "pmi8998_gpio11", "pmi8998_gpio12",
- "pmi8998_gpio14";
- qcom,gpios-disallowed = <4 7 13>;
-
- // usb2_ext_5v_boost:usb2_ext_5v_boost_default {
- // output-low;
- // pins = "gpio10";
- // function = "normal";
- // power-source = <0x0>;
- // };
-
- // usb2_id_det:usb2_id_det_default {
- // pins = "gpio9";
- // function = "normal";
- // power-source = <0x0>;
- // input-enable;
- // bias-pull-up;
- // };
-
- // usb2_vbus_det:usb2_vbus_det_default {
- // pins = "gpio8";
- // function = "normal";
- // bias-pull-down;
- // power-source = <0x1>;
- // input-enable;
- // };
-
- // usb2_vbus_boost:usb2_vbus_boost_default {
- // output-low;
- // pins = "gpio2";
- // function = "normal";
- // power-source = <0x0>;
- // };
- };
- };
-
- pmi8998_lsid1: pmic@3 {
- compatible = "qcom,pmi8998", "qcom,spmi-pmic";
- reg = <0x3 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- lpg {
- compatible = "qcom,pmi8998-lpg";
-
- status = "disabled";
- };
-
- labibb {
- compatible = "qcom,pmi8998-lab-ibb";
-
- ibb: ibb {
- regulator-always-on;
- interrupts = <0x3 0xdc 0x2 IRQ_TYPE_EDGE_RISING>;
- };
-
- lab: lab {
- regulator-always-on;
- interrupts = <0x3 0xde 0x0 IRQ_TYPE_EDGE_RISING>;
- };
- };
-
- pmi8998_wled: qcom,leds@d800 {
- compatible = "qcom,pmi8998-wled";
- reg = <0xd800 0xd900>;
- interrupts = <0x3 0xd8 0x1 IRQ_TYPE_EDGE_RISING>,
- <0x3 0xd8 0x2 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "ovp-irq", "sc-irq";
- label = "backlight";
-
- qcom,switching-freq = <800>;
- qcom,ovp-millivolt = <29600>;
- qcom,current-boost-limit = <970>;
- qcom,current-limit-microamp = <25000>;
- qcom,num-strings = <4>;
- qcom,enabled-strings = <0 1 2 3>;
- qcom,qcom,external-pfet;
-
- status = "disabled";
- };
-
- };
-};
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
-#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
-#include "sdm845.dtsi"
-#include "pm8998.dtsi"
-#include "pmi8998.dtsi"
-
-/ {
- model = "Xiaomi Technologies, Inc. Beryllium";
- compatible = "qcom,sdm845";
- /* required for bootloader to select correct board */
- qcom,board-id = <69 0>;
- qcom,msm-id = <321 0x20001>;
-
- aliases {
- hsuart0 = &uart6;
- display0 = &framebuffer0;
- };
-
- chosen {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- // For simplefb hack
- stdout-path = "display0";
-
- /* hack: use framebuffer setup by bootloader.
- * the address is taken from the bootloader config (strings xbl.img | grep "Display Reserved")
- * it's wrong (it's closer to 0x9d500000, so the top is cut off), but I spent an hour
- * trying to find the right address and give up. It's just a temp hack anyways.
- */
- framebuffer0: framebuffer@9d400000 {
- compatible = "simple-framebuffer";
- reg = <0 0x9D400000 0 0x02400000>;
- width = <1080>;
- height = <2246>;
- stride = <(1080 * 4)>;
- format = "a8r8g8b8";
- status = "okay";
- };
- };
-
- dc12v: dc12v-regulator {
- compatible = "regulator-fixed";
- regulator-name = "DC12V";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- regulator-always-on;
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- autorepeat;
-
- pinctrl-names = "default";
- pinctrl-0 = <&vol_up_pin_a>;
-
- vol-up {
- label = "Volume Up";
- linux,code = <KEY_VOLUMEUP>;
- gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
- };
- };
-
- vbat: vbat-regulator {
- compatible = "regulator-fixed";
- regulator-name = "VBAT";
-
- vin-supply = <&dc12v>;
- regulator-min-microvolt = <4200000>;
- regulator-max-microvolt = <4200000>;
- regulator-always-on;
- };
-
- vbat_som: vbat-som-regulator {
- compatible = "regulator-fixed";
- regulator-name = "VBAT_SOM";
-
- vin-supply = <&dc12v>;
- regulator-min-microvolt = <4200000>;
- regulator-max-microvolt = <4200000>;
- regulator-always-on;
- };
-
- vdc_3v3: vdc-3v3-regulator {
- compatible = "regulator-fixed";
- regulator-name = "VDC_3V3";
- vin-supply = <&dc12v>;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-
- vdc_5v: vdc-5v-regulator {
- compatible = "regulator-fixed";
- regulator-name = "VDC_5V";
-
- vin-supply = <&dc12v>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <500000>;
- regulator-always-on;
- };
-
- vreg_s4a_1p8: vreg-s4a-1p8 {
- compatible = "regulator-fixed";
- regulator-name = "vreg_s4a_1p8";
-
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
-
- usb2_vbus_det {
- usb2_vbus_det_default: usb2_vbus_det_default {
- pins = "gpio8";
- function = "normal";
- input-enable;
- bias-pull-down;
- power-source = <1>; /* VPH input supply */
- };
- };
-
- extcon_usb1: extcon-usb-1 {
- compatible = "linux,extcon-usb-gpio";
- vbus-gpio = <&pmi8998_gpio 8 GPIO_ACTIVE_HIGH>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&usb2_vbus_det_default>;
- };
-};
-
-&apps_rsc {
- pm8998-rpmh-regulators {
- compatible = "qcom,pm8998-rpmh-regulators";
- qcom,pmic-id = "a";
-
- vdda_mipi_dsi0_pll:
- vreg_l1a_0p875: ldo1 {
- regulator-min-microvolt = <880000>;
- regulator-max-microvolt = <880000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l5a_0p8: ldo5 {
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l7a_1p8: ldo7 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l12a_1p8: ldo12 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l13a_2p95: ldo13 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2960000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l14a_1p88: ldo14 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- vreg_l17a_1p3: ldo17 {
- regulator-min-microvolt = <1304000>;
- regulator-max-microvolt = <1304000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l20a_2p95: ldo20 {
- regulator-min-microvolt = <2960000>;
- regulator-max-microvolt = <2968000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l21a_2p95: ldo21 {
- regulator-min-microvolt = <2960000>;
- regulator-max-microvolt = <2968000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l24a_3p075: ldo24 {
- regulator-min-microvolt = <3088000>;
- regulator-max-microvolt = <3088000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l25a_3p3: ldo25 {
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3312000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vdda_mipi_dsi0_1p2:
- vreg_l26a_1p2: ldo26 {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- regulator-boot-on;
- };
- };
-};
-
-&gcc {
- protected-clocks = <GCC_QSPI_CORE_CLK>,
- <GCC_QSPI_CORE_CLK_SRC>,
- <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
- <GCC_LPASS_Q6_AXI_CLK>,
- <GCC_LPASS_SWAY_CLK>;
-};
-
-&gpu {
- zap-shader {
- memory-region = <&gpu_mem>;
- firmware-name = "qcom/a630_zap.mbn";
- };
-};
-
-&pm8998_gpio {
- vol_up_pin_a: vol-up-active {
- pins = "gpio6";
- function = "normal";
- input-enable;
- bias-pull-up;
- qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
- };
-};
-
-&pm8998_pon {
- resin {
- compatible = "qcom,pm8941-resin";
- interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
- debounce = <15625>;
- bias-pull-up;
- linux,code = <KEY_VOLUMEDOWN>;
- };
-};
-
-&qupv3_id_0 {
- status = "okay";
-};
-
-&qupv3_id_1 {
- status = "okay";
-};
-
-&sdhc_2 {
- status = "okay";
-
- pinctrl-names = "default";
- pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
-
- vmmc-supply = <&vreg_l21a_2p95>;
- vqmmc-supply = <&vreg_l13a_2p95>;
-
- bus-width = <4>;
- cd-gpios = <&tlmm 126 GPIO_ACTIVE_HIGH>;
-};
-
-&tlmm {
- gpio-reserved-ranges = <0 4>, <81 4>;
-
- sdc2_default_state: sdc2-default {
- clk {
- pins = "sdc2_clk";
- bias-disable;
-
- /*
- * It seems that mmc_test reports errors if drive
- * strength is not 16 on clk, cmd, and data pins.
- */
- drive-strength = <16>;
- };
-
- cmd {
- pins = "sdc2_cmd";
- bias-pull-up;
- drive-strength = <10>;
- };
-
- data {
- pins = "sdc2_data";
- bias-pull-up;
- drive-strength = <10>;
- };
- };
-
- sdc2_card_det_n: sd-card-det-n {
- pins = "gpio126";
- function = "gpio";
- bias-pull-up;
- };
-
- ts_int_active: ts_int_active {
- mux {
- pins = "gpio31";
- function = "gpio";
- };
-
- config {
- pins = "gpio31";
- drive-strength = <16>;
- bias-pull-down;
- input-enable;
- };
- };
-
- ts_reset_active: ts_reset_active {
- mux {
- pins = "gpio32";
- function = "gpio";
- };
-
- config {
- pins = "gpio32";
- drive-strength = <16>;
- output-high;
- };
- };
-
- ts_reset_suspend: ts_reset_suspend {
- mux {
- pins = "gpio32";
- function = "gpio";
- };
-
- config {
- pins = "gpio32";
- drive-strength = <2>;
- bias-disable;
- output-low;
- };
- };
-
- ts_int_suspend: ts_int_suspend {
- mux {
- pins = "gpio31";
- function = "gpio";
- };
-
- config {
- pins = "gpio31";
- drive-strength = <2>;
- bias-pull-down;
- input-enable;
- };
- };
-};
-
-&uart6 {
- status = "okay";
-
- bluetooth {
- compatible = "qcom,wcn3990-bt";
-
- vddio-supply = <&vreg_s4a_1p8>;
- vddxo-supply = <&vreg_l7a_1p8>;
- vddrf-supply = <&vreg_l17a_1p3>;
- vddch0-supply = <&vreg_l25a_3p3>;
- max-speed = <3200000>;
- };
-};
-
-&usb_1 {
- status = "okay";
-
- /* We'll use this as USB 2.0 only */
- qcom,select-utmi-as-pipe-clk;
-};
-
-&usb_1_dwc3 {
- /*
- * Can't detect USB cable being plugged / unplugged, so this is needed
- * for gadget mode
- */
- dr_mode = "peripheral";
-
- /* fastest mode for USB 2 */
- maximum-speed = "high-speed";
-
- extcon = <&extcon_usb1>;
-
- /* Remove USB3 phy */
- phys = <&usb_1_hsphy>;
- phy-names = "usb2-phy";
-};
-
-&usb_1_hsphy {
- status = "okay";
-
- vdd-supply = <&vreg_l1a_0p875>;
- vdda-pll-supply = <&vreg_l12a_1p8>;
- vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
-
- qcom,imp-res-offset-value = <8>;
- qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
- qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
- qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
-};
-
-&usb_1_qmpphy {
- status = "okay";
-
- vdda-phy-supply = <&vreg_l26a_1p2>;
- vdda-pll-supply = <&vreg_l1a_0p875>;
-};
-
-&ufs_mem_hc {
- status = "okay";
-
- reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
-
- vcc-supply = <&vreg_l20a_2p95>;
- vcc-max-microamp = <800000>;
-};
-
-&ufs_mem_phy {
- status = "okay";
-
- vdda-phy-supply = <&vreg_l1a_0p875>;
- vdda-pll-supply = <&vreg_l26a_1p2>;
-};
-
-/* PINCTRL - additions to nodes defined in sdm845.dtsi */
-
-&qup_uart6_default {
- pinmux {
- pins = "gpio45", "gpio46", "gpio47", "gpio48";
- function = "qup6";
- };
-
- cts {
- pins = "gpio45";
- bias-disable;
- };
-
- rts-tx {
- pins = "gpio46", "gpio47";
- drive-strength = <2>;
- bias-disable;
- };
-
- rx {
- pins = "gpio48";
- bias-pull-up;
- };
-};
-
-&apps_smmu {
- status = "okay";
-};
-
-&uart14 {
- status = "okay";
-};
-
-&qup_i2c14_default{
- pinconf {
- pins = "gpio33", "gpio34";
- drive-strength = <2>;
- bias-pull-up;
- };
-};
-
-&i2c14 {
- compatible = "i2c-gpio";
- status="okay";
- sda-gpios = <&tlmm 33 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
- scl-gpios = <&tlmm 34 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
- i2c-gpio,delay-us = <1>; /* 5~=100 kHz */ /* could probably run on higher speeds */
- #address-cells = <1>;
- #size-cells = <0>;
-
- touchscreen: novatek@62 {
- compatible = "novatek,NVT-ts";
- reg = <0x62>;
- status = "okay";
-
- vddio-supply = <&vreg_l14a_1p88>;
- lab-supply = <&lab>;
- ibb-supply = <&ibb>;
- novatek,vddio-reg-name = "vddio";
- novatek,lab-reg-name = "lab";
- novatek,ibb-reg-name = "ibb";
-
- novatek,reset-tddi = <&tlmm 6 0x00 /* GPIO_ACTIVE_HIGH */ >;
- novatek,reset-gpio = <&tlmm 32 0x00 /* GPIO_ACTIVE_HIGH */ >;
- novatek,irq-gpio = <&tlmm 31 0x2001>;
-
- pinctrl-names = "pmx_ts_active", "pmx_ts_suspend";
- pinctrl-0 = <&ts_int_active &ts_reset_active>;
- pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
- novatek,config-array-size = <2>;
- novatek,dump-click-count;
- novatek,cfg_0 {
- novatek,tp-vendor = <0x46>;
- novatek,hw-version = <0x1>;
- novatek,fw-name = "novatek_nt36672_e10_hw01.fw";
- };
- novatek,cfg_1 {
- novatek,tp-vendor = <0x46>;
- novatek,hw-version = <0x2>;
- novatek,fw-name = "novatek_nt36672_e10_hw02.fw";
- };
- };
-
-};
-
-&dsi0 {
- status = "okay";
- vdda-supply = <&vdda_mipi_dsi0_1p2>;
-
- ports {
- port@1 {
- endpoint {
- remote-endpoint = <&tianma_nt36672a_in_0>;
- data-lanes = <0 1 2 3>;
- };
- };
- };
-
- panel@0 {
- compatible = "tianma,nt36672a";
- reg = <0>;
- vddi0-supply = <&vreg_l14a_1p88>;
- lab-supply = <&lab>;
- ibb-supply = <&ibb>;
-
- reset-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
-
- pinctrl-names = "panel_active", "panel_suspend";
- pinctrl-0 = <&sde_dsi_active>;
- pinctrl-1 = <&sde_dsi_suspend>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- tianma_nt36672a_in_0: endpoint {
- remote-endpoint = <&dsi0_out>;
- };
- };
- };
- };
-};
-
-&dsi0_phy {
- status = "okay";
- vdds-supply = <&vdda_mipi_dsi0_pll>;
-};
-
-&mdss {
- status = "okay";
-};
-
-&mdss_mdp {
- status = "okay";
-};
-
-&adsp_pas {
- status = "okay";
-
- firmware-name = "qcom/sdm845/adsp.mbn";
-};
-
-&cdsp_pas {
- status = "okay";
- firmware-name = "qcom/sdm845/cdsp.mbn";
-};
-
-&mss_pil {
- status = "okay";
- firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
-};
-
-&pmi8998_wled {
- status = "okay";
- qcom,current-limit-microamp = <20000>;
- qcom,enabled-strings = <0 1>;
- qcom,cabc;
- qcom,switching-freq = <600>;
-};
-
-/* Reserved memory changes */
-/*
- * The memory regions related to the modem have to be changed
- * according to the adresses in downstream as
- * the modem is hard-coded to expect these regions to be at those adresses.
- *
- */
-/delete-node/ &rmtfs_mem;
-/delete-node/ &adsp_mem;
-/delete-node/ &wlan_msa_mem;
-/delete-node/ &mpss_region;
-/delete-node/ &venus_mem;
-/delete-node/ &cdsp_mem;
-/delete-node/ &mba_region;
-/delete-node/ &slpi_mem;
-/delete-node/ &spss_mem;
-
-/ {
- reserved-memory {
- rmtfs_mem: memory@f6301000 {
- compatible = "qcom,rmtfs-mem";
- reg = <0 0xf6301000 0 0x200000>;
- no-map;
-
- qcom,client-id = <1>;
- qcom,vmid = <15>;
- };
-
- adsp_mem: memory@8c500000 {
- reg = <0 0x8c500000 0 0x1e00000>;
- no-map;
- };
-
- wlan_msa_mem: memory@8e300000 {
- reg = <0 0x8e300000 0 0x100000>;
- no-map;
- };
-
- mpss_region: memory@8e400000 {
- reg = <0 0x8e400000 0 0x7800000>;
- no-map;
- };
-
- venus_mem: memory@95c00000 {
- reg = <0 0x95c00000 0 0x500000>;
- no-map;
- };
-
- cdsp_mem: memory@96100000 {
- reg = <0 0x96100000 0 0x800000>;
- no-map;
- };
-
- mba_region: memory@96900000 {
- reg = <0 0x96900000 0 0x200000>;
- no-map;
- };
-
- slpi_mem: memory@96b00000 {
- reg = <0 0x96b00000 0 0x1400000>;
- no-map;
- };
-
- spss_mem: memory@97f00000 {
- reg = <0 0x97f00000 0 0x100000>;
- no-map;
- };
-
- /* hack: bootloader framebuffer */
- bootloader_framebuffer_mem: bootloader_framebuffer_region@a1a10000 {
- compatible = "removed-dma-pool";
- reg = <0 0x9D400000 0 0x02400000>;
- no-map;
- };
-
- ramoops: ramoops@b0000000 {
- compatible = "ramoops";
- reg = <0 0xb0000000 0 0x00400000>;
- record-size = <0x40000>; /*256x1024*/
- console-size = <0x40000>;
- ftrace-size = <0x40000>;
- pmsg-size = <0x200000>;
- ecc-size = <0x0>;
- };
- };
-};
-
-&wifi {
- status = "okay";
-
- vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
- vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
- vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
- vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
-};
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * SDM845 OnePlus 6 (enchilada) specific device tree
- *
- * Copyright (c) 2020, The Linux Foundation. All rights reserved.
- */
-
-#include "sdm845-oneplus-enchilada.dtsi"
-
-/ {
- model = "OnePlus 6";
- compatible = "oneplus,enchilada", "qcom,sdm845";
-};
-
-&display_panel {
- compatible = "samsung,sofef00";
- status = "okay";
-
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
-
- vddio-supply = <&vreg_l14a_1p88>;
-
- reset-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&panel_reset_pins &panel_te_pin &panel_esd_pin>;
-};
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * SDM845 OnePlus 6(T) (enchilada / fajita) common device tree source
- *
- * Copyright (c) 2020, The Linux Foundation. All rights reserved.
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
-#include <dt-bindings/input/linux-event-codes.h>
-#include "sdm845.dtsi"
-
-// Needed for some GPIO (like the volume buttons)
-#include "pm8998.dtsi"
-
-// For LEDs
-#include "pmi8998.dtsi"
-
-/ {
-
- aliases {
- hsuart0 = &uart6;
- };
-
- vph_pwr: vph-pwr-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vph_pwr";
- regulator-min-microvolt = <3700000>;
- regulator-max-microvolt = <3700000>;
- };
-
- /*
- * Apparently RPMh does not provide support for PM8998 S4 because it
- * is always-on; model it as a fixed regulator.
- */
- vreg_s4a_1p8: pm8998-smps4 {
- compatible = "regulator-fixed";
- regulator-name = "vreg_s4a_1p8";
-
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-always-on;
- regulator-boot-on;
-
- vin-supply = <&vph_pwr>;
- };
-
- i2c_touch: i2c {
- compatible = "i2c-gpio";
- status = "okay";
-
- sda-gpios = <&tlmm 49 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
- scl-gpios = <&tlmm 50 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
-
- i2c-gpio,delay-us = <5>; /* 5~=100 kHz */
- #address-cells = <1>;
- #size-cells = <0>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&i2c_ts_pins>;
-
- touchscreen: synaptics-rmi4-i2c@20 {
- compatible = "syna,rmi4-i2c";
- reg = <0x20>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts-extended = <&tlmm 125 0x2008>; // IRQF_ONESHOT | IRQF_TRIGGER_LOW
-
- pinctrl-names = "default";
- pinctrl-0 = <&ts_default_pins &ts_enable_1p8>;
-
- vdd-supply = <&vreg_l28a_3p0>;
- vio-supply = <&vreg_l6a_1p8>;
-
- syna,reset-delay-ms = <200>;
- syna,startup-delay-ms = <500>;
-
- rmi4-f01@1 {
- reg = <0x01>;
- syna,nosleep-mode = <1>;
- };
-
- rmi4_f12: rmi4-f12@12 {
- reg = <0x12>;
- touchscreen-x-mm = <68>;
- touchscreen-y-mm = <144>;
- syna,sensor-type = <1>;
- syna,rezero-wait-ms = <200>;
- };
- };
- };
-
- gpio_tristate_key: gpio-keys {
- compatible = "gpio-keys";
- label = "Tri-state key";
-
- pinctrl-names = "default";
- pinctrl-0 = <&tri_state_key_default>;
-
- state-top {
- label = "Tri-state key top";
- linux,code = <KEY_A>;
- // gpios = <&tlmm 40 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&tlmm>;
- interrupts = <24 IRQ_TYPE_EDGE_FALLING>;
- debounce-interval = <500>;
- linux,can-disable;
- };
-
- state-middle {
- label = "Tri-state key middle";
- linux,code = <KEY_B>;
- // gpios = <&tlmm 42 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&tlmm>;
- interrupts = <52 IRQ_TYPE_EDGE_FALLING>;
- debounce-interval = <500>;
- linux,can-disable;
- };
-
- state-bottom {
- label = "Tri-state key bottom";
- linux,code = <KEY_C>;
- // gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&tlmm>;
- interrupts = <126 IRQ_TYPE_EDGE_FALLING>;
- debounce-interval = <500>;
- linux,can-disable;
- };
- };
-
- gpio_vol_keys: gpio-keys {
- compatible = "gpio-keys";
- label = "Volume keys";
- autorepeat;
-
- pinctrl-names = "default";
- pinctrl-0 = <&volume_down_gpio &volume_up_gpio>;
-
- vol-down {
- label = "Volume down";
- linux,code = <KEY_VOLUMEDOWN>;
- gpios = <&pm8998_gpio 5 GPIO_ACTIVE_LOW>;
- debounce-interval = <15>;
- };
-
- vol-up {
- label = "Volume up";
- linux,code = <KEY_VOLUMEUP>;
- gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
- debounce-interval = <15>;
- };
- };
-
- extcon_usb1: extcon-usb-1 {
- compatible = "linux,extcon-usb-gpio";
- id-gpio = <&tlmm 38 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&apps_rsc {
- pm8998-rpmh-regulators {
- compatible = "qcom,pm8998-rpmh-regulators";
- qcom,pmic-id = "a";
-
- vdd-s1-supply = <&vph_pwr>;
- vdd-s2-supply = <&vph_pwr>;
- vdd-s3-supply = <&vph_pwr>;
- vdd-s4-supply = <&vph_pwr>;
- vdd-s5-supply = <&vph_pwr>;
- vdd-s6-supply = <&vph_pwr>;
- vdd-s7-supply = <&vph_pwr>;
- vdd-s8-supply = <&vph_pwr>;
- vdd-s9-supply = <&vph_pwr>;
- vdd-s10-supply = <&vph_pwr>;
- vdd-s11-supply = <&vph_pwr>;
- vdd-s12-supply = <&vph_pwr>;
- vdd-s13-supply = <&vph_pwr>;
- vdd-l1-l27-supply = <&vreg_s7a_1p025>;
- vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
- vdd-l3-l11-supply = <&vreg_s7a_1p025>;
- vdd-l4-l5-supply = <&vreg_s7a_1p025>;
- vdd-l6-supply = <&vph_pwr>;
- vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
- vdd-l9-supply = <&vreg_bob>;
- vdd-l10-l23-l25-supply = <&vreg_bob>;
- vdd-l13-l19-l21-supply = <&vreg_bob>;
- vdd-l16-l28-supply = <&vreg_bob>;
- vdd-l18-l22-supply = <&vreg_bob>;
- vdd-l20-l24-supply = <&vreg_bob>;
- vdd-l26-supply = <&vreg_s3a_1p35>;
- vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
-
- vreg_s2a_1p125: smps2 {
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- };
-
- vreg_s3a_1p35: smps3 {
- regulator-min-microvolt = <1352000>;
- regulator-max-microvolt = <1352000>;
- };
-
- vreg_s5a_2p04: smps5 {
- regulator-min-microvolt = <1904000>;
- regulator-max-microvolt = <2040000>;
- };
-
- vreg_s7a_1p025: smps7 {
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1028000>;
- };
-
- vdd_qusb_hs0:
- vdda_hp_pcie_core:
- vdda_mipi_csi0_0p9:
- vdda_mipi_csi1_0p9:
- vdda_mipi_csi2_0p9:
- vdda_mipi_dsi0_pll:
- vdda_mipi_dsi1_pll:
- vdda_qlink_lv:
- vdda_qlink_lv_ck:
- vdda_qrefs_0p875:
- vdda_pcie_core:
- vdda_pll_cc_ebi01:
- vdda_pll_cc_ebi23:
- vdda_sp_sensor:
- vdda_ufs1_core:
- vdda_ufs2_core:
- vdda_usb1_ss_core:
- vdda_usb2_ss_core:
- vreg_l1a_0p875: ldo1 {
- regulator-min-microvolt = <880000>;
- regulator-max-microvolt = <880000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vddpx_10:
- vreg_l2a_1p2: ldo2 {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- regulator-always-on;
- };
-
- vreg_l3a_1p0: ldo3 {
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vdd_wcss_cx:
- vdd_wcss_mx:
- vdda_wcss_pll:
- vreg_l5a_0p8: ldo5 {
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vddpx_13:
- vreg_l6a_1p8: ldo6 {
- regulator-min-microvolt = <1856000>;
- regulator-max-microvolt = <1856000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l7a_1p8: ldo7 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l8a_1p2: ldo8 {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1248000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l9a_1p8: ldo9 {
- regulator-min-microvolt = <1704000>;
- regulator-max-microvolt = <2928000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l10a_1p8: ldo10 {
- regulator-min-microvolt = <1704000>;
- regulator-max-microvolt = <2928000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l11a_1p0: ldo11 {
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1048000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vdd_qfprom:
- vdd_qfprom_sp:
- vdda_apc1_cs_1p8:
- vdda_gfx_cs_1p8:
- vdda_qrefs_1p8:
- vdda_qusb_hs0_1p8:
- vddpx_11:
- vreg_l12a_1p8: ldo12 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vddpx_2:
- vreg_l13a_2p95: ldo13 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2960000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l14a_1p88: ldo14 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- regulator-always-on;
- };
-
- vreg_l15a_1p8: ldo15 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l16a_2p7: ldo16 {
- regulator-min-microvolt = <2704000>;
- regulator-max-microvolt = <2704000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l17a_1p3: ldo17 {
- regulator-min-microvolt = <1304000>;
- regulator-max-microvolt = <1304000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l18a_2p7: ldo18 {
- regulator-min-microvolt = <2704000>;
- regulator-max-microvolt = <2960000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l19a_3p0: ldo19 {
- regulator-min-microvolt = <2856000>;
- regulator-max-microvolt = <3104000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l20a_2p95: ldo20 {
- regulator-min-microvolt = <2704000>;
- regulator-max-microvolt = <2960000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l21a_2p95: ldo21 {
- regulator-min-microvolt = <2704000>;
- regulator-max-microvolt = <2960000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l22a_2p85: ldo22 {
- regulator-min-microvolt = <2864000>;
- regulator-max-microvolt = <3312000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l23a_3p3: ldo23 {
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3312000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vdda_qusb_hs0_3p1:
- vreg_l24a_3p075: ldo24 {
- regulator-min-microvolt = <3088000>;
- regulator-max-microvolt = <3088000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l25a_3p3: ldo25 {
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3312000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vdda_hp_pcie_1p2:
- vdda_hv_ebi0:
- vdda_hv_ebi1:
- vdda_hv_ebi2:
- vdda_hv_ebi3:
- vdda_mipi_csi_1p25:
- vdda_mipi_dsi0_1p2:
- vdda_mipi_dsi1_1p2:
- vdda_pcie_1p2:
- vdda_ufs1_1p2:
- vdda_ufs2_1p2:
- vdda_usb1_ss_1p2:
- vdda_usb2_ss_1p2:
- vreg_l26a_1p2: ldo26 {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l28a_3p0: ldo28 {
- regulator-min-microvolt = <2856000>;
- regulator-max-microvolt = <3008000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_lvs1a_1p8: lvs1 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vreg_lvs2a_1p8: lvs2 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
- };
-
- pmi8998-rpmh-regulators {
- compatible = "qcom,pmi8998-rpmh-regulators";
- qcom,pmic-id = "b";
-
- vdd-bob-supply = <&vph_pwr>;
-
- vreg_bob: bob {
- regulator-min-microvolt = <3312000>;
- regulator-max-microvolt = <3600000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
- regulator-allow-bypass;
- };
- };
-
- pm8005-rpmh-regulators {
- compatible = "qcom,pm8005-rpmh-regulators";
- qcom,pmic-id = "c";
-
- vdd-s1-supply = <&vph_pwr>;
- vdd-s2-supply = <&vph_pwr>;
- vdd-s3-supply = <&vph_pwr>;
- vdd-s4-supply = <&vph_pwr>;
-
- vreg_s3c_0p6: smps3 {
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <600000>;
- };
- };
-};
-
-/* Reserved memory changes */
-/*
- * The rmtfs memory region in downstream is 'dynamically allocated'
- * but given the same address every time. hard code it here as this address is
- * where the modem firmware expects it to be.
- */
-/delete-node/ &rmtfs_mem;
-
-/ {
- reserved-memory {
- rmtfs_mem: memory@f5b01000 {
- compatible = "qcom,rmtfs-mem";
- reg = <0 0xf5b01000 0 0x200000>;
- no-map;
-
- qcom,client-id = <1>;
- qcom,vmid = <15>;
- };
-
- /*
- * Due to treble implementations and the requirement to reflash
- * the dtbo partition in order to boot downstream without doing a
- * cold reboot, this region has not proven very useful on enchilada.
- */
- ramoops: ramoops@0xac300000 {
- compatible = "ramoops";
- reg = <0 0xac300000 0 0x400000>;
- record-size = <0x40000>;
- console-size = <0x40000>;
- ftrace-size = <0x40000>;
- pmsg-size = <0x200000>;
- devinfo-size = <0x1000>;
- ecc-size = <0x0>;
- };
- };
-};
-
-&gcc {
- protected-clocks = <GCC_QSPI_CORE_CLK>,
- <GCC_QSPI_CORE_CLK_SRC>,
- <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
- <GCC_LPASS_Q6_AXI_CLK>,
- <GCC_LPASS_SWAY_CLK>;
-};
-
-&gpu {
- zap-shader {
- memory-region = <&gpu_mem>;
- firmware-name = "qcom/sdm845/oneplus6/a630_zap.mbn";
- };
-};
-
-&adsp_pas {
- status = "okay";
- firmware-name = "qcom/sdm845/adsp.mbn";
-};
-
-&cdsp_pas {
- status = "okay";
- firmware-name = "qcom/sdm845/cdsp.mbn";
-};
-
-/* Modem/wifi*/
-&mss_pil {
- status = "okay";
- firmware-name = "qcom/sdm845/oneplus6/mba.mbn", "qcom/sdm845/oneplus6/modem.mbn";
-};
-
-&uart6 {
- status = "okay";
-
- bluetooth {
- compatible = "qcom,wcn3990-bt";
-
- /* In subdir qca/ in /lib/firmware */
- //firmware-name = "crbtfw21.tlv";
-
- vddio-supply = <&vreg_s4a_1p8>;
- vddxo-supply = <&vreg_l7a_1p8>;
- vddrf-supply = <&vreg_l17a_1p3>;
- vddch0-supply = <&vreg_l25a_3p3>;
- max-speed = <3200000>;
- };
-};
-
-&qup_uart6_default {
- pinmux {
- pins = "gpio45", "gpio46", "gpio47", "gpio48";
- function = "qup6";
- };
-
- cts {
- pins = "gpio45";
- bias-pull-down;
- };
-
- rts-tx {
- pins = "gpio46", "gpio47";
- drive-strength = <2>;
- bias-disable;
- };
-
- rx {
- pins = "gpio48";
- bias-pull-up;
- };
-};
-
-&ufs_mem_hc {
- status = "okay";
-
- reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
-
- vcc-supply = <&vreg_l20a_2p95>;
- vcc-max-microamp = <600000>;
-};
-
-&ufs_mem_phy {
- status = "okay";
-
- vdda-phy-supply = <&vdda_ufs1_core>;
- vdda-pll-supply = <&vdda_ufs1_1p2>;
-};
-
-&usb_1 {
- status = "okay";
-
- /* disable USB3 clock requirement as we are in USB 2 mode */
- qcom,select-utmi-as-pipe-clk;
-};
-
-&usb_1_dwc3 {
- /*
- * Can't detect USB cable being plugged / unplugged, so this is needed
- * for gadget mode
- */
- dr_mode = "peripheral";
-
- /* fastest mode for USB 2 */
- maximum-speed = "high-speed";
-
- extcon = <&extcon_usb1>;
-
- /* Remove USB3 phy */
- phys = <&usb_1_hsphy>;
- phy-names = "usb2-phy";
-};
-
-&usb_1_hsphy {
- status = "okay";
-
- vdd-supply = <&vdda_usb1_ss_core>;
- vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
- vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
-
- qcom,imp-res-offset-value = <8>;
- qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
- qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
- qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
-};
-
-&wifi {
- status = "okay";
- vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
- vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
- vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
- vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
-};
-
-&mdss {
- status = "okay";
-};
-
-&mdss_mdp {
- status = "okay";
-};
-
-&dsi0 {
- status = "okay";
- vdda-supply = <&vdda_mipi_dsi0_1p2>;
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- display_panel: panel@0 {
- status = "disabled";
-
- port {
- panel_in: endpoint {
- remote-endpoint = <&dsi0_out>;
- };
- };
- };
-};
-
-&dsi0_out {
- remote-endpoint = <&panel_in>;
- data-lanes = <0 1 2 3>;
-};
-
-&dsi0_phy {
- status = "okay";
- vdds-supply = <&vdda_mipi_dsi0_pll>;
-};
-
-/* GENI device - does i2c, uart, spi and all that stuff */
-&qupv3_id_1 {
- status = "okay";
-};
-
-&qupv3_id_0 {
- status = "okay";
-};
-
-&spmi_bus {
- pmi8998_lsid1: pmic@3 {
- lpg {
- status = "okay";
-
- rgb {
- led-sources = <5 4 3>;
- };
-
- red {
- led-sources = <5>;
- };
- green {
- led-sources = <4>;
- };
- blue {
- led-sources = <3>;
- };
- };
- };
-};
-
-&i2c10 {
- status = "okay";
- clock-frequency = <100000>;
-
- bq27541_battery: bq27541-battery@55 {
- status = "okay";
- compatible = "ti,bq27541";
- reg = <0x55>;
- };
-};
-/* PINCTRL - additions to nodes defined in sdm845.dtsi */
-
-&qup_i2c10_default {
- pinconf {
- pins = "gpio55", "gpio56";
- drive-strength = <2>;
- bias-disable;
- };
-};
-
-&qup_uart9_default {
- pinconf-tx {
- pins = "gpio4";
- drive-strength = <2>;
- bias-disable;
- };
-
- pinconf-rx {
- pins = "gpio5";
- drive-strength = <2>;
- bias-pull-up;
- };
-};
-
-&pm8998_gpio {
- volume_down_gpio: pm8998_gpio5 {
- pinconf {
- pins = "gpio5";
- function = "normal";
- input-enable;
- bias-pull-up;
- qcom,drive-strength = <0>;
- };
- };
-
- volume_up_gpio: pm8998_gpio6 {
- pinconf {
- pins = "gpio6";
- function = "normal";
- input-enable;
- bias-pull-up;
- qcom,drive-strength = <0>;
- };
- };
-};
-
-&tlmm {
- gpio-reserved-ranges = <0 4>, <81 4>;
-
- sdc2_clk: sdc2-clk {
- pinconf {
- pins = "sdc2_clk";
- bias-disable;
-
- /*
- * It seems that mmc_test reports errors if drive
- * strength is not 16 on clk, cmd, and data pins.
- */
- drive-strength = <16>;
- };
- };
-
- sdc2_cmd: sdc2-cmd {
- pinconf {
- pins = "sdc2_cmd";
- bias-pull-up;
- drive-strength = <16>;
- };
- };
-
- sdc2_data: sdc2-data {
- pinconf {
- pins = "sdc2_data";
- bias-pull-up;
- drive-strength = <16>;
- };
- };
-
- tri_state_key_default: tri_state_key_default {
- mux {
- pins = "gpio40", "gpio42", "gpio26";
- function = "gpio";
- };
-
- config {
- pins = "gpio40", "gpio42", "gpio26";
- drive-strength = <2>;
- bias-disable;
- };
- };
-
- i2c_ts_pins: i2c-touch-default {
- mux {
- pins = "gpio49", "gpio50";
- function = "gpio";
- };
-
- config {
- pins = "gpio49", "gpio50";
- drive-strength = <2>;
- bias-disable;
- };
- };
-
- ts_default_pins: ts-int {
- mux {
- pins = "gpio99", "gpio125";
- function = "gpio";
- };
-
- config {
- pins = "gpio99", "gpio125";
- drive-strength = <16>;
- bias-pull-up;
- };
- };
-
- ts_enable_1p8: ts-1p8 {
- mux {
- pins = "gpio88";
- function = "gpio";
- };
-
- config {
- pins = "gpio88";
- drive-strength = <16>;
- bias-pull-up;
- };
- };
-
- panel_reset_pins: panel-reset {
- mux {
- pins = "gpio6", "gpio25", "gpio26";
- function = "gpio";
- };
-
- config {
- pins = "gpio6", "gpio25", "gpio26";
- drive-strength = <8>;
- bias-disable = <0>;
- };
- };
-
- panel_te_pin: panel-te {
- mux {
- pins = "gpio10";
- function = "mdp_vsync";
- };
-
- config {
- pins = "gpio10";
- drive-strength = <2>;
- bias-disable;
- input-enable;
- };
- };
-
- panel_esd_pin: panel-esd {
- mux {
- pins = "gpio30";
- function = "gpio";
- };
- config {
- pins = "gpio30";
- drive-strength = <2>;
- bias-pull-down;
- input-enable;
- };
- };
-
-};
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * SDM845 OnePlus 6T (fajita) specific device tree
- *
- * Copyright (c) 2020, The Linux Foundation. All rights reserved.
- */
-
-#include "sdm845-oneplus-enchilada.dtsi"
-
-/ {
- model = "OnePlus 6T";
- compatible = "oneplus-fajita", "qcom,sdm845";
-};
-
-&display_panel {
- compatible = "samsung,s6e3fc2x01";
- status = "okay";
-
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
-
- vddio-supply = <&vreg_l14a_1p88>;
-
- reset-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&panel_reset_pins &panel_te_pin &panel_esd_pin>;
-};
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2020, Sophon Wu <strongtz@yeah.net>
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
-#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
-#include "sdm845.dtsi"
-#include "pm8998.dtsi"
-#include "pmi8998.dtsi"
-#include "pm8005.dtsi"
-
-/ {
- model = "Xiaomi MI 8";
- compatible = "xiaomi,dipper", "qcom,sdm845";
- /* required for bootloader to select correct board */
- qcom,board-id = <0x36 0x0>;
- qcom,msm-id = <0x141 0x20000>;
-
- aliases {
- serial0 = &uart9;
- hsuart0 = &uart6;
- };
-
- chosen {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- // For simplefb hack
- stdout-path = "display0";
-
- /* hack: use framebuffer setup by bootloader.
- * the address is taken from the bootloader config (strings xbl.img | grep "Display Reserved")
- */
- framebuffer0: framebuffer@9d400000 {
- compatible = "simple-framebuffer";
- reg = <0 0x9D400000 0 0x02400000>;
- width = <1080>;
- height = <2248>;
- stride = <(1080 * 4)>;
- format = "a8r8g8b8";
- status = "okay";
- };
- };
-
- vph_pwr: vph-pwr-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vph_pwr";
- regulator-min-microvolt = <3700000>;
- regulator-max-microvolt = <3700000>;
- };
-
- vbat: vbat-regulator {
- compatible = "regulator-fixed";
- regulator-name = "VBAT";
-
- vin-supply = <&vph_pwr>;
- regulator-min-microvolt = <4200000>;
- regulator-max-microvolt = <4200000>;
- regulator-always-on;
- };
-
- vbat_som: vbat-som-regulator {
- compatible = "regulator-fixed";
- regulator-name = "VBAT_SOM";
-
- vin-supply = <&vph_pwr>;
- regulator-min-microvolt = <4200000>;
- regulator-max-microvolt = <4200000>;
- regulator-always-on;
- };
-
- vdc_3v3: vdc-3v3-regulator {
- compatible = "regulator-fixed";
- regulator-name = "VDC_3V3";
- vin-supply = <&vph_pwr>;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-
- vdc_5v: vdc-5v-regulator {
- compatible = "regulator-fixed";
- regulator-name = "VDC_5V";
-
- vin-supply = <&vph_pwr>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <500000>;
- regulator-always-on;
- };
-
- /*
- * Apparently RPMh does not provide support for PM8998 S4 because it
- * is always-on; model it as a fixed regulator.
- */
- vreg_s4a_1p8: pm8998-smps4 {
- compatible = "regulator-fixed";
- regulator-name = "vreg_s4a_1p8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vph_pwr>;
- };
-
-
- gpio_keys {
- compatible = "gpio-keys";
- autorepeat;
-
- pinctrl-names = "default";
- pinctrl-0 = <&vol_up_pin_a>;
-
- vol-up {
- label = "Volume Up";
- linux,code = <KEY_VOLUMEUP>;
- gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-&adsp_pas {
- status = "okay";
- firmware-name = "qcom/adsp.mbn";
-};
-
-&apps_rsc {
- pm8998-rpmh-regulators {
- compatible = "qcom,pm8998-rpmh-regulators";
- qcom,pmic-id = "a";
- vdd-s1-supply = <&vph_pwr>;
- vdd-s2-supply = <&vph_pwr>;
- vdd-s3-supply = <&vph_pwr>;
- vdd-s4-supply = <&vph_pwr>;
- vdd-s5-supply = <&vph_pwr>;
- vdd-s6-supply = <&vph_pwr>;
- vdd-s7-supply = <&vph_pwr>;
- vdd-s8-supply = <&vph_pwr>;
- vdd-s9-supply = <&vph_pwr>;
- vdd-s10-supply = <&vph_pwr>;
- vdd-s11-supply = <&vph_pwr>;
- vdd-s12-supply = <&vph_pwr>;
- vdd-s13-supply = <&vph_pwr>;
- vdd-l1-l27-supply = <&vreg_s7a_1p025>;
- vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
- vdd-l3-l11-supply = <&vreg_s7a_1p025>;
- vdd-l4-l5-supply = <&vreg_s7a_1p025>;
- vdd-l6-supply = <&vph_pwr>;
- vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
- vdd-l9-supply = <&vreg_bob>;
- vdd-l10-l23-l25-supply = <&vreg_bob>;
- vdd-l13-l19-l21-supply = <&vreg_bob>;
- vdd-l16-l28-supply = <&vreg_bob>;
- vdd-l18-l22-supply = <&vreg_bob>;
- vdd-l20-l24-supply = <&vreg_bob>;
- vdd-l26-supply = <&vreg_s3a_1p35>;
- vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
-
- vreg_s2a_1p1: smps2 {
- regulator-always-on;
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- };
-
- vreg_s3a_1p35: smps3 {
- regulator-min-microvolt = <1352000>;
- regulator-max-microvolt = <1352000>;
- };
-
- // vreg_s4a_1p8: smps4 {
- // regulator-min-microvolt = <1800000>;
- // regulator-max-microvolt = <1800000>;
- // };
-
- vreg_s5a_2p04: smps5 {
- regulator-always-on;
- regulator-min-microvolt = <1904000>;
- regulator-max-microvolt = <2040000>;
- };
-
- vreg_s7a_1p025: smps7 {
- regulator-always-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1028000>;
- };
-
- vdda_ufs1_core:
- vreg_l1a_0p875: ldo1 {
- regulator-min-microvolt = <880000>;
- regulator-max-microvolt = <880000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- // vreg_l2a_0p875: ldo2 {
- // regulator-min-microvolt = <1200000>;
- // regulator-max-microvolt = <1200000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // regulator-always-on;
- // };
-
- // vreg_l3a_0p875: ldo3 {
- // regulator-min-microvolt = <1000000>;
- // regulator-max-microvolt = <1000000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- vreg_l5a_0p8: ldo5 {
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- // vreg_l6a_1p8: ldo6 {
- // regulator-min-microvolt = <1856000>;
- // regulator-max-microvolt = <1856000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- vreg_l7a_1p8: ldo7 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- // vreg_l8a_1p2: ldo8 {
- // regulator-min-microvolt = <1200000>;
- // regulator-max-microvolt = <1248000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- // vreg_l9a_2p95: ldo9 {
- // regulator-min-microvolt = <1704000>;
- // regulator-max-microvolt = <2928000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- // vreg_l10a_2p95: ldo10 {
- // regulator-min-microvolt = <1704000>;
- // regulator-max-microvolt = <2928000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- // vreg_l11a_1p05: ldo11 {
- // regulator-min-microvolt = <1000000>;
- // regulator-max-microvolt = <1048000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- vreg_l12a_1p8: ldo12 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- // vreg_l13a_2p95: ldo13 {
- // regulator-min-microvolt = <1800000>;
- // regulator-max-microvolt = <2960000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
-
- // dsi and touchscreen maybe
- vreg_l14a_1p8: ldo14 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1880000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- // vreg_l15a_1p8: ldo15 {
- // regulator-min-microvolt = <1800000>;
- // regulator-max-microvolt = <1800000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- // vreg_l16a_2p7: ldo16 {
- // regulator-min-microvolt = <2704000>;
- // regulator-max-microvolt = <2704000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- vreg_l17a_1p3: ldo17 {
- regulator-always-on;
- regulator-min-microvolt = <1304000>;
- regulator-max-microvolt = <1304000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- // vreg_l18a_2p9: ldo18 {
- // regulator-min-microvolt = <2704000>;
- // regulator-max-microvolt = <2960000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- // vreg_l19a_3p1: ldo19 {
- // regulator-min-microvolt = <2856000>;
- // regulator-max-microvolt = <3104000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- vreg_l20a_2p95: ldo20 {
- regulator-min-microvolt = <2704000>;
- regulator-max-microvolt = <2960000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- // vreg_l21a_2p95: ldo21 {
- // regulator-min-microvolt = <2704000>;
- // regulator-max-microvolt = <2960000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- // vreg_l22a_3p3: ldo22 {
- // regulator-min-microvolt = <2864000>;
- // regulator-max-microvolt = <3312000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- // vreg_l23a_3p3: ldo23 {
- // regulator-min-microvolt = <3000000>;
- // regulator-max-microvolt = <3312000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- vreg_l24a_3p075: ldo24 {
- regulator-min-microvolt = <3088000>;
- regulator-max-microvolt = <3088000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l25a_3p3: ldo25 {
- regulator-always-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3312000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vdda_ufs1_1p2:
- vreg_l26a_1p2: ldo26 {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_lvs1a_1p8: lvs1 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
-
- vreg_lvs2a_1p8: lvs2 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
- };
-
- pmi8998-rpmh-regulators {
- compatible = "qcom,pmi8998-rpmh-regulators";
- qcom,pmic-id = "b";
-
- vdd-bob-supply = <&vph_pwr>;
-
- vreg_bob: bob {
- regulator-min-microvolt = <3312000>;
- regulator-max-microvolt = <3600000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
- regulator-allow-bypass;
- };
- };
-
- pm8005-rpmh-regulators {
- compatible = "qcom,pm8005-rpmh-regulators";
- qcom,pmic-id = "c";
-
- vreg_smp3c_0p6: smps3 {
- regulator-always-on;
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <600000>;
- };
- };
-};
-
-&apps_smmu {
- /* Enable this when upstream smmu driver gets patched */
- status = "okay";
-};
-
-&cdsp_pas {
- status = "okay";
- firmware-name = "qcom/cdsp.mbn";
-};
-
-
-
-
-// vreg_l14a_1p8
-
-// &dsi0 {
-// status = "okay";
-// vdda-supply = <&vreg_l26a_1p2>;
-
-// #address-cells = <1>;
-// #size-cells = <0>;
-
-// display_panel: panel@0 {
-// status = "disabled";
-
-// port {
-// panel_in: endpoint {
-// remote-endpoint = <&dsi0_out>;
-// };
-// };
-// };
-// };
-
-// &dsi0_out {
-// remote-endpoint = <&panel_in>;
-// data-lanes = <0 1 2 3>;
-// };
-
-// &dsi0_phy {
-// status = "okay";
-// vdds-supply = <&vreg_l1a_0p875>;
-// };
-
-// &display_panel {
-// compatible = "visionox,fhd-r66455";
-// status = "okay";
-
-// #address-cells = <1>;
-// #size-cells = <0>;
-// reg = <0>;
-
-// vddio-supply = <&vreg_l14a_1p8>;
-
-// reset-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
-
-// pinctrl-names = "default";
-// pinctrl-0 = <&panel_reset_pins &panel_te_pin>;
-// };
-
-
-
-
-&gcc {
- protected-clocks = <GCC_QSPI_CORE_CLK>,
- <GCC_QSPI_CORE_CLK_SRC>,
- <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
- <GCC_LPASS_Q6_AXI_CLK>,
- <GCC_LPASS_SWAY_CLK>;
-};
-
-&gpu {
- /*
- * note: the amd,imageon compatible makes it possible
- * to use the drm/msm driver without the display node,
- * make sure to remove it when display node is added
- */
- compatible = "qcom,adreno-630.2",
- "qcom,adreno",
- "amd,imageon";
- zap-shader {
- memory-region = <&gpu_mem>;
- firmware-name = "qcom/a630_zap.mbn";
- };
-};
-
-&ipa {
- status = "okay";
- modem-init;
- memory-region = <&ipa_fw_mem>;
-};
-
-/* NFC */
-&i2c3 {
- status = "okay";
- clock-frequency = <400000>;
-};
-
-/* Audio Amplifier tas2557 */
-&i2c5 {
- status = "okay";
- clock-frequency = <400000>;
-};
-
-/* smb1355 and lm3644 LED */
-&i2c10 {
- status = "okay";
- clock-frequency = <400000>;
-};
-
-/* fts touchscreen */
-&i2c14 {
- status = "okay";
- clock-frequency = <400000>;
-};
-
-// &mdss {
-// status = "okay";
-// };
-
-// &mdss_mdp {
-// status = "okay";
-// };
-
-&mss_pil {
- status = "okay";
- firmware-name = "qcom/mba.mbn", "qcom/modem.mbn";
-};
-
-&pm8998_gpio {
- vol_up_pin_a: vol-up-active {
- pins = "gpio6";
- function = "normal";
- input-enable;
- bias-pull-up;
- qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
- };
-};
-
-&pm8998_pon {
- resin {
- compatible = "qcom,pm8941-resin";
- interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
- debounce = <15625>;
- bias-pull-up;
- linux,code = <KEY_VOLUMEDOWN>;
- };
-};
-
-&qupv3_id_0 {
- status = "okay";
-};
-
-&qupv3_id_1 {
- status = "okay";
-};
-
-&tlmm {
- gpio-reserved-ranges = <0 4>, <81 4>;
-
- panel_reset_pins: panel-reset {
- mux {
- pins = "gpio6", "gpio52";
- function = "gpio";
- };
-
- config {
- pins = "gpio6", "gpio52";
- drive-strength = <8>;
- bias-disable = <0>;
- };
- };
-
- panel_te_pin: panel-te {
- mux {
- pins = "gpio10";
- function = "mdp_vsync";
- };
-
- config {
- pins = "gpio10";
- drive-strength = <2>;
- bias-disable;
- input-enable;
- };
- };
-};
-
-&uart6 {
- status = "okay";
-
- bluetooth {
- compatible = "qcom,wcn3990-bt";
- vddio-supply = <&vreg_s4a_1p8>;
- vddxo-supply = <&vreg_l7a_1p8>;
- vddrf-supply = <&vreg_l17a_1p3>;
- vddch0-supply = <&vreg_l25a_3p3>;
- max-speed = <3200000>;
- };
-};
-
-
-&usb_1 {
- status = "okay";
- /* We'll use this as USB 2.0 only */
- qcom,select-utmi-as-pipe-clk;
-};
-
-&usb_1_dwc3 {
- dr_mode = "peripheral";
-
- /* fastest mode for USB 2 */
- maximum-speed = "high-speed";
-
- /* Remove USB3 phy */
- phys = <&usb_1_hsphy>;
- phy-names = "usb2-phy";
-};
-
-&usb_1_hsphy {
- status = "okay";
-
- vdd-supply = <&vreg_l1a_0p875>;
- vdda-pll-supply = <&vreg_l12a_1p8>;
- vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
-
- qcom,imp-res-offset-value = <8>;
- qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
- qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
- qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
-};
-
-&usb_1_qmpphy {
- status = "okay";
-
- vdda-phy-supply = <&vreg_l26a_1p2>;
- vdda-pll-supply = <&vreg_l1a_0p875>;
-};
-
-
-&ufs_mem_hc {
- status = "okay";
- reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
- vcc-supply = <&vreg_l20a_2p95>;
- vcc-max-microamp = <800000>;
-};
-
-&ufs_mem_phy {
- status = "okay";
- vdda-phy-supply = <&vdda_ufs1_core>;
- vdda-pll-supply = <&vdda_ufs1_1p2>;
-};
-
-&wifi {
- status = "okay";
-
- vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
- vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
- vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
- vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
-
- qcom,snoc-host-cap-8bit-quirk;
-};
-
-/* PINCTRL - additions to nodes defined in sdm845.dtsi */
-
-&qup_uart6_default {
- pinmux {
- pins = "gpio45", "gpio46", "gpio47", "gpio48";
- function = "qup6";
- };
-
- cts {
- pins = "gpio45";
- bias-disable;
- };
-
- rts-tx {
- pins = "gpio46", "gpio47";
- drive-strength = <2>;
- bias-disable;
- };
-
- rx {
- pins = "gpio48";
- bias-pull-up;
- };
-};
-
-/* Reserved memory changes */
-/*
- * The memory regions related to the modem have to be changed
- * according to the adresses in downstream as
- * the modem is hard-coded to expect these regions to be at those adresses.
- *
- */
-/delete-node/ &rmtfs_mem;
-/delete-node/ &adsp_mem;
-/delete-node/ &wlan_msa_mem;
-/delete-node/ &mpss_region;
-/delete-node/ &venus_mem;
-/delete-node/ &cdsp_mem;
-/delete-node/ &mba_region;
-/delete-node/ &slpi_mem;
-/delete-node/ &spss_mem;
-
-/ {
- reserved-memory {
- rmtfs_mem: memory@f6301000 {
- compatible = "qcom,rmtfs-mem";
- reg = <0 0xf6301000 0 0x200000>;
- no-map;
-
- qcom,client-id = <1>;
- qcom,vmid = <15>;
- };
-
- adsp_mem: memory@8c500000 {
- reg = <0 0x8c500000 0 0x1e00000>;
- no-map;
- };
-
- wlan_msa_mem: memory@8e300000 {
- reg = <0 0x8e300000 0 0x100000>;
- no-map;
- };
-
- mpss_region: memory@8e400000 {
- reg = <0 0x8e400000 0 0x7800000>;
- no-map;
- };
-
- venus_mem: memory@95c00000 {
- reg = <0 0x95c00000 0 0x500000>;
- no-map;
- };
-
- cdsp_mem: memory@96100000 {
- reg = <0 0x96100000 0 0x800000>;
- no-map;
- };
-
- mba_region: memory@96900000 {
- reg = <0 0x96900000 0 0x200000>;
- no-map;
- };
-
- slpi_mem: memory@96b00000 {
- reg = <0 0x96b00000 0 0x1400000>;
- no-map;
- };
-
- spss_mem: memory@97f00000 {
- reg = <0 0x97f00000 0 0x100000>;
- no-map;
- };
-
- /* hack: bootloader framebuffer */
- cont_splash_region: memory@9d400000 {
- compatible = "removed-dma-pool";
- reg = <0 0x9D400000 0 0x02400000>;
- no-map;
- };
-
- ramoops: ramoops@b0000000 {
- compatible = "ramoops";
- reg = <0 0xb0000000 0 0x00400000>;
- record-size = <0x40000>; /*256x1024*/
- console-size = <0x40000>;
- ftrace-size = <0x40000>;
- pmsg-size = <0x200000>;
- ecc-size = <0x0>;
- };
-
- };
-};
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2021, BigfootACA <bigfoot@classfun.cn>
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
-#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
-#include "sdm845.dtsi"
-#include "pm8998.dtsi"
-#include "pmi8998.dtsi"
-#include "pm8005.dtsi"
-
-/ {
- model = "Xiaomi MIX3";
- compatible = "xiaomi,dipper", "qcom,sdm845";
- /* required for bootloader to select correct board */
- qcom,board-id = <0x63 0x0>;
- qcom,msm-id = <0x141 0x20001>;
-
- aliases {
- serial0 = &uart9;
- hsuart0 = &uart6;
- };
-
- chosen {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- // For simplefb hack
- stdout-path = "display0";
-
- /* hack: use framebuffer setup by bootloader.
- * the address is taken from the bootloader config (strings xbl.img | grep "Display Reserved")
- */
- framebuffer0: framebuffer@9d400000 {
- compatible = "simple-framebuffer";
- reg = <0 0x9D400000 0 0x02400000>;
- width = <1080>;
- height = <2340>;
- stride = <(1080 * 4)>;
- format = "a8r8g8b8";
- status = "okay";
- };
- };
-
- vph_pwr: vph-pwr-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vph_pwr";
- regulator-min-microvolt = <3700000>;
- regulator-max-microvolt = <3700000>;
- };
-
- vbat: vbat-regulator {
- compatible = "regulator-fixed";
- regulator-name = "VBAT";
-
- vin-supply = <&vph_pwr>;
- regulator-min-microvolt = <4200000>;
- regulator-max-microvolt = <4200000>;
- regulator-always-on;
- };
-
- vbat_som: vbat-som-regulator {
- compatible = "regulator-fixed";
- regulator-name = "VBAT_SOM";
-
- vin-supply = <&vph_pwr>;
- regulator-min-microvolt = <4200000>;
- regulator-max-microvolt = <4200000>;
- regulator-always-on;
- };
-
- vdc_3v3: vdc-3v3-regulator {
- compatible = "regulator-fixed";
- regulator-name = "VDC_3V3";
- vin-supply = <&vph_pwr>;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-
- vdc_5v: vdc-5v-regulator {
- compatible = "regulator-fixed";
- regulator-name = "VDC_5V";
-
- vin-supply = <&vph_pwr>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <500000>;
- regulator-always-on;
- };
-
- /*
- * Apparently RPMh does not provide support for PM8998 S4 because it
- * is always-on; model it as a fixed regulator.
- */
- vreg_s4a_1p8: pm8998-smps4 {
- compatible = "regulator-fixed";
- regulator-name = "vreg_s4a_1p8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vph_pwr>;
- };
-
-
- gpio_keys {
- compatible = "gpio-keys";
- autorepeat;
-
- pinctrl-names = "default";
- pinctrl-0 = <&vol_up_pin_a>;
-
- vol-up {
- label = "Volume Up";
- linux,code = <KEY_VOLUMEUP>;
- gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-&adsp_pas {
- status = "okay";
- firmware-name = "qcom/adsp.mbn";
-};
-
-&apps_rsc {
- pm8998-rpmh-regulators {
- compatible = "qcom,pm8998-rpmh-regulators";
- qcom,pmic-id = "a";
- vdd-s1-supply = <&vph_pwr>;
- vdd-s2-supply = <&vph_pwr>;
- vdd-s3-supply = <&vph_pwr>;
- vdd-s4-supply = <&vph_pwr>;
- vdd-s5-supply = <&vph_pwr>;
- vdd-s6-supply = <&vph_pwr>;
- vdd-s7-supply = <&vph_pwr>;
- vdd-s8-supply = <&vph_pwr>;
- vdd-s9-supply = <&vph_pwr>;
- vdd-s10-supply = <&vph_pwr>;
- vdd-s11-supply = <&vph_pwr>;
- vdd-s12-supply = <&vph_pwr>;
- vdd-s13-supply = <&vph_pwr>;
- vdd-l1-l27-supply = <&vreg_s7a_1p025>;
- vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
- vdd-l3-l11-supply = <&vreg_s7a_1p025>;
- vdd-l4-l5-supply = <&vreg_s7a_1p025>;
- vdd-l6-supply = <&vph_pwr>;
- vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
- vdd-l9-supply = <&vreg_bob>;
- vdd-l10-l23-l25-supply = <&vreg_bob>;
- vdd-l13-l19-l21-supply = <&vreg_bob>;
- vdd-l16-l28-supply = <&vreg_bob>;
- vdd-l18-l22-supply = <&vreg_bob>;
- vdd-l20-l24-supply = <&vreg_bob>;
- vdd-l26-supply = <&vreg_s3a_1p35>;
- vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
-
- vreg_s2a_1p1: smps2 {
- regulator-always-on;
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- };
-
- vreg_s3a_1p35: smps3 {
- regulator-min-microvolt = <1352000>;
- regulator-max-microvolt = <1352000>;
- };
-
- // vreg_s4a_1p8: smps4 {
- // regulator-min-microvolt = <1800000>;
- // regulator-max-microvolt = <1800000>;
- // };
-
- vreg_s5a_2p04: smps5 {
- regulator-always-on;
- regulator-min-microvolt = <1904000>;
- regulator-max-microvolt = <2040000>;
- };
-
- vreg_s7a_1p025: smps7 {
- regulator-always-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1028000>;
- };
-
- vdda_ufs1_core:
- vreg_l1a_0p875: ldo1 {
- regulator-min-microvolt = <880000>;
- regulator-max-microvolt = <880000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- // vreg_l2a_0p875: ldo2 {
- // regulator-min-microvolt = <1200000>;
- // regulator-max-microvolt = <1200000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // regulator-always-on;
- // };
-
- // vreg_l3a_0p875: ldo3 {
- // regulator-min-microvolt = <1000000>;
- // regulator-max-microvolt = <1000000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- vreg_l5a_0p8: ldo5 {
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- // vreg_l6a_1p8: ldo6 {
- // regulator-min-microvolt = <1856000>;
- // regulator-max-microvolt = <1856000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- vreg_l7a_1p8: ldo7 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- // vreg_l8a_1p2: ldo8 {
- // regulator-min-microvolt = <1200000>;
- // regulator-max-microvolt = <1248000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- // vreg_l9a_2p95: ldo9 {
- // regulator-min-microvolt = <1704000>;
- // regulator-max-microvolt = <2928000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- // vreg_l10a_2p95: ldo10 {
- // regulator-min-microvolt = <1704000>;
- // regulator-max-microvolt = <2928000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- // vreg_l11a_1p05: ldo11 {
- // regulator-min-microvolt = <1000000>;
- // regulator-max-microvolt = <1048000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- vreg_l12a_1p8: ldo12 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- // vreg_l13a_2p95: ldo13 {
- // regulator-min-microvolt = <1800000>;
- // regulator-max-microvolt = <2960000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
-
- // dsi and touchscreen maybe
- vreg_l14a_1p8: ldo14 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1880000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- // vreg_l15a_1p8: ldo15 {
- // regulator-min-microvolt = <1800000>;
- // regulator-max-microvolt = <1800000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- // vreg_l16a_2p7: ldo16 {
- // regulator-min-microvolt = <2704000>;
- // regulator-max-microvolt = <2704000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- vreg_l17a_1p3: ldo17 {
- regulator-always-on;
- regulator-min-microvolt = <1304000>;
- regulator-max-microvolt = <1304000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- // vreg_l18a_2p9: ldo18 {
- // regulator-min-microvolt = <2704000>;
- // regulator-max-microvolt = <2960000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- // vreg_l19a_3p1: ldo19 {
- // regulator-min-microvolt = <2856000>;
- // regulator-max-microvolt = <3104000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- vreg_l20a_2p95: ldo20 {
- regulator-min-microvolt = <2704000>;
- regulator-max-microvolt = <2960000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- // vreg_l21a_2p95: ldo21 {
- // regulator-min-microvolt = <2704000>;
- // regulator-max-microvolt = <2960000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- // vreg_l22a_3p3: ldo22 {
- // regulator-min-microvolt = <2864000>;
- // regulator-max-microvolt = <3312000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- // vreg_l23a_3p3: ldo23 {
- // regulator-min-microvolt = <3000000>;
- // regulator-max-microvolt = <3312000>;
- // regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- // };
-
- vreg_l24a_3p075: ldo24 {
- regulator-min-microvolt = <3088000>;
- regulator-max-microvolt = <3088000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l25a_3p3: ldo25 {
- regulator-always-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3312000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vdda_ufs1_1p2:
- vreg_l26a_1p2: ldo26 {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_lvs1a_1p8: lvs1 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
-
- vreg_lvs2a_1p8: lvs2 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
- };
-
- pmi8998-rpmh-regulators {
- compatible = "qcom,pmi8998-rpmh-regulators";
- qcom,pmic-id = "b";
-
- vdd-bob-supply = <&vph_pwr>;
-
- vreg_bob: bob {
- regulator-min-microvolt = <3312000>;
- regulator-max-microvolt = <3600000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
- regulator-allow-bypass;
- };
- };
-
- pm8005-rpmh-regulators {
- compatible = "qcom,pm8005-rpmh-regulators";
- qcom,pmic-id = "c";
-
- vreg_smp3c_0p6: smps3 {
- regulator-always-on;
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <600000>;
- };
- };
-};
-
-&apps_smmu {
- /* Enable this when upstream smmu driver gets patched */
- status = "okay";
-};
-
-&cdsp_pas {
- status = "okay";
- firmware-name = "qcom/cdsp.mbn";
-};
-
-
-
-
-// vreg_l14a_1p8
-
-// &dsi0 {
-// status = "okay";
-// vdda-supply = <&vreg_l26a_1p2>;
-
-// #address-cells = <1>;
-// #size-cells = <0>;
-
-// display_panel: panel@0 {
-// status = "disabled";
-
-// port {
-// panel_in: endpoint {
-// remote-endpoint = <&dsi0_out>;
-// };
-// };
-// };
-// };
-
-// &dsi0_out {
-// remote-endpoint = <&panel_in>;
-// data-lanes = <0 1 2 3>;
-// };
-
-// &dsi0_phy {
-// status = "okay";
-// vdds-supply = <&vreg_l1a_0p875>;
-// };
-
-// &display_panel {
-// compatible = "visionox,fhd-r66455";
-// status = "okay";
-
-// #address-cells = <1>;
-// #size-cells = <0>;
-// reg = <0>;
-
-// vddio-supply = <&vreg_l14a_1p8>;
-
-// reset-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
-
-// pinctrl-names = "default";
-// pinctrl-0 = <&panel_reset_pins &panel_te_pin>;
-// };
-
-
-
-
-&gcc {
- protected-clocks = <GCC_QSPI_CORE_CLK>,
- <GCC_QSPI_CORE_CLK_SRC>,
- <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
- <GCC_LPASS_Q6_AXI_CLK>,
- <GCC_LPASS_SWAY_CLK>;
-};
-
-&gpu {
- /*
- * note: the amd,imageon compatible makes it possible
- * to use the drm/msm driver without the display node,
- * make sure to remove it when display node is added
- */
- compatible = "qcom,adreno-630.2",
- "qcom,adreno",
- "amd,imageon";
- zap-shader {
- memory-region = <&gpu_mem>;
- firmware-name = "qcom/a630_zap.mbn";
- };
-};
-
-&ipa {
- status = "okay";
- modem-init;
- memory-region = <&ipa_fw_mem>;
-};
-
-/* NFC */
-&i2c3 {
- status = "okay";
- clock-frequency = <400000>;
-};
-
-/* Audio Amplifier tas2557 */
-&i2c5 {
- status = "okay";
- clock-frequency = <400000>;
-};
-
-/* smb1355 and lm3644 LED */
-&i2c10 {
- status = "okay";
- clock-frequency = <400000>;
-};
-
-/* fts touchscreen */
-&i2c14 {
- status = "okay";
- clock-frequency = <400000>;
-};
-
-// &mdss {
-// status = "okay";
-// };
-
-// &mdss_mdp {
-// status = "okay";
-// };
-
-&mss_pil {
- status = "okay";
- firmware-name = "qcom/mba.mbn", "qcom/modem.mbn";
-};
-
-&pm8998_gpio {
- vol_up_pin_a: vol-up-active {
- pins = "gpio6";
- function = "normal";
- input-enable;
- bias-pull-up;
- qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
- };
-};
-
-&pm8998_pon {
- resin {
- compatible = "qcom,pm8941-resin";
- interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
- debounce = <15625>;
- bias-pull-up;
- linux,code = <KEY_VOLUMEDOWN>;
- };
-};
-
-&qupv3_id_0 {
- status = "okay";
-};
-
-&qupv3_id_1 {
- status = "okay";
-};
-
-&tlmm {
- gpio-reserved-ranges = <0 4>, <81 4>;
-
- panel_reset_pins: panel-reset {
- mux {
- pins = "gpio6", "gpio52";
- function = "gpio";
- };
-
- config {
- pins = "gpio6", "gpio52";
- drive-strength = <8>;
- bias-disable = <0>;
- };
- };
-
- panel_te_pin: panel-te {
- mux {
- pins = "gpio10";
- function = "mdp_vsync";
- };
-
- config {
- pins = "gpio10";
- drive-strength = <2>;
- bias-disable;
- input-enable;
- };
- };
-};
-
-&uart6 {
- status = "okay";
-
- bluetooth {
- compatible = "qcom,wcn3990-bt";
- vddio-supply = <&vreg_s4a_1p8>;
- vddxo-supply = <&vreg_l7a_1p8>;
- vddrf-supply = <&vreg_l17a_1p3>;
- vddch0-supply = <&vreg_l25a_3p3>;
- max-speed = <3200000>;
- };
-};
-
-
-&usb_1 {
- status = "okay";
- /* We'll use this as USB 2.0 only */
- qcom,select-utmi-as-pipe-clk;
-};
-
-&usb_1_dwc3 {
- dr_mode = "peripheral";
-
- /* fastest mode for USB 2 */
- maximum-speed = "high-speed";
-
- /* Remove USB3 phy */
- phys = <&usb_1_hsphy>;
- phy-names = "usb2-phy";
-};
-
-&usb_1_hsphy {
- status = "okay";
-
- vdd-supply = <&vreg_l1a_0p875>;
- vdda-pll-supply = <&vreg_l12a_1p8>;
- vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
-
- qcom,imp-res-offset-value = <8>;
- qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
- qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
- qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
-};
-
-&usb_1_qmpphy {
- status = "okay";
-
- vdda-phy-supply = <&vreg_l26a_1p2>;
- vdda-pll-supply = <&vreg_l1a_0p875>;
-};
-
-
-&ufs_mem_hc {
- status = "okay";
- reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
- vcc-supply = <&vreg_l20a_2p95>;
- vcc-max-microamp = <800000>;
-};
-
-&ufs_mem_phy {
- status = "okay";
- vdda-phy-supply = <&vdda_ufs1_core>;
- vdda-pll-supply = <&vdda_ufs1_1p2>;
-};
-
-&wifi {
- status = "okay";
-
- vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
- vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
- vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
- vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
-
- qcom,snoc-host-cap-8bit-quirk;
-};
-
-/* PINCTRL - additions to nodes defined in sdm845.dtsi */
-
-&qup_uart6_default {
- pinmux {
- pins = "gpio45", "gpio46", "gpio47", "gpio48";
- function = "qup6";
- };
-
- cts {
- pins = "gpio45";
- bias-disable;
- };
-
- rts-tx {
- pins = "gpio46", "gpio47";
- drive-strength = <2>;
- bias-disable;
- };
-
- rx {
- pins = "gpio48";
- bias-pull-up;
- };
-};
-
-/* Reserved memory changes */
-/*
- * The memory regions related to the modem have to be changed
- * according to the adresses in downstream as
- * the modem is hard-coded to expect these regions to be at those adresses.
- *
- */
-/delete-node/ &rmtfs_mem;
-/delete-node/ &adsp_mem;
-/delete-node/ &wlan_msa_mem;
-/delete-node/ &mpss_region;
-/delete-node/ &venus_mem;
-/delete-node/ &cdsp_mem;
-/delete-node/ &mba_region;
-/delete-node/ &slpi_mem;
-/delete-node/ &spss_mem;
-
-/ {
- reserved-memory {
- rmtfs_mem: memory@f6301000 {
- compatible = "qcom,rmtfs-mem";
- reg = <0 0xf6301000 0 0x200000>;
- no-map;
-
- qcom,client-id = <1>;
- qcom,vmid = <15>;
- };
-
- adsp_mem: memory@8c500000 {
- reg = <0 0x8c500000 0 0x1e00000>;
- no-map;
- };
-
- wlan_msa_mem: memory@8e300000 {
- reg = <0 0x8e300000 0 0x100000>;
- no-map;
- };
-
- mpss_region: memory@8e400000 {
- reg = <0 0x8e400000 0 0x7800000>;
- no-map;
- };
-
- venus_mem: memory@95c00000 {
- reg = <0 0x95c00000 0 0x500000>;
- no-map;
- };
-
- cdsp_mem: memory@96100000 {
- reg = <0 0x96100000 0 0x800000>;
- no-map;
- };
-
- mba_region: memory@96900000 {
- reg = <0 0x96900000 0 0x200000>;
- no-map;
- };
-
- slpi_mem: memory@96b00000 {
- reg = <0 0x96b00000 0 0x1400000>;
- no-map;
- };
-
- spss_mem: memory@97f00000 {
- reg = <0 0x97f00000 0 0x100000>;
- no-map;
- };
-
- /* hack: bootloader framebuffer */
- cont_splash_region: memory@9d400000 {
- compatible = "removed-dma-pool";
- reg = <0 0x9D400000 0 0x02400000>;
- no-map;
- };
-
- ramoops: ramoops@b0000000 {
- compatible = "ramoops";
- reg = <0 0xb0000000 0 0x00400000>;
- record-size = <0x40000>; /*256x1024*/
- console-size = <0x40000>;
- ftrace-size = <0x40000>;
- pmsg-size = <0x200000>;
- ecc-size = <0x0>;
- };
-
- };
-};
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2020, Xilin Wu <strongtz@yeah.net>
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
-#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
-#include <dt-bindings/input/linux-event-codes.h>
-#include "sdm845.dtsi"
-
-// Needed for some GPIO (like the volume buttons)
-#include "pm8998.dtsi"
-#include "pmi8998.dtsi"
-#include "pm8005.dtsi"
-
-/ {
- model = "Xiaomi MIX 2s";
- compatible = "xiaomi,polaris", "qcom,sdm845";
- /* required for bootloader to select correct board */
- qcom,board-id = <0x2a 0x0>;
- qcom,msm-id = <0x141 0x20001>;
-
- aliases {
- serial0 = &uart9;
- hsuart0 = &uart6;
- };
-
- chosen {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- bootargs = "efi=novamap pd_ignore_unused video=efifb:off clk_ignore_unused acpi=off";
-
- // For simplefb hack
- stdout-path = "display0";
-
- /* hack: use framebuffer setup by bootloader.
- * the address is taken from the bootloader config (strings xbl.img | grep "Display Reserved")
- */
- framebuffer0: framebuffer@9d400000 {
- compatible = "simple-framebuffer";
- reg = <0 0x9D400000 0 0x02400000>;
- width = <1080>;
- height = <2160>;
- stride = <(1080 * 4)>;
- format = "a8r8g8b8";
- status = "okay";
- };
- };
-
- vph_pwr: vph-pwr-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vph_pwr";
- regulator-min-microvolt = <3700000>;
- regulator-max-microvolt = <3700000>;
- };
-
-
- vreg_tp_vddio: tp-vddio-vreg {
- compatible = "regulator-fixed";
- regulator-name = "vreg_tp_vddio";
-
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- gpio = <&tlmm 23 0>;
- regulator-always-on;
- regulator-boot-on;
- enable-active-high;
- };
-
- /*
- * Apparently RPMh does not provide support for PM8150 S4 because it
- * is always-on; model it as a fixed regulator.
- */
- vreg_s4a_1p8: pm8998-smps4 {
- compatible = "regulator-fixed";
- regulator-name = "vreg_s4a_1p8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vph_pwr>;
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- autorepeat;
-
- pinctrl-names = "default";
- pinctrl-0 = <&vol_up_pin_a>;
-
- vol-up {
- label = "Volume Up";
- linux,code = <KEY_VOLUMEUP>;
- gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
- };
- };
-
-};
-
-
-&apps_rsc {
- pm8998-rpmh-regulators {
- compatible = "qcom,pm8998-rpmh-regulators";
- qcom,pmic-id = "a";
- vdd-s1-supply = <&vph_pwr>;
- vdd-s2-supply = <&vph_pwr>;
- vdd-s3-supply = <&vph_pwr>;
- vdd-s4-supply = <&vph_pwr>;
- vdd-s5-supply = <&vph_pwr>;
- vdd-s6-supply = <&vph_pwr>;
- vdd-s7-supply = <&vph_pwr>;
- vdd-s8-supply = <&vph_pwr>;
- vdd-s9-supply = <&vph_pwr>;
- vdd-s10-supply = <&vph_pwr>;
- vdd-s11-supply = <&vph_pwr>;
- vdd-s12-supply = <&vph_pwr>;
- vdd-s13-supply = <&vph_pwr>;
- vdd-l1-l27-supply = <&vreg_s7a_1p025>;
- vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
- vdd-l3-l11-supply = <&vreg_s7a_1p025>;
- vdd-l4-l5-supply = <&vreg_s7a_1p025>;
- vdd-l6-supply = <&vph_pwr>;
- vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
- vdd-l9-supply = <&vreg_bob>;
- vdd-l10-l23-l25-supply = <&vreg_bob>;
- vdd-l13-l19-l21-supply = <&vreg_bob>;
- vdd-l16-l28-supply = <&vreg_bob>;
- vdd-l18-l22-supply = <&vreg_bob>;
- vdd-l20-l24-supply = <&vreg_bob>;
- vdd-l26-supply = <&vreg_s3a_1p35>;
- vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
-
- vreg_s2a_1p1: smps2 {
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- };
-
- vreg_s3a_1p35: smps3 {
- regulator-min-microvolt = <1352000>;
- regulator-max-microvolt = <1352000>;
- };
-
- // vreg_s4a_1p8: smps4 {
- // regulator-min-microvolt = <1800000>;
- // regulator-max-microvolt = <1800000>;
- // };
-
- vreg_s5a_2p04: smps5 {
- regulator-min-microvolt = <1904000>;
- regulator-max-microvolt = <2040000>;
- };
-
- vreg_s7a_1p025: smps7 {
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1028000>;
- };
-
- vdda_ufs1_core:
- vreg_l1a_0p875: ldo1 {
- regulator-min-microvolt = <880000>;
- regulator-max-microvolt = <880000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l2a_1p2: ldo2 {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- regulator-always-on;
- };
-
- vreg_l3a_1p0: ldo3 {
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l5a_0p8: ldo5 {
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l6a_1p8: ldo6 {
- regulator-min-microvolt = <1856000>;
- regulator-max-microvolt = <1856000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l7a_1p8: ldo7 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l8a_1p2: ldo8 {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1248000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l9a_1p8: ldo9 {
- regulator-min-microvolt = <1704000>;
- regulator-max-microvolt = <2928000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l10a_2p95: ldo10 {
- regulator-min-microvolt = <1704000>;
- regulator-max-microvolt = <2928000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l11a_1p05: ldo11 {
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1048000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l12a_1p8: ldo12 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l13a_2p95: ldo13 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2960000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
-
- // dsi and touchscreen maybe
- vreg_l14a_1p8: ldo14 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1880000>;
- regulator-always-on;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l15a_1p8: ldo15 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l16a_2p7: ldo16 {
- regulator-min-microvolt = <2704000>;
- regulator-max-microvolt = <2704000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l17a_1p3: ldo17 {
- regulator-always-on;
- regulator-min-microvolt = <1304000>;
- regulator-max-microvolt = <1304000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l18a_2p9: ldo18 {
- regulator-min-microvolt = <2704000>;
- regulator-max-microvolt = <2960000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l19a_3p1: ldo19 {
- regulator-min-microvolt = <2856000>;
- regulator-max-microvolt = <3104000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l20a_2p95: ldo20 {
- regulator-min-microvolt = <2704000>;
- regulator-max-microvolt = <2960000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l21a_2p95: ldo21 {
- regulator-min-microvolt = <2704000>;
- regulator-max-microvolt = <2960000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l22a_3p3: ldo22 {
- regulator-min-microvolt = <2864000>;
- regulator-max-microvolt = <3312000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l23a_3p3: ldo23 {
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3312000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l24a_3p075: ldo24 {
- regulator-min-microvolt = <3088000>;
- regulator-max-microvolt = <3088000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l25a_3p3: ldo25 {
- regulator-always-on;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3312000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vdda_ufs1_1p2:
- vreg_l26a_1p2: ldo26 {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l28a_3p0: ldo28 {
- regulator-min-microvolt = <2856000>;
- regulator-max-microvolt = <3008000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- regulator-always-on;
- };
-
- vreg_lvs1a_1p8: lvs1 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vreg_lvs2a_1p8: lvs2 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
- };
-
- pmi8998-rpmh-regulators {
- compatible = "qcom,pmi8998-rpmh-regulators";
- qcom,pmic-id = "b";
-
- vdd-bob-supply = <&vph_pwr>;
-
- vreg_bob: bob {
- regulator-min-microvolt = <3312000>;
- regulator-max-microvolt = <3600000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
- regulator-allow-bypass;
- };
- };
-
- pm8005-rpmh-regulators {
- compatible = "qcom,pm8005-rpmh-regulators";
- qcom,pmic-id = "c";
-
- vdd-s1-supply = <&vph_pwr>;
- vdd-s2-supply = <&vph_pwr>;
- vdd-s3-supply = <&vph_pwr>;
- vdd-s4-supply = <&vph_pwr>;
-
- vreg_smp3c_0p6: smps3 {
- regulator-always-on;
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <600000>;
- };
- };
-};
-
-&gpi_dma0 {
- status = "okay";
-};
-
-&gpi_dma1 {
- status = "okay";
-};
-
-&gcc {
- protected-clocks = <GCC_QSPI_CORE_CLK>,
- <GCC_QSPI_CORE_CLK_SRC>,
- <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
- <GCC_LPASS_Q6_AXI_CLK>,
- <GCC_LPASS_SWAY_CLK>;
-};
-
-// Keep these always on until we get panel driver working
-&ibb {
- regulator-always-on;
-};
-
-&lab {
- regulator-always-on;
-};
-
-/* NFC */
-&i2c3 {
- status = "okay";
- clock-frequency = <400000>;
-};
-
-/* Audio Amplifier tas2559 */
-&i2c5 {
- status = "okay";
- clock-frequency = <400000>;
-};
-
-/* smb1355 and p9220 */
-&i2c10 {
- status = "okay";
- clock-frequency = <400000>;
-};
-
-/* touchscreen */
-&i2c14 {
- #dma-cells = <3>;
- status = "okay";
- clock-frequency = <400000>;
-
- dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>,
- <&gpi_dma1 1 6 QCOM_GPI_I2C>;
- dma-names = "tx", "rx";
-
- touchscreen: synaptics-dsi-i2c@20 {
- compatible = "syna,rmi4-i2c";
- reg = <0x20>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts-extended = <&tlmm 125 0x2008>;
-
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&ts_default_pins>;
- pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
-
- vdd-supply = <&vreg_l28a_3p0>;
- vio-supply = <&vreg_tp_vddio>;
-
- syna,reset-delay-ms = <200>;
- syna,startup-delay-ms = <200>;
-
- rmi4-f01@1 {
- reg = <0x1>;
- syna,nosleep-mode = <0x1>;
- };
-
- rmi4-f12@12 {
- reg = <0x12>;
- syna,sensor-type = <1>;
- syna,clip-x-low = <0>;
- syna,clip-x-high = <1080>;
- syna,clip-y-low = <0>;
- syna,clip-y-high = <2160>;
- syna,rezero-wait-ms = <200>;
- };
- };
-};
-
-&qup_i2c14_default {
- mux {
- pins = "gpio33", "gpio34";
- function = "qup14";
- };
- config {
- pins = "gpio33", "gpio34";
- drive-strength = <2>;
- bias-disable;
- };
-};
-
-&pm8998_gpio {
- vol_up_pin_a: vol-up-active {
- pins = "gpio6";
- function = "normal";
- input-enable;
- bias-pull-up;
- qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
- };
-};
-
-&pm8998_pon {
- resin {
- compatible = "qcom,pm8941-resin";
- interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
- debounce = <15625>;
- bias-pull-up;
- linux,code = <KEY_VOLUMEDOWN>;
- };
-};
-
-&qupv3_id_0 {
- status = "okay";
-};
-
-&qupv3_id_1 {
- status = "okay";
-};
-
-&tlmm {
- gpio-reserved-ranges = <0 4>, <81 4>;
-
- ts_default_pins: ts-int {
- mux {
- pins = "gpio99", "gpio125";
- function = "gpio";
- };
-
- config {
- pins = "gpio99", "gpio125";
- drive-strength = <16>;
- bias-pull-up;
- input-enable;
- };
- };
-
- ts_reset_suspend: ts_reset_suspend {
- mux {
- pins = "gpio99";
- function = "gpio";
- };
-
- config {
- pins = "gpio99";
- bias-disable;
- drive-strength = <0x2>;
- };
- };
-
- ts_int_suspend: ts_int_suspend {
- mux {
- pins = "gpio125";
- function = "gpio";
- };
-
- config {
- pins = "gpio125";
- bias-disable;
- drive-strength = <0x2>;
- };
- };
-};
-
-&uart6 {
- status = "disabled";
-
- bluetooth {
- compatible = "qcom,wcn3990-bt";
- vddio-supply = <&vreg_s4a_1p8>;
- vddxo-supply = <&vreg_l7a_1p8>;
- vddrf-supply = <&vreg_l17a_1p3>;
- vddch0-supply = <&vreg_l25a_3p3>;
- max-speed = <3200000>;
- };
-};
-
-
-&usb_1 {
- status = "okay";
- /* We'll use this as USB 2.0 only */
- qcom,select-utmi-as-pipe-clk;
-};
-
-&usb_1_dwc3 {
- dr_mode = "peripheral";
-
- /* fastest mode for USB 2 */
- maximum-speed = "high-speed";
- // extcon = <&extcon_usb1>;
-
- /* Remove USB3 phy */
- phys = <&usb_1_hsphy>;
- phy-names = "usb2-phy";
-};
-
-&usb_1_hsphy {
- status = "okay";
-
- vdd-supply = <&vreg_l1a_0p875>;
- vdda-pll-supply = <&vreg_l12a_1p8>;
- vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
-
- qcom,imp-res-offset-value = <8>;
- qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
- qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
- qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
-};
-
-&usb_1_qmpphy {
- status = "okay";
-
- vdda-phy-supply = <&vreg_l26a_1p2>;
- vdda-pll-supply = <&vreg_l1a_0p875>;
-};
-
-
-&ufs_mem_hc {
- status = "okay";
- reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
- vcc-supply = <&vreg_l20a_2p95>;
- vcc-max-microamp = <800000>;
-};
-
-&ufs_mem_phy {
- status = "okay";
- vdda-phy-supply = <&vdda_ufs1_core>;
- vdda-pll-supply = <&vdda_ufs1_1p2>;
-};
-
-&venus {
- status = "disabled";
-};
-
-&wifi {
- status = "disabled";
-
- vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
- vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
- vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
- vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
-
- qcom,snoc-host-cap-8bit-quirk;
-};
-
-/* PINCTRL - additions to nodes defined in sdm845.dtsi */
-
-&qup_uart6_default {
- pinmux {
- pins = "gpio45", "gpio46", "gpio47", "gpio48";
- function = "qup6";
- };
-
- cts {
- pins = "gpio45";
- bias-disable;
- };
-
- rts-tx {
- pins = "gpio46", "gpio47";
- drive-strength = <2>;
- bias-disable;
- };
-
- rx {
- pins = "gpio48";
- bias-pull-up;
- };
-};
-
-/* Reserved memory changes */
-/*
- * The memory regions related to the modem have to be changed
- * according to the adresses in downstream as
- * the modem is hard-coded to expect these regions to be at those adresses.
- *
- */
-/delete-node/ &rmtfs_mem;
-/delete-node/ &adsp_mem;
-/delete-node/ &wlan_msa_mem;
-/delete-node/ &mpss_region;
-/delete-node/ &venus_mem;
-/delete-node/ &cdsp_mem;
-/delete-node/ &mba_region;
-/delete-node/ &slpi_mem;
-/delete-node/ &spss_mem;
-
-/ {
- reserved-memory {
- rmtfs_mem: memory@f6301000 {
- compatible = "qcom,rmtfs-mem";
- reg = <0 0xf6301000 0 0x200000>;
- no-map;
-
- qcom,client-id = <1>;
- qcom,vmid = <15>;
- };
-
- adsp_mem: memory@8c500000 {
- reg = <0 0x8c500000 0 0x1e00000>;
- no-map;
- };
-
- wlan_msa_mem: memory@8e300000 {
- reg = <0 0x8e300000 0 0x100000>;
- no-map;
- };
-
- mpss_region: memory@8e400000 {
- reg = <0 0x8e400000 0 0x7800000>;
- no-map;
- };
-
- venus_mem: memory@95c00000 {
- reg = <0 0x95c00000 0 0x500000>;
- no-map;
- };
-
- cdsp_mem: memory@96100000 {
- reg = <0 0x96100000 0 0x800000>;
- no-map;
- };
-
- mba_region: memory@96900000 {
- reg = <0 0x96900000 0 0x200000>;
- no-map;
- };
-
- slpi_mem: memory@96b00000 {
- reg = <0 0x96b00000 0 0x1400000>;
- no-map;
- };
-
- spss_mem: memory@97f00000 {
- reg = <0 0x97f00000 0 0x100000>;
- no-map;
- };
-
- /* hack: bootloader framebuffer */
- cont_splash_region: memory@9d400000 {
- compatible = "removed-dma-pool";
- reg = <0 0x9D400000 0 0x02400000>;
- no-map;
- };
-
- ramoops: ramoops@b0000000 {
- compatible = "ramoops";
- reg = <0 0xb0000000 0 0x00400000>;
- record-size = <0x40000>; /*256x1024*/
- console-size = <0x40000>;
- ftrace-size = <0x40000>;
- pmsg-size = <0x200000>;
- ecc-size = <0x0>;
- };
- };
-};
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * SDM845 SoC device tree source
- *
- * Copyright (c) 2018, The Linux Foundation. All rights reserved.
- */
-
-#include <dt-bindings/clock/qcom,camcc-sdm845.h>
-#include <dt-bindings/clock/qcom,dispcc-sdm845.h>
-#include <dt-bindings/clock/qcom,gcc-sdm845.h>
-#include <dt-bindings/clock/qcom,gpucc-sdm845.h>
-#include <dt-bindings/clock/qcom,lpass-sdm845.h>
-#include <dt-bindings/clock/qcom,rpmh.h>
-#include <dt-bindings/clock/qcom,videocc-sdm845.h>
-#include <dt-bindings/dma/qcom-gpi.h>
-#include <dt-bindings/interconnect/qcom,osm-l3.h>
-#include <dt-bindings/interconnect/qcom,sdm845.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/phy/phy-qcom-qusb2.h>
-#include <dt-bindings/power/qcom-rpmpd.h>
-#include <dt-bindings/reset/qcom,sdm845-aoss.h>
-#include <dt-bindings/reset/qcom,sdm845-pdc.h>
-#include <dt-bindings/soc/qcom,apr.h>
-#include <dt-bindings/soc/qcom,rpmh-rsc.h>
-#include <dt-bindings/clock/qcom,gcc-sdm845.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
- interrupt-parent = <&intc>;
-
- #address-cells = <2>;
- #size-cells = <2>;
-
- aliases {
- i2c0 = &i2c0;
- i2c1 = &i2c1;
- i2c2 = &i2c2;
- i2c3 = &i2c3;
- i2c4 = &i2c4;
- i2c5 = &i2c5;
- i2c6 = &i2c6;
- i2c7 = &i2c7;
- i2c8 = &i2c8;
- i2c9 = &i2c9;
- i2c10 = &i2c10;
- i2c11 = &i2c11;
- i2c12 = &i2c12;
- i2c13 = &i2c13;
- i2c14 = &i2c14;
- i2c15 = &i2c15;
- spi0 = &spi0;
- spi1 = &spi1;
- spi2 = &spi2;
- spi3 = &spi3;
- spi4 = &spi4;
- spi5 = &spi5;
- spi6 = &spi6;
- spi7 = &spi7;
- spi8 = &spi8;
- spi9 = &spi9;
- spi10 = &spi10;
- spi11 = &spi11;
- spi12 = &spi12;
- spi13 = &spi13;
- spi14 = &spi14;
- spi15 = &spi15;
- };
-
- chosen { };
-
- memory@80000000 {
- device_type = "memory";
- /* We expect the bootloader to fill in the size */
- reg = <0 0x80000000 0 0>;
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- hyp_mem: memory@85700000 {
- reg = <0 0x85700000 0 0x600000>;
- no-map;
- };
-
- xbl_mem: memory@85e00000 {
- reg = <0 0x85e00000 0 0x100000>;
- no-map;
- };
-
- aop_mem: memory@85fc0000 {
- reg = <0 0x85fc0000 0 0x20000>;
- no-map;
- };
-
- aop_cmd_db_mem: memory@85fe0000 {
- compatible = "qcom,cmd-db";
- reg = <0x0 0x85fe0000 0 0x20000>;
- no-map;
- };
-
- smem_mem: memory@86000000 {
- reg = <0x0 0x86000000 0 0x200000>;
- no-map;
- };
-
- tz_mem: memory@86200000 {
- reg = <0 0x86200000 0 0x2d00000>;
- no-map;
- };
-
- rmtfs_mem: memory@88f00000 {
- compatible = "qcom,rmtfs-mem";
- reg = <0 0x88f00000 0 0x200000>;
- no-map;
-
- qcom,client-id = <1>;
- qcom,vmid = <15>;
- };
-
- qseecom_mem: memory@8ab00000 {
- reg = <0 0x8ab00000 0 0x1400000>;
- no-map;
- };
-
- camera_mem: memory@8bf00000 {
- reg = <0 0x8bf00000 0 0x500000>;
- no-map;
- };
-
- ipa_fw_mem: memory@8c400000 {
- reg = <0 0x8c400000 0 0x10000>;
- no-map;
- };
-
- ipa_gsi_mem: memory@8c410000 {
- reg = <0 0x8c410000 0 0x5000>;
- no-map;
- };
-
- gpu_mem: memory@8c415000 {
- reg = <0 0x8c415000 0 0x2000>;
- no-map;
- };
-
- adsp_mem: memory@8c500000 {
- reg = <0 0x8c500000 0 0x1a00000>;
- no-map;
- };
-
- wlan_msa_mem: memory@8df00000 {
- reg = <0 0x8df00000 0 0x100000>;
- no-map;
- };
-
- mpss_region: memory@8e000000 {
- reg = <0 0x8e000000 0 0x7800000>;
- no-map;
- };
-
- venus_mem: memory@95800000 {
- reg = <0 0x95800000 0 0x500000>;
- no-map;
- };
-
- cdsp_mem: memory@95d00000 {
- reg = <0 0x95d00000 0 0x800000>;
- no-map;
- };
-
- mba_region: memory@96500000 {
- reg = <0 0x96500000 0 0x200000>;
- no-map;
- };
-
- slpi_mem: memory@96700000 {
- reg = <0 0x96700000 0 0x1400000>;
- no-map;
- };
-
- spss_mem: memory@97b00000 {
- reg = <0 0x97b00000 0 0x100000>;
- no-map;
- };
- };
-
- cpus {
- #address-cells = <2>;
- #size-cells = <0>;
-
- CPU0: cpu@0 {
- device_type = "cpu";
- compatible = "qcom,kryo385";
- reg = <0x0 0x0>;
- enable-method = "psci";
- cpu-idle-states = <&LITTLE_CPU_SLEEP_0
- &LITTLE_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
- capacity-dmips-mhz = <607>;
- dynamic-power-coefficient = <100>;
- qcom,freq-domain = <&cpufreq_hw 0>;
- operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
- #cooling-cells = <2>;
- next-level-cache = <&L2_0>;
- L2_0: l2-cache {
- compatible = "cache";
- next-level-cache = <&L3_0>;
- L3_0: l3-cache {
- compatible = "cache";
- };
- };
- };
-
- CPU1: cpu@100 {
- device_type = "cpu";
- compatible = "qcom,kryo385";
- reg = <0x0 0x100>;
- enable-method = "psci";
- cpu-idle-states = <&LITTLE_CPU_SLEEP_0
- &LITTLE_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
- capacity-dmips-mhz = <607>;
- dynamic-power-coefficient = <100>;
- qcom,freq-domain = <&cpufreq_hw 0>;
- operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
- #cooling-cells = <2>;
- next-level-cache = <&L2_100>;
- L2_100: l2-cache {
- compatible = "cache";
- next-level-cache = <&L3_0>;
- };
- };
-
- CPU2: cpu@200 {
- device_type = "cpu";
- compatible = "qcom,kryo385";
- reg = <0x0 0x200>;
- enable-method = "psci";
- cpu-idle-states = <&LITTLE_CPU_SLEEP_0
- &LITTLE_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
- capacity-dmips-mhz = <607>;
- dynamic-power-coefficient = <100>;
- qcom,freq-domain = <&cpufreq_hw 0>;
- operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
- #cooling-cells = <2>;
- next-level-cache = <&L2_200>;
- L2_200: l2-cache {
- compatible = "cache";
- next-level-cache = <&L3_0>;
- };
- };
-
- CPU3: cpu@300 {
- device_type = "cpu";
- compatible = "qcom,kryo385";
- reg = <0x0 0x300>;
- enable-method = "psci";
- cpu-idle-states = <&LITTLE_CPU_SLEEP_0
- &LITTLE_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
- capacity-dmips-mhz = <607>;
- dynamic-power-coefficient = <100>;
- qcom,freq-domain = <&cpufreq_hw 0>;
- operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
- #cooling-cells = <2>;
- next-level-cache = <&L2_300>;
- L2_300: l2-cache {
- compatible = "cache";
- next-level-cache = <&L3_0>;
- };
- };
-
- CPU4: cpu@400 {
- device_type = "cpu";
- compatible = "qcom,kryo385";
- reg = <0x0 0x400>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- cpu-idle-states = <&BIG_CPU_SLEEP_0
- &BIG_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
- dynamic-power-coefficient = <396>;
- qcom,freq-domain = <&cpufreq_hw 1>;
- operating-points-v2 = <&cpu4_opp_table>;
- interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
- #cooling-cells = <2>;
- next-level-cache = <&L2_400>;
- L2_400: l2-cache {
- compatible = "cache";
- next-level-cache = <&L3_0>;
- };
- };
-
- CPU5: cpu@500 {
- device_type = "cpu";
- compatible = "qcom,kryo385";
- reg = <0x0 0x500>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- cpu-idle-states = <&BIG_CPU_SLEEP_0
- &BIG_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
- dynamic-power-coefficient = <396>;
- qcom,freq-domain = <&cpufreq_hw 1>;
- operating-points-v2 = <&cpu4_opp_table>;
- interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
- #cooling-cells = <2>;
- next-level-cache = <&L2_500>;
- L2_500: l2-cache {
- compatible = "cache";
- next-level-cache = <&L3_0>;
- };
- };
-
- CPU6: cpu@600 {
- device_type = "cpu";
- compatible = "qcom,kryo385";
- reg = <0x0 0x600>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- cpu-idle-states = <&BIG_CPU_SLEEP_0
- &BIG_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
- dynamic-power-coefficient = <396>;
- qcom,freq-domain = <&cpufreq_hw 1>;
- operating-points-v2 = <&cpu4_opp_table>;
- interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
- #cooling-cells = <2>;
- next-level-cache = <&L2_600>;
- L2_600: l2-cache {
- compatible = "cache";
- next-level-cache = <&L3_0>;
- };
- };
-
- CPU7: cpu@700 {
- device_type = "cpu";
- compatible = "qcom,kryo385";
- reg = <0x0 0x700>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- cpu-idle-states = <&BIG_CPU_SLEEP_0
- &BIG_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
- dynamic-power-coefficient = <396>;
- qcom,freq-domain = <&cpufreq_hw 1>;
- operating-points-v2 = <&cpu4_opp_table>;
- interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
- #cooling-cells = <2>;
- next-level-cache = <&L2_700>;
- L2_700: l2-cache {
- compatible = "cache";
- next-level-cache = <&L3_0>;
- };
- };
-
- cpu-map {
- cluster0 {
- core0 {
- cpu = <&CPU0>;
- };
-
- core1 {
- cpu = <&CPU1>;
- };
-
- core2 {
- cpu = <&CPU2>;
- };
-
- core3 {
- cpu = <&CPU3>;
- };
-
- core4 {
- cpu = <&CPU4>;
- };
-
- core5 {
- cpu = <&CPU5>;
- };
-
- core6 {
- cpu = <&CPU6>;
- };
-
- core7 {
- cpu = <&CPU7>;
- };
- };
- };
-
- idle-states {
- entry-method = "psci";
-
- LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
- compatible = "arm,idle-state";
- idle-state-name = "little-power-down";
- arm,psci-suspend-param = <0x40000003>;
- entry-latency-us = <350>;
- exit-latency-us = <461>;
- min-residency-us = <1890>;
- local-timer-stop;
- };
-
- LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
- compatible = "arm,idle-state";
- idle-state-name = "little-rail-power-down";
- arm,psci-suspend-param = <0x40000004>;
- entry-latency-us = <360>;
- exit-latency-us = <531>;
- min-residency-us = <3934>;
- local-timer-stop;
- };
-
- BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
- compatible = "arm,idle-state";
- idle-state-name = "big-power-down";
- arm,psci-suspend-param = <0x40000003>;
- entry-latency-us = <264>;
- exit-latency-us = <621>;
- min-residency-us = <952>;
- local-timer-stop;
- };
-
- BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
- compatible = "arm,idle-state";
- idle-state-name = "big-rail-power-down";
- arm,psci-suspend-param = <0x40000004>;
- entry-latency-us = <702>;
- exit-latency-us = <1061>;
- min-residency-us = <4488>;
- local-timer-stop;
- };
-
- CLUSTER_SLEEP_0: cluster-sleep-0 {
- compatible = "arm,idle-state";
- idle-state-name = "cluster-power-down";
- arm,psci-suspend-param = <0x400000F4>;
- entry-latency-us = <3263>;
- exit-latency-us = <6562>;
- min-residency-us = <9987>;
- local-timer-stop;
- };
- };
- };
-
- cpu0_opp_table: cpu0_opp_table {
- compatible = "operating-points-v2";
- opp-shared;
-
- cpu0_opp1: opp-300000000 {
- opp-hz = /bits/ 64 <300000000>;
- opp-peak-kBps = <800000 4800000>;
- };
-
- cpu0_opp2: opp-403200000 {
- opp-hz = /bits/ 64 <403200000>;
- opp-peak-kBps = <800000 4800000>;
- };
-
- cpu0_opp3: opp-480000000 {
- opp-hz = /bits/ 64 <480000000>;
- opp-peak-kBps = <800000 6451200>;
- };
-
- cpu0_opp4: opp-576000000 {
- opp-hz = /bits/ 64 <576000000>;
- opp-peak-kBps = <800000 6451200>;
- };
-
- cpu0_opp5: opp-652800000 {
- opp-hz = /bits/ 64 <652800000>;
- opp-peak-kBps = <800000 7680000>;
- };
-
- cpu0_opp6: opp-748800000 {
- opp-hz = /bits/ 64 <748800000>;
- opp-peak-kBps = <1804000 9216000>;
- };
-
- cpu0_opp7: opp-825600000 {
- opp-hz = /bits/ 64 <825600000>;
- opp-peak-kBps = <1804000 9216000>;
- };
-
- cpu0_opp8: opp-902400000 {
- opp-hz = /bits/ 64 <902400000>;
- opp-peak-kBps = <1804000 10444800>;
- };
-
- cpu0_opp9: opp-979200000 {
- opp-hz = /bits/ 64 <979200000>;
- opp-peak-kBps = <1804000 11980800>;
- };
-
- cpu0_opp10: opp-1056000000 {
- opp-hz = /bits/ 64 <1056000000>;
- opp-peak-kBps = <1804000 11980800>;
- };
-
- cpu0_opp11: opp-1132800000 {
- opp-hz = /bits/ 64 <1132800000>;
- opp-peak-kBps = <2188000 13516800>;
- };
-
- cpu0_opp12: opp-1228800000 {
- opp-hz = /bits/ 64 <1228800000>;
- opp-peak-kBps = <2188000 15052800>;
- };
-
- cpu0_opp13: opp-1324800000 {
- opp-hz = /bits/ 64 <1324800000>;
- opp-peak-kBps = <2188000 16588800>;
- };
-
- cpu0_opp14: opp-1420800000 {
- opp-hz = /bits/ 64 <1420800000>;
- opp-peak-kBps = <3072000 18124800>;
- };
-
- cpu0_opp15: opp-1516800000 {
- opp-hz = /bits/ 64 <1516800000>;
- opp-peak-kBps = <3072000 19353600>;
- };
-
- cpu0_opp16: opp-1612800000 {
- opp-hz = /bits/ 64 <1612800000>;
- opp-peak-kBps = <4068000 19353600>;
- };
-
- cpu0_opp17: opp-1689600000 {
- opp-hz = /bits/ 64 <1689600000>;
- opp-peak-kBps = <4068000 20889600>;
- };
-
- cpu0_opp18: opp-1766400000 {
- opp-hz = /bits/ 64 <1766400000>;
- opp-peak-kBps = <4068000 22425600>;
- };
- };
-
- cpu4_opp_table: cpu4_opp_table {
- compatible = "operating-points-v2";
- opp-shared;
-
- cpu4_opp1: opp-300000000 {
- opp-hz = /bits/ 64 <300000000>;
- opp-peak-kBps = <800000 4800000>;
- };
-
- cpu4_opp2: opp-403200000 {
- opp-hz = /bits/ 64 <403200000>;
- opp-peak-kBps = <800000 4800000>;
- };
-
- cpu4_opp3: opp-480000000 {
- opp-hz = /bits/ 64 <480000000>;
- opp-peak-kBps = <1804000 4800000>;
- };
-
- cpu4_opp4: opp-576000000 {
- opp-hz = /bits/ 64 <576000000>;
- opp-peak-kBps = <1804000 4800000>;
- };
-
- cpu4_opp5: opp-652800000 {
- opp-hz = /bits/ 64 <652800000>;
- opp-peak-kBps = <1804000 4800000>;
- };
-
- cpu4_opp6: opp-748800000 {
- opp-hz = /bits/ 64 <748800000>;
- opp-peak-kBps = <1804000 4800000>;
- };
-
- cpu4_opp7: opp-825600000 {
- opp-hz = /bits/ 64 <825600000>;
- opp-peak-kBps = <2188000 9216000>;
- };
-
- cpu4_opp8: opp-902400000 {
- opp-hz = /bits/ 64 <902400000>;
- opp-peak-kBps = <2188000 9216000>;
- };
-
- cpu4_opp9: opp-979200000 {
- opp-hz = /bits/ 64 <979200000>;
- opp-peak-kBps = <2188000 9216000>;
- };
-
- cpu4_opp10: opp-1056000000 {
- opp-hz = /bits/ 64 <1056000000>;
- opp-peak-kBps = <3072000 9216000>;
- };
-
- cpu4_opp11: opp-1132800000 {
- opp-hz = /bits/ 64 <1132800000>;
- opp-peak-kBps = <3072000 11980800>;
- };
-
- cpu4_opp12: opp-1209600000 {
- opp-hz = /bits/ 64 <1209600000>;
- opp-peak-kBps = <4068000 11980800>;
- };
-
- cpu4_opp13: opp-1286400000 {
- opp-hz = /bits/ 64 <1286400000>;
- opp-peak-kBps = <4068000 11980800>;
- };
-
- cpu4_opp14: opp-1363200000 {
- opp-hz = /bits/ 64 <1363200000>;
- opp-peak-kBps = <4068000 15052800>;
- };
-
- cpu4_opp15: opp-1459200000 {
- opp-hz = /bits/ 64 <1459200000>;
- opp-peak-kBps = <4068000 15052800>;
- };
-
- cpu4_opp16: opp-1536000000 {
- opp-hz = /bits/ 64 <1536000000>;
- opp-peak-kBps = <5412000 15052800>;
- };
-
- cpu4_opp17: opp-1612800000 {
- opp-hz = /bits/ 64 <1612800000>;
- opp-peak-kBps = <5412000 15052800>;
- };
-
- cpu4_opp18: opp-1689600000 {
- opp-hz = /bits/ 64 <1689600000>;
- opp-peak-kBps = <5412000 19353600>;
- };
-
- cpu4_opp19: opp-1766400000 {
- opp-hz = /bits/ 64 <1766400000>;
- opp-peak-kBps = <6220000 19353600>;
- };
-
- cpu4_opp20: opp-1843200000 {
- opp-hz = /bits/ 64 <1843200000>;
- opp-peak-kBps = <6220000 19353600>;
- };
-
- cpu4_opp21: opp-1920000000 {
- opp-hz = /bits/ 64 <1920000000>;
- opp-peak-kBps = <7216000 19353600>;
- };
-
- cpu4_opp22: opp-1996800000 {
- opp-hz = /bits/ 64 <1996800000>;
- opp-peak-kBps = <7216000 20889600>;
- };
-
- cpu4_opp23: opp-2092800000 {
- opp-hz = /bits/ 64 <2092800000>;
- opp-peak-kBps = <7216000 20889600>;
- };
-
- cpu4_opp24: opp-2169600000 {
- opp-hz = /bits/ 64 <2169600000>;
- opp-peak-kBps = <7216000 20889600>;
- };
-
- cpu4_opp25: opp-2246400000 {
- opp-hz = /bits/ 64 <2246400000>;
- opp-peak-kBps = <7216000 20889600>;
- };
-
- cpu4_opp26: opp-2323200000 {
- opp-hz = /bits/ 64 <2323200000>;
- opp-peak-kBps = <7216000 20889600>;
- };
-
- cpu4_opp27: opp-2400000000 {
- opp-hz = /bits/ 64 <2400000000>;
- opp-peak-kBps = <7216000 22425600>;
- };
-
- cpu4_opp28: opp-2476800000 {
- opp-hz = /bits/ 64 <2476800000>;
- opp-peak-kBps = <7216000 22425600>;
- };
-
- cpu4_opp29: opp-2553600000 {
- opp-hz = /bits/ 64 <2553600000>;
- opp-peak-kBps = <7216000 22425600>;
- };
-
- cpu4_opp30: opp-2649600000 {
- opp-hz = /bits/ 64 <2649600000>;
- opp-peak-kBps = <7216000 22425600>;
- };
-
- cpu4_opp31: opp-2745600000 {
- opp-hz = /bits/ 64 <2745600000>;
- opp-peak-kBps = <7216000 25497600>;
- };
-
- cpu4_opp32: opp-2803200000 {
- opp-hz = /bits/ 64 <2803200000>;
- opp-peak-kBps = <7216000 25497600>;
- };
- };
-
- pmu {
- compatible = "arm,armv8-pmuv3";
- interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
- <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>,
- <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>,
- <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>;
- };
-
- clocks {
- xo_board: xo-board {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <38400000>;
- clock-output-names = "xo_board";
- };
-
- sleep_clk: sleep-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32764>;
- };
- };
-
- firmware {
- scm {
- compatible = "qcom,scm-sdm845", "qcom,scm";
- };
- };
-
- adsp_pas: remoteproc-adsp {
- compatible = "qcom,sdm845-adsp-pas";
-
- interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog", "fatal", "ready",
- "handover", "stop-ack";
-
- clocks = <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "xo";
-
- memory-region = <&adsp_mem>;
-
- qcom,smem-states = <&adsp_smp2p_out 0>;
- qcom,smem-state-names = "stop";
-
- status = "disabled";
-
- glink-edge {
- interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
- label = "lpass";
- qcom,remote-pid = <2>;
- mboxes = <&apss_shared 8>;
-
- apr {
- compatible = "qcom,apr-v2";
- qcom,glink-channels = "apr_audio_svc";
- qcom,apr-domain = <APR_DOMAIN_ADSP>;
- #address-cells = <1>;
- #size-cells = <0>;
- qcom,intents = <512 20>;
-
- apr-service@3 {
- reg = <APR_SVC_ADSP_CORE>;
- compatible = "qcom,q6core";
- qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
- };
-
- q6afe: apr-service@4 {
- compatible = "qcom,q6afe";
- reg = <APR_SVC_AFE>;
- qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
- q6afedai: dais {
- compatible = "qcom,q6afe-dais";
- #address-cells = <1>;
- #size-cells = <0>;
- #sound-dai-cells = <1>;
- };
- };
-
- q6asm: apr-service@7 {
- compatible = "qcom,q6asm";
- reg = <APR_SVC_ASM>;
- qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
- q6asmdai: dais {
- compatible = "qcom,q6asm-dais";
- #address-cells = <1>;
- #size-cells = <0>;
- #sound-dai-cells = <1>;
- iommus = <&apps_smmu 0x1821 0x0>;
- };
- };
-
- q6adm: apr-service@8 {
- compatible = "qcom,q6adm";
- reg = <APR_SVC_ADM>;
- qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
- q6routing: routing {
- compatible = "qcom,q6adm-routing";
- #sound-dai-cells = <0>;
- };
- };
- };
-
- fastrpc {
- compatible = "qcom,fastrpc";
- qcom,glink-channels = "fastrpcglink-apps-dsp";
- label = "adsp";
- #address-cells = <1>;
- #size-cells = <0>;
-
- compute-cb@3 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <3>;
- iommus = <&apps_smmu 0x1823 0x0>;
- };
-
- compute-cb@4 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <4>;
- iommus = <&apps_smmu 0x1824 0x0>;
- };
- };
- };
- };
-
- cdsp_pas: remoteproc-cdsp {
- compatible = "qcom,sdm845-cdsp-pas";
-
- interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
- <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog", "fatal", "ready",
- "handover", "stop-ack";
-
- clocks = <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "xo";
-
- memory-region = <&cdsp_mem>;
-
- qcom,smem-states = <&cdsp_smp2p_out 0>;
- qcom,smem-state-names = "stop";
-
- status = "disabled";
-
- glink-edge {
- interrupts = <GIC_SPI 574 IRQ_TYPE_EDGE_RISING>;
- label = "turing";
- qcom,remote-pid = <5>;
- mboxes = <&apss_shared 4>;
- fastrpc {
- compatible = "qcom,fastrpc";
- qcom,glink-channels = "fastrpcglink-apps-dsp";
- label = "cdsp";
- #address-cells = <1>;
- #size-cells = <0>;
-
- compute-cb@1 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <1>;
- iommus = <&apps_smmu 0x1401 0x30>;
- };
-
- compute-cb@2 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <2>;
- iommus = <&apps_smmu 0x1402 0x30>;
- };
-
- compute-cb@3 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <3>;
- iommus = <&apps_smmu 0x1403 0x30>;
- };
-
- compute-cb@4 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <4>;
- iommus = <&apps_smmu 0x1404 0x30>;
- };
-
- compute-cb@5 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <5>;
- iommus = <&apps_smmu 0x1405 0x30>;
- };
-
- compute-cb@6 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <6>;
- iommus = <&apps_smmu 0x1406 0x30>;
- };
-
- compute-cb@7 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <7>;
- iommus = <&apps_smmu 0x1407 0x30>;
- };
-
- compute-cb@8 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <8>;
- iommus = <&apps_smmu 0x1408 0x30>;
- };
- };
- };
- };
-
- tcsr_mutex: hwlock {
- compatible = "qcom,tcsr-mutex";
- syscon = <&tcsr_mutex_regs 0 0x1000>;
- #hwlock-cells = <1>;
- };
-
- smem {
- compatible = "qcom,smem";
- memory-region = <&smem_mem>;
- hwlocks = <&tcsr_mutex 3>;
- };
-
- smp2p-cdsp {
- compatible = "qcom,smp2p";
- qcom,smem = <94>, <432>;
-
- interrupts = <GIC_SPI 576 IRQ_TYPE_EDGE_RISING>;
-
- mboxes = <&apss_shared 6>;
-
- qcom,local-pid = <0>;
- qcom,remote-pid = <5>;
-
- cdsp_smp2p_out: master-kernel {
- qcom,entry-name = "master-kernel";
- #qcom,smem-state-cells = <1>;
- };
-
- cdsp_smp2p_in: slave-kernel {
- qcom,entry-name = "slave-kernel";
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- smp2p-lpass {
- compatible = "qcom,smp2p";
- qcom,smem = <443>, <429>;
-
- interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
-
- mboxes = <&apss_shared 10>;
-
- qcom,local-pid = <0>;
- qcom,remote-pid = <2>;
-
- adsp_smp2p_out: master-kernel {
- qcom,entry-name = "master-kernel";
- #qcom,smem-state-cells = <1>;
- };
-
- adsp_smp2p_in: slave-kernel {
- qcom,entry-name = "slave-kernel";
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- smp2p-mpss {
- compatible = "qcom,smp2p";
- qcom,smem = <435>, <428>;
- interrupts = <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>;
- mboxes = <&apss_shared 14>;
- qcom,local-pid = <0>;
- qcom,remote-pid = <1>;
-
- modem_smp2p_out: master-kernel {
- qcom,entry-name = "master-kernel";
- #qcom,smem-state-cells = <1>;
- };
-
- modem_smp2p_in: slave-kernel {
- qcom,entry-name = "slave-kernel";
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- ipa_smp2p_out: ipa-ap-to-modem {
- qcom,entry-name = "ipa";
- #qcom,smem-state-cells = <1>;
- };
-
- ipa_smp2p_in: ipa-modem-to-ap {
- qcom,entry-name = "ipa";
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- smp2p-slpi {
- compatible = "qcom,smp2p";
- qcom,smem = <481>, <430>;
- interrupts = <GIC_SPI 172 IRQ_TYPE_EDGE_RISING>;
- mboxes = <&apss_shared 26>;
- qcom,local-pid = <0>;
- qcom,remote-pid = <3>;
-
- slpi_smp2p_out: master-kernel {
- qcom,entry-name = "master-kernel";
- #qcom,smem-state-cells = <1>;
- };
-
- slpi_smp2p_in: slave-kernel {
- qcom,entry-name = "slave-kernel";
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- psci {
- compatible = "arm,psci-1.0";
- method = "smc";
- };
-
- soc: soc@0 {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0 0 0 0 0x10 0>;
- dma-ranges = <0 0 0 0 0x10 0>;
- compatible = "simple-bus";
-
- gcc: clock-controller@100000 {
- compatible = "qcom,gcc-sdm845";
- reg = <0 0x00100000 0 0x1f0000>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- #power-domain-cells = <1>;
- };
-
- qfprom@784000 {
- compatible = "qcom,qfprom";
- reg = <0 0x00784000 0 0x8ff>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- qusb2p_hstx_trim: hstx-trim-primary@1eb {
- reg = <0x1eb 0x1>;
- bits = <1 4>;
- };
-
- qusb2s_hstx_trim: hstx-trim-secondary@1eb {
- reg = <0x1eb 0x2>;
- bits = <6 4>;
- };
- };
-
- rng: rng@793000 {
- compatible = "qcom,prng-ee";
- reg = <0 0x00793000 0 0x1000>;
- clocks = <&gcc GCC_PRNG_AHB_CLK>;
- clock-names = "core";
- };
-
- qup_opp_table: qup-opp-table {
- compatible = "operating-points-v2";
-
- opp-50000000 {
- opp-hz = /bits/ 64 <50000000>;
- required-opps = <&rpmhpd_opp_min_svs>;
- };
-
- opp-75000000 {
- opp-hz = /bits/ 64 <75000000>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- required-opps = <&rpmhpd_opp_svs>;
- };
-
- opp-128000000 {
- opp-hz = /bits/ 64 <128000000>;
- required-opps = <&rpmhpd_opp_nom>;
- };
- };
-
- gpi_dma0: dma-controller@800000 {
- #dma-cells = <3>;
- compatible = "qcom,sdm845-gpi-dma";
- reg = <0 0x00800000 0 0x60000>;
- interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
- dma-channels = <13>;
- dma-channel-mask = <0xfa>;
- iommus = <&apps_smmu 0x0016 0x0>;
- status = "disabled";
- };
-
- qupv3_id_0: geniqup@8c0000 {
- compatible = "qcom,geni-se-qup";
- reg = <0 0x008c0000 0 0x6000>;
- clock-names = "m-ahb", "s-ahb";
- clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
- <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
- iommus = <&apps_smmu 0x3 0x0>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core";
- status = "disabled";
-
- i2c0: i2c@880000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00880000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c0_default>;
- interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
- <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- status = "disabled";
- };
-
- spi0: spi@880000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00880000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi0_default>;
- interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
- <&gpi_dma0 1 0 QCOM_GPI_SPI>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- uart0: serial@880000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00880000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart0_default>;
- interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c1: i2c@884000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00884000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c1_default>;
- interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
- <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- status = "disabled";
- };
-
- spi1: spi@884000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00884000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi1_default>;
- interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- uart1: serial@884000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00884000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart1_default>;
- interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c2: i2c@888000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00888000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c2_default>;
- interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
- <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- status = "disabled";
- };
-
- spi2: spi@888000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00888000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi2_default>;
- interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- uart2: serial@888000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00888000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart2_default>;
- interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c3: i2c@88c000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x0088c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c3_default>;
- interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
- <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- status = "disabled";
- };
-
- spi3: spi@88c000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x0088c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi3_default>;
- interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- uart3: serial@88c000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x0088c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart3_default>;
- interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c4: i2c@890000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00890000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c4_default>;
- interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
- <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- status = "disabled";
- };
-
- spi4: spi@890000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00890000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi4_default>;
- interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- uart4: serial@890000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00890000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart4_default>;
- interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c5: i2c@894000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00894000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c5_default>;
- interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
- <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- status = "disabled";
- };
-
- spi5: spi@894000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00894000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi5_default>;
- interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- uart5: serial@894000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00894000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart5_default>;
- interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c6: i2c@898000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00898000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c6_default>;
- interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
- <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- status = "disabled";
- };
-
- spi6: spi@898000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00898000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi6_default>;
- interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- uart6: serial@898000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00898000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart6_default>;
- interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c7: i2c@89c000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x0089c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c7_default>;
- interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- status = "disabled";
- };
-
- spi7: spi@89c000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x0089c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi7_default>;
- interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- uart7: serial@89c000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x0089c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart7_default>;
- interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
- };
-
- gpi_dma1: dma-controller@0xa00000 {
- #dma-cells = <3>;
- compatible = "qcom,sdm845-gpi-dma";
- reg = <0 0x00a00000 0 0x60000>;
- interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
- dma-channels = <13>;
- dma-channel-mask = <0xfa>;
- iommus = <&apps_smmu 0x06d6 0x0>;
- status = "disabled";
- };
-
- qupv3_id_1: geniqup@ac0000 {
- compatible = "qcom,geni-se-qup";
- reg = <0 0x00ac0000 0 0x6000>;
- clock-names = "m-ahb", "s-ahb";
- clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
- <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
- iommus = <&apps_smmu 0x6c3 0x0>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core";
- status = "disabled";
-
- i2c8: i2c@a80000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00a80000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c8_default>;
- interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
- <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- status = "disabled";
- };
-
- spi8: spi@a80000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00a80000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi8_default>;
- interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- uart8: serial@a80000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00a80000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart8_default>;
- interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c9: i2c@a84000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00a84000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c9_default>;
- interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
- <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- status = "disabled";
- };
-
- spi9: spi@a84000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00a84000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi9_default>;
- interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- uart9: serial@a84000 {
- compatible = "qcom,geni-debug-uart";
- reg = <0 0x00a84000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart9_default>;
- interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c10: i2c@a88000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00a88000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c10_default>;
- interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
- <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- status = "disabled";
- };
-
- spi10: spi@a88000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00a88000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi10_default>;
- interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- uart10: serial@a88000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00a88000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart10_default>;
- interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c11: i2c@a8c000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00a8c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c11_default>;
- interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
- <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- status = "disabled";
- };
-
- spi11: spi@a8c000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00a8c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi11_default>;
- interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- uart11: serial@a8c000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00a8c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart11_default>;
- interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c12: i2c@a90000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00a90000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c12_default>;
- interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
- <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- status = "disabled";
- };
-
- spi12: spi@a90000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00a90000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi12_default>;
- interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- uart12: serial@a90000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00a90000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart12_default>;
- interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c13: i2c@a94000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00a94000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c13_default>;
- interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
- <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- status = "disabled";
- };
-
- spi13: spi@a94000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00a94000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi13_default>;
- interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- uart13: serial@a94000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00a94000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart13_default>;
- interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c14: i2c@a98000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00a98000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c14_default>;
- interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
- <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- status = "disabled";
- };
-
- spi14: spi@a98000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00a98000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi14_default>;
- interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- uart14: serial@a98000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00a98000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart14_default>;
- interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c15: i2c@a9c000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00a9c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c15_default>;
- interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- status = "disabled";
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
- <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- };
-
- spi15: spi@a9c000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00a9c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi15_default>;
- interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- uart15: serial@a9c000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00a9c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart15_default>;
- interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
- };
-
- system-cache-controller@1100000 {
- compatible = "qcom,sdm845-llcc";
- reg = <0 0x01100000 0 0x200000>, <0 0x01300000 0 0x50000>;
- reg-names = "llcc_base", "llcc_broadcast_base";
- interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- pcie0: pci@1c00000 {
- compatible = "qcom,pcie-sdm845", "snps,dw-pcie";
- reg = <0 0x01c00000 0 0x2000>,
- <0 0x60000000 0 0xf1d>,
- <0 0x60000f20 0 0xa8>,
- <0 0x60100000 0 0x100000>;
- reg-names = "parf", "dbi", "elbi", "config";
- device_type = "pci";
- linux,pci-domain = <0>;
- bus-range = <0x00 0xff>;
- num-lanes = <1>;
-
- #address-cells = <3>;
- #size-cells = <2>;
-
- ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>,
- <0x02000000 0x0 0x60300000 0 0x60300000 0x0 0xd00000>;
-
- interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi";
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0x7>;
- interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
- <0 0 0 2 &intc 0 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
- <0 0 0 3 &intc 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
- <0 0 0 4 &intc 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
-
- clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
- <&gcc GCC_PCIE_0_AUX_CLK>,
- <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
- <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
- <&gcc GCC_PCIE_0_SLV_AXI_CLK>,
- <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>,
- <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;
- clock-names = "pipe",
- "aux",
- "cfg",
- "bus_master",
- "bus_slave",
- "slave_q2a",
- "tbu";
-
- iommus = <&apps_smmu 0x1c10 0xf>;
- iommu-map = <0x0 &apps_smmu 0x1c10 0x1>,
- <0x100 &apps_smmu 0x1c11 0x1>,
- <0x200 &apps_smmu 0x1c12 0x1>,
- <0x300 &apps_smmu 0x1c13 0x1>,
- <0x400 &apps_smmu 0x1c14 0x1>,
- <0x500 &apps_smmu 0x1c15 0x1>,
- <0x600 &apps_smmu 0x1c16 0x1>,
- <0x700 &apps_smmu 0x1c17 0x1>,
- <0x800 &apps_smmu 0x1c18 0x1>,
- <0x900 &apps_smmu 0x1c19 0x1>,
- <0xa00 &apps_smmu 0x1c1a 0x1>,
- <0xb00 &apps_smmu 0x1c1b 0x1>,
- <0xc00 &apps_smmu 0x1c1c 0x1>,
- <0xd00 &apps_smmu 0x1c1d 0x1>,
- <0xe00 &apps_smmu 0x1c1e 0x1>,
- <0xf00 &apps_smmu 0x1c1f 0x1>;
-
- resets = <&gcc GCC_PCIE_0_BCR>;
- reset-names = "pci";
-
- power-domains = <&gcc PCIE_0_GDSC>;
-
- phys = <&pcie0_lane>;
- phy-names = "pciephy";
-
- status = "disabled";
- };
-
- pcie0_phy: phy@1c06000 {
- compatible = "qcom,sdm845-qmp-pcie-phy";
- reg = <0 0x01c06000 0 0x18c>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
- <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
- <&gcc GCC_PCIE_0_CLKREF_CLK>,
- <&gcc GCC_PCIE_PHY_REFGEN_CLK>;
- clock-names = "aux", "cfg_ahb", "ref", "refgen";
-
- resets = <&gcc GCC_PCIE_0_PHY_BCR>;
- reset-names = "phy";
-
- assigned-clocks = <&gcc GCC_PCIE_PHY_REFGEN_CLK>;
- assigned-clock-rates = <100000000>;
-
- status = "disabled";
-
- pcie0_lane: lanes@1c06200 {
- reg = <0 0x01c06200 0 0x128>,
- <0 0x01c06400 0 0x1fc>,
- <0 0x01c06800 0 0x218>,
- <0 0x01c06600 0 0x70>;
- clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
- clock-names = "pipe0";
-
- #phy-cells = <0>;
- clock-output-names = "pcie_0_pipe_clk";
- };
- };
-
- pcie1: pci@1c08000 {
- compatible = "qcom,pcie-sdm845", "snps,dw-pcie";
- reg = <0 0x01c08000 0 0x2000>,
- <0 0x40000000 0 0xf1d>,
- <0 0x40000f20 0 0xa8>,
- <0 0x40100000 0 0x100000>;
- reg-names = "parf", "dbi", "elbi", "config";
- device_type = "pci";
- linux,pci-domain = <1>;
- bus-range = <0x00 0xff>;
- num-lanes = <1>;
-
- #address-cells = <3>;
- #size-cells = <2>;
-
- ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>,
- <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
-
- interrupts = <GIC_SPI 307 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "msi";
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0x7>;
- interrupt-map = <0 0 0 1 &intc 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
- <0 0 0 2 &intc 0 435 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
- <0 0 0 3 &intc 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
- <0 0 0 4 &intc 0 439 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
-
- clocks = <&gcc GCC_PCIE_1_PIPE_CLK>,
- <&gcc GCC_PCIE_1_AUX_CLK>,
- <&gcc GCC_PCIE_1_CFG_AHB_CLK>,
- <&gcc GCC_PCIE_1_MSTR_AXI_CLK>,
- <&gcc GCC_PCIE_1_SLV_AXI_CLK>,
- <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>,
- <&gcc GCC_PCIE_1_CLKREF_CLK>,
- <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;
- clock-names = "pipe",
- "aux",
- "cfg",
- "bus_master",
- "bus_slave",
- "slave_q2a",
- "ref",
- "tbu";
-
- assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
- assigned-clock-rates = <19200000>;
-
- iommus = <&apps_smmu 0x1c00 0xf>;
- iommu-map = <0x0 &apps_smmu 0x1c00 0x1>,
- <0x100 &apps_smmu 0x1c01 0x1>,
- <0x200 &apps_smmu 0x1c02 0x1>,
- <0x300 &apps_smmu 0x1c03 0x1>,
- <0x400 &apps_smmu 0x1c04 0x1>,
- <0x500 &apps_smmu 0x1c05 0x1>,
- <0x600 &apps_smmu 0x1c06 0x1>,
- <0x700 &apps_smmu 0x1c07 0x1>,
- <0x800 &apps_smmu 0x1c08 0x1>,
- <0x900 &apps_smmu 0x1c09 0x1>,
- <0xa00 &apps_smmu 0x1c0a 0x1>,
- <0xb00 &apps_smmu 0x1c0b 0x1>,
- <0xc00 &apps_smmu 0x1c0c 0x1>,
- <0xd00 &apps_smmu 0x1c0d 0x1>,
- <0xe00 &apps_smmu 0x1c0e 0x1>,
- <0xf00 &apps_smmu 0x1c0f 0x1>;
-
- resets = <&gcc GCC_PCIE_1_BCR>;
- reset-names = "pci";
-
- power-domains = <&gcc PCIE_1_GDSC>;
-
- phys = <&pcie1_lane>;
- phy-names = "pciephy";
-
- status = "disabled";
- };
-
- pcie1_phy: phy@1c0a000 {
- compatible = "qcom,sdm845-qhp-pcie-phy";
- reg = <0 0x01c0a000 0 0x800>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
- <&gcc GCC_PCIE_1_CFG_AHB_CLK>,
- <&gcc GCC_PCIE_1_CLKREF_CLK>,
- <&gcc GCC_PCIE_PHY_REFGEN_CLK>;
- clock-names = "aux", "cfg_ahb", "ref", "refgen";
-
- resets = <&gcc GCC_PCIE_1_PHY_BCR>;
- reset-names = "phy";
-
- assigned-clocks = <&gcc GCC_PCIE_PHY_REFGEN_CLK>;
- assigned-clock-rates = <100000000>;
-
- status = "disabled";
-
- pcie1_lane: lanes@1c06200 {
- reg = <0 0x01c0a800 0 0x800>,
- <0 0x01c0a800 0 0x800>,
- <0 0x01c0b800 0 0x400>;
- clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;
- clock-names = "pipe0";
-
- #phy-cells = <0>;
- clock-output-names = "pcie_1_pipe_clk";
- };
- };
-
- mem_noc: interconnect@1380000 {
- compatible = "qcom,sdm845-mem-noc";
- reg = <0 0x01380000 0 0x27200>;
- #interconnect-cells = <2>;
- qcom,bcm-voters = <&apps_bcm_voter>;
- };
-
- dc_noc: interconnect@14e0000 {
- compatible = "qcom,sdm845-dc-noc";
- reg = <0 0x014e0000 0 0x400>;
- #interconnect-cells = <2>;
- qcom,bcm-voters = <&apps_bcm_voter>;
- };
-
- config_noc: interconnect@1500000 {
- compatible = "qcom,sdm845-config-noc";
- reg = <0 0x01500000 0 0x5080>;
- #interconnect-cells = <2>;
- qcom,bcm-voters = <&apps_bcm_voter>;
- };
-
- system_noc: interconnect@1620000 {
- compatible = "qcom,sdm845-system-noc";
- reg = <0 0x01620000 0 0x18080>;
- #interconnect-cells = <2>;
- qcom,bcm-voters = <&apps_bcm_voter>;
- };
-
- aggre1_noc: interconnect@16e0000 {
- compatible = "qcom,sdm845-aggre1-noc";
- reg = <0 0x016e0000 0 0x15080>;
- #interconnect-cells = <2>;
- qcom,bcm-voters = <&apps_bcm_voter>;
- };
-
- aggre2_noc: interconnect@1700000 {
- compatible = "qcom,sdm845-aggre2-noc";
- reg = <0 0x01700000 0 0x1f300>;
- #interconnect-cells = <2>;
- qcom,bcm-voters = <&apps_bcm_voter>;
- };
-
- mmss_noc: interconnect@1740000 {
- compatible = "qcom,sdm845-mmss-noc";
- reg = <0 0x01740000 0 0x1c100>;
- #interconnect-cells = <2>;
- qcom,bcm-voters = <&apps_bcm_voter>;
- };
-
- ufs_mem_hc: ufshc@1d84000 {
- compatible = "qcom,sdm845-ufshc", "qcom,ufshc",
- "jedec,ufs-2.0";
- reg = <0 0x01d84000 0 0x2500>,
- <0 0x01d90000 0 0x8000>;
- reg-names = "std", "ice";
- interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&ufs_mem_phy_lanes>;
- phy-names = "ufsphy";
- lanes-per-direction = <2>;
- power-domains = <&gcc UFS_PHY_GDSC>;
- #reset-cells = <1>;
- resets = <&gcc GCC_UFS_PHY_BCR>;
- reset-names = "rst";
-
- iommus = <&apps_smmu 0x100 0xf>;
-
- clock-names =
- "core_clk",
- "bus_aggr_clk",
- "iface_clk",
- "core_clk_unipro",
- "ref_clk",
- "tx_lane0_sync_clk",
- "rx_lane0_sync_clk",
- "rx_lane1_sync_clk",
- "ice_core_clk";
- clocks =
- <&gcc GCC_UFS_PHY_AXI_CLK>,
- <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
- <&gcc GCC_UFS_PHY_AHB_CLK>,
- <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,
- <&rpmhcc RPMH_CXO_CLK>,
- <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
- <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
- <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>,
- <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
- freq-table-hz =
- <50000000 200000000>,
- <0 0>,
- <0 0>,
- <37500000 150000000>,
- <0 0>,
- <0 0>,
- <0 0>,
- <0 0>,
- <0 300000000>;
-
- status = "disabled";
- };
-
- ufs_mem_phy: phy@1d87000 {
- compatible = "qcom,sdm845-qmp-ufs-phy";
- reg = <0 0x01d87000 0 0x18c>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- clock-names = "ref",
- "ref_aux";
- clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
- <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
-
- resets = <&ufs_mem_hc 0>;
- reset-names = "ufsphy";
- status = "disabled";
-
- ufs_mem_phy_lanes: lanes@1d87400 {
- reg = <0 0x01d87400 0 0x108>,
- <0 0x01d87600 0 0x1e0>,
- <0 0x01d87c00 0 0x1dc>,
- <0 0x01d87800 0 0x108>,
- <0 0x01d87a00 0 0x1e0>;
- #phy-cells = <0>;
- };
- };
-
- cryptobam: dma@1dc4000 {
- compatible = "qcom,bam-v1.7.0";
- reg = <0 0x01dc4000 0 0x24000>;
- interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rpmhcc 15>;
- clock-names = "bam_clk";
- #dma-cells = <1>;
- qcom,ee = <0>;
- qcom,controlled-remotely = <1>;
- iommus = <&apps_smmu 0x704 0x1>,
- <&apps_smmu 0x706 0x1>,
- <&apps_smmu 0x714 0x1>,
- <&apps_smmu 0x716 0x1>;
- };
-
- crypto: crypto@1dfa000 {
- compatible = "qcom,crypto-v5.4";
- reg = <0 0x01dfa000 0 0x6000>;
- clocks = <&gcc GCC_CE1_AHB_CLK>,
- <&gcc GCC_CE1_AHB_CLK>,
- <&rpmhcc 15>;
- clock-names = "iface", "bus", "core";
- dmas = <&cryptobam 6>, <&cryptobam 7>;
- dma-names = "rx", "tx";
- iommus = <&apps_smmu 0x704 0x1>,
- <&apps_smmu 0x706 0x1>,
- <&apps_smmu 0x714 0x1>,
- <&apps_smmu 0x716 0x1>;
- };
-
- ipa: ipa@1e40000 {
- compatible = "qcom,sdm845-ipa";
-
- iommus = <&apps_smmu 0x720 0x0>,
- <&apps_smmu 0x722 0x0>;
- reg = <0 0x1e40000 0 0x7000>,
- <0 0x1e47000 0 0x2000>,
- <0 0x1e04000 0 0x2c000>;
- reg-names = "ipa-reg",
- "ipa-shared",
- "gsi";
-
- interrupts-extended = <&intc GIC_SPI 311 IRQ_TYPE_EDGE_RISING>,
- <&intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>,
- <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "ipa",
- "gsi",
- "ipa-clock-query",
- "ipa-setup-ready";
-
- clocks = <&rpmhcc RPMH_IPA_CLK>;
- clock-names = "core";
-
- interconnects = <&aggre2_noc MASTER_IPA 0 &mem_noc SLAVE_EBI1 0>,
- <&aggre2_noc MASTER_IPA 0 &system_noc SLAVE_IMEM 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_IPA_CFG 0>;
- interconnect-names = "memory",
- "imem",
- "config";
-
- qcom,smem-states = <&ipa_smp2p_out 0>,
- <&ipa_smp2p_out 1>;
- qcom,smem-state-names = "ipa-clock-enabled-valid",
- "ipa-clock-enabled";
-
- status = "disabled";
- };
-
- tcsr_mutex_regs: syscon@1f40000 {
- compatible = "syscon";
- reg = <0 0x01f40000 0 0x40000>;
- };
-
- tlmm: pinctrl@3400000 {
- compatible = "qcom,sdm845-pinctrl";
- reg = <0 0x03400000 0 0xc00000>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 150>;
- wakeup-parent = <&pdc_intc>;
-
- cci0_default: cci0-default {
- /* SDA, SCL */
- pins = "gpio17", "gpio18";
- function = "cci_i2c";
-
- bias-pull-up;
- drive-strength = <2>; /* 2 mA */
- };
-
- cci0_sleep: cci0-sleep {
- /* SDA, SCL */
- pins = "gpio17", "gpio18";
- function = "cci_i2c";
-
- drive-strength = <2>; /* 2 mA */
- bias-pull-down;
- };
-
- cci1_default: cci1-default {
- /* SDA, SCL */
- pins = "gpio19", "gpio20";
- function = "cci_i2c";
-
- bias-pull-up;
- drive-strength = <2>; /* 2 mA */
- };
-
- cci1_sleep: cci1-sleep {
- /* SDA, SCL */
- pins = "gpio19", "gpio20";
- function = "cci_i2c";
-
- drive-strength = <2>; /* 2 mA */
- bias-pull-down;
- };
-
- qspi_clk: qspi-clk {
- pinmux {
- pins = "gpio95";
- function = "qspi_clk";
- };
- };
-
- qspi_cs0: qspi-cs0 {
- pinmux {
- pins = "gpio90";
- function = "qspi_cs";
- };
- };
-
- qspi_cs1: qspi-cs1 {
- pinmux {
- pins = "gpio89";
- function = "qspi_cs";
- };
- };
-
- qspi_data01: qspi-data01 {
- pinmux-data {
- pins = "gpio91", "gpio92";
- function = "qspi_data";
- };
- };
-
- qspi_data12: qspi-data12 {
- pinmux-data {
- pins = "gpio93", "gpio94";
- function = "qspi_data";
- };
- };
-
- qup_i2c0_default: qup-i2c0-default {
- pinmux {
- pins = "gpio0", "gpio1";
- function = "qup0";
- };
- };
-
- qup_i2c1_default: qup-i2c1-default {
- pinmux {
- pins = "gpio17", "gpio18";
- function = "qup1";
- };
- };
-
- qup_i2c2_default: qup-i2c2-default {
- pinmux {
- pins = "gpio27", "gpio28";
- function = "qup2";
- };
- };
-
- qup_i2c3_default: qup-i2c3-default {
- pinmux {
- pins = "gpio41", "gpio42";
- function = "qup3";
- };
- };
-
- qup_i2c4_default: qup-i2c4-default {
- pinmux {
- pins = "gpio89", "gpio90";
- function = "qup4";
- };
- };
-
- qup_i2c5_default: qup-i2c5-default {
- pinmux {
- pins = "gpio85", "gpio86";
- function = "qup5";
- };
- };
-
- qup_i2c6_default: qup-i2c6-default {
- pinmux {
- pins = "gpio45", "gpio46";
- function = "qup6";
- };
- };
-
- qup_i2c7_default: qup-i2c7-default {
- pinmux {
- pins = "gpio93", "gpio94";
- function = "qup7";
- };
- };
-
- qup_i2c8_default: qup-i2c8-default {
- pinmux {
- pins = "gpio65", "gpio66";
- function = "qup8";
- };
- };
-
- qup_i2c9_default: qup-i2c9-default {
- pinmux {
- pins = "gpio6", "gpio7";
- function = "qup9";
- };
- };
-
- qup_i2c10_default: qup-i2c10-default {
- pinmux {
- pins = "gpio55", "gpio56";
- function = "qup10";
- };
- };
-
- qup_i2c11_default: qup-i2c11-default {
- pinmux {
- pins = "gpio31", "gpio32";
- function = "qup11";
- };
- };
-
- qup_i2c12_default: qup-i2c12-default {
- pinmux {
- pins = "gpio49", "gpio50";
- function = "qup12";
- };
- };
-
- qup_i2c13_default: qup-i2c13-default {
- pinmux {
- pins = "gpio105", "gpio106";
- function = "qup13";
- };
- };
-
- qup_i2c14_default: qup-i2c14-default {
- pinmux {
- pins = "gpio33", "gpio34";
- function = "qup14";
- };
- };
-
- qup_i2c15_default: qup-i2c15-default {
- pinmux {
- pins = "gpio81", "gpio82";
- function = "qup15";
- };
- };
-
- qup_spi0_default: qup-spi0-default {
- pinmux {
- pins = "gpio0", "gpio1",
- "gpio2", "gpio3";
- function = "qup0";
- };
-
- config {
- pins = "gpio0", "gpio1",
- "gpio2", "gpio3";
- drive-strength = <6>;
- bias-disable;
- };
- };
-
- qup_spi1_default: qup-spi1-default {
- pinmux {
- pins = "gpio17", "gpio18",
- "gpio19", "gpio20";
- function = "qup1";
- };
- };
-
- qup_spi2_default: qup-spi2-default {
- pinmux {
- pins = "gpio27", "gpio28",
- "gpio29", "gpio30";
- function = "qup2";
- };
- };
-
- qup_spi3_default: qup-spi3-default {
- pinmux {
- pins = "gpio41", "gpio42",
- "gpio43", "gpio44";
- function = "qup3";
- };
- };
-
- qup_spi4_default: qup-spi4-default {
- pinmux {
- pins = "gpio89", "gpio90",
- "gpio91", "gpio92";
- function = "qup4";
- };
- };
-
- qup_spi5_default: qup-spi5-default {
- pinmux {
- pins = "gpio85", "gpio86",
- "gpio87", "gpio88";
- function = "qup5";
- };
- };
-
- qup_spi6_default: qup-spi6-default {
- pinmux {
- pins = "gpio45", "gpio46",
- "gpio47", "gpio48";
- function = "qup6";
- };
- };
-
- qup_spi7_default: qup-spi7-default {
- pinmux {
- pins = "gpio93", "gpio94",
- "gpio95", "gpio96";
- function = "qup7";
- };
- };
-
- qup_spi8_default: qup-spi8-default {
- pinmux {
- pins = "gpio65", "gpio66",
- "gpio67", "gpio68";
- function = "qup8";
- };
- };
-
- qup_spi9_default: qup-spi9-default {
- pinmux {
- pins = "gpio6", "gpio7",
- "gpio4", "gpio5";
- function = "qup9";
- };
- };
-
- qup_spi10_default: qup-spi10-default {
- pinmux {
- pins = "gpio55", "gpio56",
- "gpio53", "gpio54";
- function = "qup10";
- };
- };
-
- qup_spi11_default: qup-spi11-default {
- pinmux {
- pins = "gpio31", "gpio32",
- "gpio33", "gpio34";
- function = "qup11";
- };
- };
-
- qup_spi12_default: qup-spi12-default {
- pinmux {
- pins = "gpio49", "gpio50",
- "gpio51", "gpio52";
- function = "qup12";
- };
- };
-
- qup_spi13_default: qup-spi13-default {
- pinmux {
- pins = "gpio105", "gpio106",
- "gpio107", "gpio108";
- function = "qup13";
- };
- };
-
- qup_spi14_default: qup-spi14-default {
- pinmux {
- pins = "gpio33", "gpio34",
- "gpio31", "gpio32";
- function = "qup14";
- };
- };
-
- qup_spi15_default: qup-spi15-default {
- pinmux {
- pins = "gpio81", "gpio82",
- "gpio83", "gpio84";
- function = "qup15";
- };
- };
-
- qup_uart0_default: qup-uart0-default {
- pinmux {
- pins = "gpio2", "gpio3";
- function = "qup0";
- };
- };
-
- qup_uart1_default: qup-uart1-default {
- pinmux {
- pins = "gpio19", "gpio20";
- function = "qup1";
- };
- };
-
- qup_uart2_default: qup-uart2-default {
- pinmux {
- pins = "gpio29", "gpio30";
- function = "qup2";
- };
- };
-
- qup_uart3_default: qup-uart3-default {
- pinmux {
- pins = "gpio43", "gpio44";
- function = "qup3";
- };
- };
-
- qup_uart4_default: qup-uart4-default {
- pinmux {
- pins = "gpio91", "gpio92";
- function = "qup4";
- };
- };
-
- qup_uart5_default: qup-uart5-default {
- pinmux {
- pins = "gpio87", "gpio88";
- function = "qup5";
- };
- };
-
- qup_uart6_default: qup-uart6-default {
- pinmux {
- pins = "gpio47", "gpio48";
- function = "qup6";
- };
- };
-
- qup_uart7_default: qup-uart7-default {
- pinmux {
- pins = "gpio95", "gpio96";
- function = "qup7";
- };
- };
-
- qup_uart8_default: qup-uart8-default {
- pinmux {
- pins = "gpio67", "gpio68";
- function = "qup8";
- };
- };
-
- qup_uart9_default: qup-uart9-default {
- pinmux {
- pins = "gpio4", "gpio5";
- function = "qup9";
- };
- };
-
- qup_uart10_default: qup-uart10-default {
- pinmux {
- pins = "gpio53", "gpio54";
- function = "qup10";
- };
- };
-
- qup_uart11_default: qup-uart11-default {
- pinmux {
- pins = "gpio33", "gpio34";
- function = "qup11";
- };
- };
-
- qup_uart12_default: qup-uart12-default {
- pinmux {
- pins = "gpio51", "gpio52";
- function = "qup12";
- };
- };
-
- qup_uart13_default: qup-uart13-default {
- pinmux {
- pins = "gpio107", "gpio108";
- function = "qup13";
- };
- };
-
- qup_uart14_default: qup-uart14-default {
- pinmux {
- pins = "gpio31", "gpio32";
- function = "qup14";
- };
- };
-
- qup_uart15_default: qup-uart15-default {
- pinmux {
- pins = "gpio83", "gpio84";
- function = "qup15";
- };
- };
-
- quat_mi2s_sleep: quat_mi2s_sleep {
- mux {
- pins = "gpio58", "gpio59";
- function = "gpio";
- };
-
- config {
- pins = "gpio58", "gpio59";
- drive-strength = <2>;
- bias-pull-down;
- input-enable;
- };
- };
-
- quat_mi2s_active: quat_mi2s_active {
- mux {
- pins = "gpio58", "gpio59";
- function = "qua_mi2s";
- };
-
- config {
- pins = "gpio58", "gpio59";
- drive-strength = <8>;
- bias-disable;
- output-high;
- };
- };
-
- quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep {
- mux {
- pins = "gpio60";
- function = "gpio";
- };
-
- config {
- pins = "gpio60";
- drive-strength = <2>;
- bias-pull-down;
- input-enable;
- };
- };
-
- quat_mi2s_sd0_active: quat_mi2s_sd0_active {
- mux {
- pins = "gpio60";
- function = "qua_mi2s";
- };
-
- config {
- pins = "gpio60";
- drive-strength = <8>;
- bias-disable;
- };
- };
-
- quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep {
- mux {
- pins = "gpio61";
- function = "gpio";
- };
-
- config {
- pins = "gpio61";
- drive-strength = <2>;
- bias-pull-down;
- input-enable;
- };
- };
-
- quat_mi2s_sd1_active: quat_mi2s_sd1_active {
- mux {
- pins = "gpio61";
- function = "qua_mi2s";
- };
-
- config {
- pins = "gpio61";
- drive-strength = <8>;
- bias-disable;
- };
- };
-
- quat_mi2s_sd2_sleep: quat_mi2s_sd2_sleep {
- mux {
- pins = "gpio62";
- function = "gpio";
- };
-
- config {
- pins = "gpio62";
- drive-strength = <2>;
- bias-pull-down;
- input-enable;
- };
- };
-
- quat_mi2s_sd2_active: quat_mi2s_sd2_active {
- mux {
- pins = "gpio62";
- function = "qua_mi2s";
- };
-
- config {
- pins = "gpio62";
- drive-strength = <8>;
- bias-disable;
- };
- };
-
- quat_mi2s_sd3_sleep: quat_mi2s_sd3_sleep {
- mux {
- pins = "gpio63";
- function = "gpio";
- };
-
- config {
- pins = "gpio63";
- drive-strength = <2>;
- bias-pull-down;
- input-enable;
- };
- };
-
- quat_mi2s_sd3_active: quat_mi2s_sd3_active {
- mux {
- pins = "gpio63";
- function = "qua_mi2s";
- };
-
- config {
- pins = "gpio63";
- drive-strength = <8>;
- bias-disable;
- };
- };
-
- sde_dsi_active: sde_dsi_active {
- mux {
- pins = "gpio6", "gpio52";
- function = "gpio";
- };
-
- config {
- pins = "gpio6", "gpio52";
- drive-strength = <8>; /* 8 mA */
- bias-disable = <0>; /* no pull */
- };
- };
-
- sde_dsi_suspend: sde_dsi_suspend {
- mux {
- pins = "gpio6", "gpio52";
- function = "gpio";
- };
-
- config {
- pins = "gpio6", "gpio52";
- drive-strength = <2>; /* 2 mA */
- bias-pull-down; /* PULL DOWN */
- };
- };
-
- sde_te_active: sde_te_active {
- mux {
- pins = "gpio10";
- function = "mdp_vsync";
- };
-
- config {
- pins = "gpio10";
- drive-strength = <2>; /* 2 mA */
- bias-pull-down; /* PULL DOWN */
- };
- };
-
- sde_te_suspend: sde_te_suspend {
- mux {
- pins = "gpio10";
- function = "mdp_vsync";
- };
-
- config {
- pins = "gpio10";
- drive-strength = <2>; /* 2 mA */
- bias-pull-down; /* PULL DOWN */
- };
- };
- };
-
- mss_pil: remoteproc@4080000 {
- compatible = "qcom,sdm845-mss-pil";
- reg = <0 0x04080000 0 0x408>, <0 0x04180000 0 0x48>;
- reg-names = "qdsp6", "rmb";
-
- interrupts-extended =
- <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
- <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
- <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog", "fatal", "ready",
- "handover", "stop-ack",
- "shutdown-ack";
-
- clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
- <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
- <&gcc GCC_BOOT_ROM_AHB_CLK>,
- <&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,
- <&gcc GCC_MSS_SNOC_AXI_CLK>,
- <&gcc GCC_MSS_MFAB_AXIS_CLK>,
- <&gcc GCC_PRNG_AHB_CLK>,
- <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "iface", "bus", "mem", "gpll0_mss",
- "snoc_axi", "mnoc_axi", "prng", "xo";
-
- qcom,smem-states = <&modem_smp2p_out 0>;
- qcom,smem-state-names = "stop";
-
- resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
- <&pdc_reset PDC_MODEM_SYNC_RESET>;
- reset-names = "mss_restart", "pdc_reset";
-
- qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>;
-
- power-domains = <&aoss_qmp 2>,
- <&rpmhpd SDM845_CX>,
- <&rpmhpd SDM845_MX>,
- <&rpmhpd SDM845_MSS>;
- power-domain-names = "load_state", "cx", "mx", "mss";
-
- mba {
- memory-region = <&mba_region>;
- };
-
- mpss {
- memory-region = <&mpss_region>;
- };
-
- glink-edge {
- interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;
- label = "modem";
- qcom,remote-pid = <1>;
- mboxes = <&apss_shared 12>;
- };
- };
-
- gpucc: clock-controller@5090000 {
- compatible = "qcom,sdm845-gpucc";
- reg = <0 0x05090000 0 0x9000>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- #power-domain-cells = <1>;
- clocks = <&rpmhcc RPMH_CXO_CLK>,
- <&gcc GCC_GPU_GPLL0_CLK_SRC>,
- <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
- clock-names = "bi_tcxo",
- "gcc_gpu_gpll0_clk_src",
- "gcc_gpu_gpll0_div_clk_src";
- };
-
- stm@6002000 {
- compatible = "arm,coresight-stm", "arm,primecell";
- reg = <0 0x06002000 0 0x1000>,
- <0 0x16280000 0 0x180000>;
- reg-names = "stm-base", "stm-stimulus-base";
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
-
- out-ports {
- port {
- stm_out: endpoint {
- remote-endpoint =
- <&funnel0_in7>;
- };
- };
- };
- };
-
- funnel@6041000 {
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0 0x06041000 0 0x1000>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
-
- out-ports {
- port {
- funnel0_out: endpoint {
- remote-endpoint =
- <&merge_funnel_in0>;
- };
- };
- };
-
- in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@7 {
- reg = <7>;
- funnel0_in7: endpoint {
- remote-endpoint = <&stm_out>;
- };
- };
- };
- };
-
- funnel@6043000 {
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0 0x06043000 0 0x1000>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
-
- out-ports {
- port {
- funnel2_out: endpoint {
- remote-endpoint =
- <&merge_funnel_in2>;
- };
- };
- };
-
- in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@5 {
- reg = <5>;
- funnel2_in5: endpoint {
- remote-endpoint =
- <&apss_merge_funnel_out>;
- };
- };
- };
- };
-
- funnel@6045000 {
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0 0x06045000 0 0x1000>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
-
- out-ports {
- port {
- merge_funnel_out: endpoint {
- remote-endpoint = <&etf_in>;
- };
- };
- };
-
- in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- merge_funnel_in0: endpoint {
- remote-endpoint =
- <&funnel0_out>;
- };
- };
-
- port@2 {
- reg = <2>;
- merge_funnel_in2: endpoint {
- remote-endpoint =
- <&funnel2_out>;
- };
- };
- };
- };
-
- replicator@6046000 {
- compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
- reg = <0 0x06046000 0 0x1000>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
-
- out-ports {
- port {
- replicator_out: endpoint {
- remote-endpoint = <&etr_in>;
- };
- };
- };
-
- in-ports {
- port {
- replicator_in: endpoint {
- remote-endpoint = <&etf_out>;
- };
- };
- };
- };
-
- etf@6047000 {
- compatible = "arm,coresight-tmc", "arm,primecell";
- reg = <0 0x06047000 0 0x1000>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
-
- out-ports {
- port {
- etf_out: endpoint {
- remote-endpoint =
- <&replicator_in>;
- };
- };
- };
-
- in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@1 {
- reg = <1>;
- etf_in: endpoint {
- remote-endpoint =
- <&merge_funnel_out>;
- };
- };
- };
- };
-
- etr@6048000 {
- compatible = "arm,coresight-tmc", "arm,primecell";
- reg = <0 0x06048000 0 0x1000>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
- arm,scatter-gather;
-
- in-ports {
- port {
- etr_in: endpoint {
- remote-endpoint =
- <&replicator_out>;
- };
- };
- };
- };
-
- etm@7040000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0 0x07040000 0 0x1000>;
-
- cpu = <&CPU0>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
- arm,coresight-loses-context-with-cpu;
-
- out-ports {
- port {
- etm0_out: endpoint {
- remote-endpoint =
- <&apss_funnel_in0>;
- };
- };
- };
- };
-
- etm@7140000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0 0x07140000 0 0x1000>;
-
- cpu = <&CPU1>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
- arm,coresight-loses-context-with-cpu;
-
- out-ports {
- port {
- etm1_out: endpoint {
- remote-endpoint =
- <&apss_funnel_in1>;
- };
- };
- };
- };
-
- etm@7240000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0 0x07240000 0 0x1000>;
-
- cpu = <&CPU2>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
- arm,coresight-loses-context-with-cpu;
-
- out-ports {
- port {
- etm2_out: endpoint {
- remote-endpoint =
- <&apss_funnel_in2>;
- };
- };
- };
- };
-
- etm@7340000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0 0x07340000 0 0x1000>;
-
- cpu = <&CPU3>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
- arm,coresight-loses-context-with-cpu;
-
- out-ports {
- port {
- etm3_out: endpoint {
- remote-endpoint =
- <&apss_funnel_in3>;
- };
- };
- };
- };
-
- etm@7440000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0 0x07440000 0 0x1000>;
-
- cpu = <&CPU4>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
- arm,coresight-loses-context-with-cpu;
-
- out-ports {
- port {
- etm4_out: endpoint {
- remote-endpoint =
- <&apss_funnel_in4>;
- };
- };
- };
- };
-
- etm@7540000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0 0x07540000 0 0x1000>;
-
- cpu = <&CPU5>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
- arm,coresight-loses-context-with-cpu;
-
- out-ports {
- port {
- etm5_out: endpoint {
- remote-endpoint =
- <&apss_funnel_in5>;
- };
- };
- };
- };
-
- etm@7640000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0 0x07640000 0 0x1000>;
-
- cpu = <&CPU6>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
- arm,coresight-loses-context-with-cpu;
-
- out-ports {
- port {
- etm6_out: endpoint {
- remote-endpoint =
- <&apss_funnel_in6>;
- };
- };
- };
- };
-
- etm@7740000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0 0x07740000 0 0x1000>;
-
- cpu = <&CPU7>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
- arm,coresight-loses-context-with-cpu;
-
- out-ports {
- port {
- etm7_out: endpoint {
- remote-endpoint =
- <&apss_funnel_in7>;
- };
- };
- };
- };
-
- funnel@7800000 { /* APSS Funnel */
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0 0x07800000 0 0x1000>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
-
- out-ports {
- port {
- apss_funnel_out: endpoint {
- remote-endpoint =
- <&apss_merge_funnel_in>;
- };
- };
- };
-
- in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- apss_funnel_in0: endpoint {
- remote-endpoint =
- <&etm0_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- apss_funnel_in1: endpoint {
- remote-endpoint =
- <&etm1_out>;
- };
- };
-
- port@2 {
- reg = <2>;
- apss_funnel_in2: endpoint {
- remote-endpoint =
- <&etm2_out>;
- };
- };
-
- port@3 {
- reg = <3>;
- apss_funnel_in3: endpoint {
- remote-endpoint =
- <&etm3_out>;
- };
- };
-
- port@4 {
- reg = <4>;
- apss_funnel_in4: endpoint {
- remote-endpoint =
- <&etm4_out>;
- };
- };
-
- port@5 {
- reg = <5>;
- apss_funnel_in5: endpoint {
- remote-endpoint =
- <&etm5_out>;
- };
- };
-
- port@6 {
- reg = <6>;
- apss_funnel_in6: endpoint {
- remote-endpoint =
- <&etm6_out>;
- };
- };
-
- port@7 {
- reg = <7>;
- apss_funnel_in7: endpoint {
- remote-endpoint =
- <&etm7_out>;
- };
- };
- };
- };
-
- funnel@7810000 {
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0 0x07810000 0 0x1000>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
-
- out-ports {
- port {
- apss_merge_funnel_out: endpoint {
- remote-endpoint =
- <&funnel2_in5>;
- };
- };
- };
-
- in-ports {
- port {
- apss_merge_funnel_in: endpoint {
- remote-endpoint =
- <&apss_funnel_out>;
- };
- };
- };
- };
-
- sdhc_2: sdhci@8804000 {
- compatible = "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5";
- reg = <0 0x08804000 0 0x1000>;
-
- interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hc_irq", "pwr_irq";
-
- clocks = <&gcc GCC_SDCC2_AHB_CLK>,
- <&gcc GCC_SDCC2_APPS_CLK>;
- clock-names = "iface", "core";
- iommus = <&apps_smmu 0xa0 0xf>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&sdhc2_opp_table>;
-
- status = "disabled";
-
- sdhc2_opp_table: sdhc2-opp-table {
- compatible = "operating-points-v2";
-
- opp-9600000 {
- opp-hz = /bits/ 64 <9600000>;
- required-opps = <&rpmhpd_opp_min_svs>;
- };
-
- opp-19200000 {
- opp-hz = /bits/ 64 <19200000>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- required-opps = <&rpmhpd_opp_svs>;
- };
-
- opp-201500000 {
- opp-hz = /bits/ 64 <201500000>;
- required-opps = <&rpmhpd_opp_svs_l1>;
- };
- };
- };
-
- qspi_opp_table: qspi-opp-table {
- compatible = "operating-points-v2";
-
- opp-19200000 {
- opp-hz = /bits/ 64 <19200000>;
- required-opps = <&rpmhpd_opp_min_svs>;
- };
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
- opp-150000000 {
- opp-hz = /bits/ 64 <150000000>;
- required-opps = <&rpmhpd_opp_svs>;
- };
-
- opp-300000000 {
- opp-hz = /bits/ 64 <300000000>;
- required-opps = <&rpmhpd_opp_nom>;
- };
- };
-
- qspi: spi@88df000 {
- compatible = "qcom,sdm845-qspi", "qcom,qspi-v1";
- reg = <0 0x088df000 0 0x600>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
- <&gcc GCC_QSPI_CORE_CLK>;
- clock-names = "iface", "core";
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qspi_opp_table>;
- status = "disabled";
- };
-
- slim: slim@171c0000 {
- compatible = "qcom,slim-ngd-v2.1.0";
- reg = <0 0x171c0000 0 0x2c000>;
- interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
-
- qcom,apps-ch-pipes = <0x780000>;
- qcom,ea-pc = <0x270>;
- status = "okay";
- dmas = <&slimbam 3>, <&slimbam 4>,
- <&slimbam 5>, <&slimbam 6>;
- dma-names = "rx", "tx", "tx2", "rx2";
-
- iommus = <&apps_smmu 0x1806 0x0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- ngd@1 {
- reg = <1>;
- #address-cells = <2>;
- #size-cells = <0>;
-
- wcd9340_ifd: ifd@0{
- compatible = "slim217,250";
- reg = <0 0>;
- };
-
- wcd9340: codec@1{
- compatible = "slim217,250";
- reg = <1 0>;
- slim-ifc-dev = <&wcd9340_ifd>;
-
- #sound-dai-cells = <1>;
-
- interrupts-extended = <&tlmm 54 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <1>;
-
- #clock-cells = <0>;
- clock-frequency = <9600000>;
- clock-output-names = "mclk";
- qcom,micbias1-millivolt = <1800>;
- qcom,micbias2-millivolt = <1800>;
- qcom,micbias3-millivolt = <1800>;
- qcom,micbias4-millivolt = <1800>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- wcdgpio: gpio-controller@42 {
- compatible = "qcom,wcd9340-gpio";
- gpio-controller;
- #gpio-cells = <2>;
- reg = <0x42 0x2>;
- };
-
- swm: swm@c85 {
- compatible = "qcom,soundwire-v1.3.0";
- reg = <0xc85 0x40>;
- interrupts-extended = <&wcd9340 20>;
-
- qcom,dout-ports = <6>;
- qcom,din-ports = <2>;
- qcom,ports-sinterval-low =/bits/ 8 <0x07 0x1F 0x3F 0x7 0x1F 0x3F 0x0F 0x0F>;
- qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0C 0x6 0x12 0x0D 0x07 0x0A >;
- qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x1F 0x00 0x00 0x1F 0x00 0x00>;
-
- #sound-dai-cells = <1>;
- clocks = <&wcd9340>;
- clock-names = "iface";
- #address-cells = <2>;
- #size-cells = <0>;
-
-
- };
- };
- };
- };
-
- sound: sound {
- };
-
- usb_1_hsphy: phy@88e2000 {
- compatible = "qcom,sdm845-qusb2-phy", "qcom,qusb2-v2-phy";
- reg = <0 0x088e2000 0 0x400>;
- status = "disabled";
- #phy-cells = <0>;
-
- clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
- <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "cfg_ahb", "ref";
-
- resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
-
- nvmem-cells = <&qusb2p_hstx_trim>;
- };
-
- usb_2_hsphy: phy@88e3000 {
- compatible = "qcom,sdm845-qusb2-phy", "qcom,qusb2-v2-phy";
- reg = <0 0x088e3000 0 0x400>;
- status = "disabled";
- #phy-cells = <0>;
-
- clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
- <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "cfg_ahb", "ref";
-
- resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
-
- nvmem-cells = <&qusb2s_hstx_trim>;
- };
-
- usb_1_qmpphy: phy@88e9000 {
- compatible = "qcom,sdm845-qmp-usb3-phy";
- reg = <0 0x088e9000 0 0x18c>,
- <0 0x088e8000 0 0x10>;
- reg-names = "reg-base", "dp_com";
- status = "disabled";
- #clock-cells = <1>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
- <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
- <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
- <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
- clock-names = "aux", "cfg_ahb", "ref", "com_aux";
-
- resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
- <&gcc GCC_USB3_PHY_PRIM_BCR>;
- reset-names = "phy", "common";
-
- usb_1_ssphy: lanes@88e9200 {
- reg = <0 0x088e9200 0 0x128>,
- <0 0x088e9400 0 0x200>,
- <0 0x088e9c00 0 0x218>,
- <0 0x088e9600 0 0x128>,
- <0 0x088e9800 0 0x200>,
- <0 0x088e9a00 0 0x100>;
- #phy-cells = <0>;
- clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "usb3_phy_pipe_clk_src";
- };
- };
-
- usb_2_qmpphy: phy@88eb000 {
- compatible = "qcom,sdm845-qmp-usb3-uni-phy";
- reg = <0 0x088eb000 0 0x18c>;
- status = "disabled";
- #clock-cells = <1>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>,
- <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
- <&gcc GCC_USB3_SEC_CLKREF_CLK>,
- <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
- clock-names = "aux", "cfg_ahb", "ref", "com_aux";
-
- resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
- <&gcc GCC_USB3_PHY_SEC_BCR>;
- reset-names = "phy", "common";
-
- usb_2_ssphy: lane@88eb200 {
- reg = <0 0x088eb200 0 0x128>,
- <0 0x088eb400 0 0x1fc>,
- <0 0x088eb800 0 0x218>,
- <0 0x088eb600 0 0x70>;
- #phy-cells = <0>;
- clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "usb3_uni_phy_pipe_clk_src";
- };
- };
-
- usb_1: usb@a6f8800 {
- compatible = "qcom,sdm845-dwc3", "qcom,dwc3";
- reg = <0 0x0a6f8800 0 0x400>;
- status = "disabled";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- dma-ranges;
-
- clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
- <&gcc GCC_USB30_PRIM_MASTER_CLK>,
- <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
- <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
- <&gcc GCC_USB30_PRIM_SLEEP_CLK>;
- clock-names = "cfg_noc", "core", "iface", "mock_utmi",
- "sleep";
-
- assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
- <&gcc GCC_USB30_PRIM_MASTER_CLK>;
- assigned-clock-rates = <19200000>, <150000000>;
-
- interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hs_phy_irq", "ss_phy_irq",
- "dm_hs_phy_irq", "dp_hs_phy_irq";
-
- power-domains = <&gcc USB30_PRIM_GDSC>;
-
- resets = <&gcc GCC_USB30_PRIM_BCR>;
-
- interconnects = <&aggre2_noc MASTER_USB3_0 0 &mem_noc SLAVE_EBI1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
- interconnect-names = "usb-ddr", "apps-usb";
-
- usb_1_dwc3: dwc3@a600000 {
- compatible = "snps,dwc3";
- reg = <0 0x0a600000 0 0xcd00>;
- interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
- iommus = <&apps_smmu 0x740 0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_enblslpm_quirk;
- phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
- phy-names = "usb2-phy", "usb3-phy";
- };
- };
-
- usb_2: usb@a8f8800 {
- compatible = "qcom,sdm845-dwc3", "qcom,dwc3";
- reg = <0 0x0a8f8800 0 0x400>;
- status = "disabled";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- dma-ranges;
-
- clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
- <&gcc GCC_USB30_SEC_MASTER_CLK>,
- <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>,
- <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
- <&gcc GCC_USB30_SEC_SLEEP_CLK>;
- clock-names = "cfg_noc", "core", "iface", "mock_utmi",
- "sleep";
-
- assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
- <&gcc GCC_USB30_SEC_MASTER_CLK>;
- assigned-clock-rates = <19200000>, <150000000>;
-
- interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 490 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 491 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hs_phy_irq", "ss_phy_irq",
- "dm_hs_phy_irq", "dp_hs_phy_irq";
-
- power-domains = <&gcc USB30_SEC_GDSC>;
-
- resets = <&gcc GCC_USB30_SEC_BCR>;
-
- interconnects = <&aggre2_noc MASTER_USB3_1 0 &mem_noc SLAVE_EBI1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>;
- interconnect-names = "usb-ddr", "apps-usb";
-
- usb_2_dwc3: dwc3@a800000 {
- compatible = "snps,dwc3";
- reg = <0 0x0a800000 0 0xcd00>;
- interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
- iommus = <&apps_smmu 0x760 0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_enblslpm_quirk;
- phys = <&usb_2_hsphy>, <&usb_2_ssphy>;
- phy-names = "usb2-phy", "usb3-phy";
- };
- };
-
- venus: video-codec@aa00000 {
- compatible = "qcom,sdm845-venus-v2";
- reg = <0 0x0aa00000 0 0xff000>;
- interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&videocc VENUS_GDSC>,
- <&videocc VCODEC0_GDSC>,
- <&videocc VCODEC1_GDSC>,
- <&rpmhpd SDM845_CX>;
- power-domain-names = "venus", "vcodec0", "vcodec1", "cx";
- operating-points-v2 = <&venus_opp_table>;
- clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
- <&videocc VIDEO_CC_VENUS_AHB_CLK>,
- <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
- <&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
- <&videocc VIDEO_CC_VCODEC0_AXI_CLK>,
- <&videocc VIDEO_CC_VCODEC1_CORE_CLK>,
- <&videocc VIDEO_CC_VCODEC1_AXI_CLK>;
- clock-names = "core", "iface", "bus",
- "vcodec0_core", "vcodec0_bus",
- "vcodec1_core", "vcodec1_bus";
- iommus = <&apps_smmu 0x10a0 0x8>,
- <&apps_smmu 0x10b0 0x0>;
- memory-region = <&venus_mem>;
- interconnects = <&mmss_noc MASTER_VIDEO_P0 0 &mem_noc SLAVE_EBI1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_VENUS_CFG 0>;
- interconnect-names = "video-mem", "cpu-cfg";
-
- video-core0 {
- compatible = "venus-decoder";
- };
-
- video-core1 {
- compatible = "venus-encoder";
- };
-
- venus_opp_table: venus-opp-table {
- compatible = "operating-points-v2";
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- required-opps = <&rpmhpd_opp_min_svs>;
- };
-
- opp-200000000 {
- opp-hz = /bits/ 64 <200000000>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
- opp-320000000 {
- opp-hz = /bits/ 64 <320000000>;
- required-opps = <&rpmhpd_opp_svs>;
- };
-
- opp-380000000 {
- opp-hz = /bits/ 64 <380000000>;
- required-opps = <&rpmhpd_opp_svs_l1>;
- };
-
- opp-444000000 {
- opp-hz = /bits/ 64 <444000000>;
- required-opps = <&rpmhpd_opp_nom>;
- };
-
- opp-533000097 {
- opp-hz = /bits/ 64 <533000097>;
- required-opps = <&rpmhpd_opp_turbo>;
- };
- };
- };
-
- videocc: clock-controller@ab00000 {
- compatible = "qcom,sdm845-videocc";
- reg = <0 0x0ab00000 0 0x10000>;
- clocks = <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "bi_tcxo";
- #clock-cells = <1>;
- #power-domain-cells = <1>;
- #reset-cells = <1>;
- };
-
- cci: cci@ac4a000 {
- compatible = "qcom,sdm845-cci";
- #address-cells = <1>;
- #size-cells = <0>;
-
- reg = <0 0x0ac4a000 0 0x4000>;
- interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
- power-domains = <&clock_camcc TITAN_TOP_GDSC>;
-
- clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
- <&clock_camcc CAM_CC_SOC_AHB_CLK>,
- <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
- <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
- <&clock_camcc CAM_CC_CCI_CLK>,
- <&clock_camcc CAM_CC_CCI_CLK_SRC>;
- clock-names = "camnoc_axi",
- "soc_ahb",
- "slow_ahb_src",
- "cpas_ahb",
- "cci",
- "cci_src";
-
- assigned-clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
- <&clock_camcc CAM_CC_CCI_CLK>;
- assigned-clock-rates = <80000000>, <37500000>;
-
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&cci0_default &cci1_default>;
- pinctrl-1 = <&cci0_sleep &cci1_sleep>;
-
- status = "disabled";
-
- cci_i2c0: i2c-bus@0 {
- reg = <0>;
- clock-frequency = <1000000>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- cci_i2c1: i2c-bus@1 {
- reg = <1>;
- clock-frequency = <1000000>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
- };
-
- clock_camcc: clock-controller@ad00000 {
- compatible = "qcom,sdm845-camcc";
- reg = <0 0x0ad00000 0 0x10000>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- #power-domain-cells = <1>;
- };
-
- dsi_opp_table: dsi-opp-table {
- compatible = "operating-points-v2";
-
- opp-19200000 {
- opp-hz = /bits/ 64 <19200000>;
- required-opps = <&rpmhpd_opp_min_svs>;
- };
-
- opp-180000000 {
- opp-hz = /bits/ 64 <180000000>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
- opp-275000000 {
- opp-hz = /bits/ 64 <275000000>;
- required-opps = <&rpmhpd_opp_svs>;
- };
-
- opp-328580000 {
- opp-hz = /bits/ 64 <328580000>;
- required-opps = <&rpmhpd_opp_svs_l1>;
- };
-
- opp-358000000 {
- opp-hz = /bits/ 64 <358000000>;
- required-opps = <&rpmhpd_opp_nom>;
- };
- };
-
- mdss: mdss@ae00000 {
- compatible = "qcom,sdm845-mdss";
- reg = <0 0x0ae00000 0 0x1000>;
- reg-names = "mdss";
-
- power-domains = <&dispcc MDSS_GDSC>;
-
- clocks = <&gcc GCC_DISP_AHB_CLK>,
- <&gcc GCC_DISP_AXI_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>;
- clock-names = "iface", "bus", "core";
-
- assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
- assigned-clock-rates = <300000000>;
-
- interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interconnects = <&mmss_noc MASTER_MDP0 0 &mem_noc SLAVE_EBI1 0>,
- <&mmss_noc MASTER_MDP1 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "mdp0-mem", "mdp1-mem";
-
- iommus = <&apps_smmu 0x880 0x8>,
- <&apps_smmu 0xc80 0x8>;
-
- status = "disabled";
-
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- mdss_mdp: mdp@ae01000 {
- compatible = "qcom,sdm845-dpu";
- reg = <0 0x0ae01000 0 0x8f000>,
- <0 0x0aeb0000 0 0x2008>;
- reg-names = "mdp", "vbif";
-
- clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_AXI_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>,
- <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- clock-names = "iface", "bus", "core", "vsync";
-
- assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
- <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- assigned-clock-rates = <300000000>,
- <19200000>;
- operating-points-v2 = <&mdp_opp_table>;
- power-domains = <&rpmhpd SDM845_CX>;
-
- interrupt-parent = <&mdss>;
- interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
-
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dpu_intf1_out: endpoint {
- remote-endpoint = <&dsi0_in>;
- };
- };
-
- port@1 {
- reg = <1>;
- dpu_intf2_out: endpoint {
- remote-endpoint = <&dsi1_in>;
- };
- };
- };
-
- mdp_opp_table: mdp-opp-table {
- compatible = "operating-points-v2";
-
- opp-19200000 {
- opp-hz = /bits/ 64 <19200000>;
- required-opps = <&rpmhpd_opp_min_svs>;
- };
-
- opp-171428571 {
- opp-hz = /bits/ 64 <171428571>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
- opp-344000000 {
- opp-hz = /bits/ 64 <344000000>;
- required-opps = <&rpmhpd_opp_svs_l1>;
- };
-
- opp-430000000 {
- opp-hz = /bits/ 64 <430000000>;
- required-opps = <&rpmhpd_opp_nom>;
- };
- };
- };
-
- dsi0: dsi@ae94000 {
- compatible = "qcom,mdss-dsi-ctrl";
- reg = <0 0x0ae94000 0 0x400>;
- reg-names = "dsi_ctrl";
-
- interrupt-parent = <&mdss>;
- interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
-
- clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
- <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
- <&dispcc DISP_CC_MDSS_ESC0_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_AXI_CLK>;
- clock-names = "byte",
- "byte_intf",
- "pixel",
- "core",
- "iface",
- "bus";
- operating-points-v2 = <&dsi_opp_table>;
- power-domains = <&rpmhpd SDM845_CX>;
-
- phys = <&dsi0_phy>;
- phy-names = "dsi";
-
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dsi0_in: endpoint {
- remote-endpoint = <&dpu_intf1_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- dsi0_out: endpoint {
- };
- };
- };
- };
-
- dsi0_phy: dsi-phy@ae94400 {
- compatible = "qcom,dsi-phy-10nm";
- reg = <0 0x0ae94400 0 0x200>,
- <0 0x0ae94600 0 0x280>,
- <0 0x0ae94a00 0 0x1e0>;
- reg-names = "dsi_phy",
- "dsi_phy_lane",
- "dsi_pll";
-
- #clock-cells = <1>;
- #phy-cells = <0>;
-
- clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "iface", "ref";
-
- status = "disabled";
- };
-
- dsi1: dsi@ae96000 {
- compatible = "qcom,mdss-dsi-ctrl";
- reg = <0 0x0ae96000 0 0x400>;
- reg-names = "dsi_ctrl";
-
- interrupt-parent = <&mdss>;
- interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
-
- clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
- <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
- <&dispcc DISP_CC_MDSS_ESC1_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_AXI_CLK>;
- clock-names = "byte",
- "byte_intf",
- "pixel",
- "core",
- "iface",
- "bus";
- operating-points-v2 = <&dsi_opp_table>;
- power-domains = <&rpmhpd SDM845_CX>;
-
- phys = <&dsi1_phy>;
- phy-names = "dsi";
-
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dsi1_in: endpoint {
- remote-endpoint = <&dpu_intf2_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- dsi1_out: endpoint {
- };
- };
- };
- };
-
- dsi1_phy: dsi-phy@ae96400 {
- compatible = "qcom,dsi-phy-10nm";
- reg = <0 0x0ae96400 0 0x200>,
- <0 0x0ae96600 0 0x280>,
- <0 0x0ae96a00 0 0x10e>;
- reg-names = "dsi_phy",
- "dsi_phy_lane",
- "dsi_pll";
-
- #clock-cells = <1>;
- #phy-cells = <0>;
-
- clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "iface", "ref";
-
- status = "disabled";
- };
- };
-
- gpu: gpu@5000000 {
- compatible = "qcom,adreno-630.2", "qcom,adreno";
- #stream-id-cells = <16>;
-
- reg = <0 0x5000000 0 0x40000>, <0 0x509e000 0 0x10>;
- reg-names = "kgsl_3d0_reg_memory", "cx_mem";
-
- /*
- * Look ma, no clocks! The GPU clocks and power are
- * controlled entirely by the GMU
- */
-
- interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
-
- iommus = <&adreno_smmu 0>;
-
- operating-points-v2 = <&gpu_opp_table>;
-
- qcom,gmu = <&gmu>;
-
- interconnects = <&mem_noc MASTER_GFX3D 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "gfx-mem";
-
- gpu_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-710000000 {
- opp-hz = /bits/ 64 <710000000>;
- opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
- opp-peak-kBps = <7216000>;
- };
-
- opp-675000000 {
- opp-hz = /bits/ 64 <675000000>;
- opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
- opp-peak-kBps = <7216000>;
- };
-
- opp-596000000 {
- opp-hz = /bits/ 64 <596000000>;
- opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
- opp-peak-kBps = <6220000>;
- };
-
- opp-520000000 {
- opp-hz = /bits/ 64 <520000000>;
- opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
- opp-peak-kBps = <6220000>;
- };
-
- opp-414000000 {
- opp-hz = /bits/ 64 <414000000>;
- opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
- opp-peak-kBps = <4068000>;
- };
-
- opp-342000000 {
- opp-hz = /bits/ 64 <342000000>;
- opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
- opp-peak-kBps = <2724000>;
- };
-
- opp-257000000 {
- opp-hz = /bits/ 64 <257000000>;
- opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
- opp-peak-kBps = <1648000>;
- };
- };
- };
-
- adreno_smmu: iommu@5040000 {
- compatible = "qcom,sdm845-smmu-v2", "qcom,adreno-smmu", "qcom,smmu-v2";
- reg = <0 0x5040000 0 0x10000>;
- #iommu-cells = <1>;
- #global-interrupts = <2>;
- interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 364 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 365 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 366 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 367 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 368 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 369 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 370 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 371 IRQ_TYPE_EDGE_RISING>;
- clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
- <&gcc GCC_GPU_CFG_AHB_CLK>;
- clock-names = "bus", "iface";
-
- power-domains = <&gpucc GPU_CX_GDSC>;
- };
-
- gmu: gmu@506a000 {
- compatible="qcom,adreno-gmu-630.2", "qcom,adreno-gmu";
-
- reg = <0 0x506a000 0 0x30000>,
- <0 0xb280000 0 0x10000>,
- <0 0xb480000 0 0x10000>;
- reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq";
-
- interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hfi", "gmu";
-
- clocks = <&gpucc GPU_CC_CX_GMU_CLK>,
- <&gpucc GPU_CC_CXO_CLK>,
- <&gcc GCC_DDRSS_GPU_AXI_CLK>,
- <&gcc GCC_GPU_MEMNOC_GFX_CLK>;
- clock-names = "gmu", "cxo", "axi", "memnoc";
-
- power-domains = <&gpucc GPU_CX_GDSC>,
- <&gpucc GPU_GX_GDSC>;
- power-domain-names = "cx", "gx";
-
- iommus = <&adreno_smmu 5>;
-
- operating-points-v2 = <&gmu_opp_table>;
-
- gmu_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-400000000 {
- opp-hz = /bits/ 64 <400000000>;
- opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
- };
-
- opp-200000000 {
- opp-hz = /bits/ 64 <200000000>;
- opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
- };
- };
- };
-
- dispcc: clock-controller@af00000 {
- compatible = "qcom,sdm845-dispcc";
- reg = <0 0x0af00000 0 0x10000>;
- clocks = <&rpmhcc RPMH_CXO_CLK>,
- <&gcc GCC_DISP_GPLL0_CLK_SRC>,
- <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>,
- <&dsi0_phy 0>,
- <&dsi0_phy 1>,
- <&dsi1_phy 0>,
- <&dsi1_phy 1>,
- <0>,
- <0>;
- clock-names = "bi_tcxo",
- "gcc_disp_gpll0_clk_src",
- "gcc_disp_gpll0_div_clk_src",
- "dsi0_phy_pll_out_byteclk",
- "dsi0_phy_pll_out_dsiclk",
- "dsi1_phy_pll_out_byteclk",
- "dsi1_phy_pll_out_dsiclk",
- "dp_link_clk_divsel_ten",
- "dp_vco_divided_clk_src_mux";
- #clock-cells = <1>;
- #reset-cells = <1>;
- #power-domain-cells = <1>;
- };
-
- pdc_intc: interrupt-controller@b220000 {
- compatible = "qcom,sdm845-pdc", "qcom,pdc";
- reg = <0 0x0b220000 0 0x30000>;
- qcom,pdc-ranges = <0 480 94>, <94 609 15>, <115 630 7>;
- #interrupt-cells = <2>;
- interrupt-parent = <&intc>;
- interrupt-controller;
- };
-
- pdc_reset: reset-controller@b2e0000 {
- compatible = "qcom,sdm845-pdc-global";
- reg = <0 0x0b2e0000 0 0x20000>;
- #reset-cells = <1>;
- };
-
- tsens0: thermal-sensor@c263000 {
- compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
- reg = <0 0x0c263000 0 0x1ff>, /* TM */
- <0 0x0c222000 0 0x1ff>; /* SROT */
- #qcom,sensors = <13>;
- interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "uplow", "critical";
- #thermal-sensor-cells = <1>;
- };
-
- tsens1: thermal-sensor@c265000 {
- compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
- reg = <0 0x0c265000 0 0x1ff>, /* TM */
- <0 0x0c223000 0 0x1ff>; /* SROT */
- #qcom,sensors = <8>;
- interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "uplow", "critical";
- #thermal-sensor-cells = <1>;
- };
-
- aoss_reset: reset-controller@c2a0000 {
- compatible = "qcom,sdm845-aoss-cc";
- reg = <0 0x0c2a0000 0 0x31000>;
- #reset-cells = <1>;
- };
-
- aoss_qmp: qmp@c300000 {
- compatible = "qcom,sdm845-aoss-qmp";
- reg = <0 0x0c300000 0 0x100000>;
- interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
- mboxes = <&apss_shared 0>;
-
- #clock-cells = <0>;
- #power-domain-cells = <1>;
-
- cx_cdev: cx {
- #cooling-cells = <2>;
- };
-
- ebi_cdev: ebi {
- #cooling-cells = <2>;
- };
- };
-
- spmi_bus: spmi@c440000 {
- compatible = "qcom,spmi-pmic-arb";
- reg = <0 0x0c440000 0 0x1100>,
- <0 0x0c600000 0 0x2000000>,
- <0 0x0e600000 0 0x100000>,
- <0 0x0e700000 0 0xa0000>,
- <0 0x0c40a000 0 0x26000>;
- reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
- interrupt-names = "periph_irq";
- interrupts = <GIC_SPI 481 IRQ_TYPE_LEVEL_HIGH>;
- qcom,ee = <0>;
- qcom,channel = <0>;
- #address-cells = <2>;
- #size-cells = <0>;
- interrupt-controller;
- #interrupt-cells = <4>;
- cell-index = <0>;
- };
-
- imem@146bf000 {
- compatible = "simple-mfd";
- reg = <0 0x146bf000 0 0x1000>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- ranges = <0 0 0x146bf000 0x1000>;
-
- pil-reloc@94c {
- compatible = "qcom,pil-reloc-info";
- reg = <0x94c 0xc8>;
- };
- };
-
- apps_smmu: iommu@15000000 {
- compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
- reg = <0 0x15000000 0 0x80000>;
- #iommu-cells = <2>;
- #global-interrupts = <1>;
- interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- lpasscc: clock-controller@17014000 {
- compatible = "qcom,sdm845-lpasscc";
- reg = <0 0x17014000 0 0x1f004>, <0 0x17300000 0 0x200>;
- reg-names = "cc", "qdsp6ss";
- #clock-cells = <1>;
- status = "disabled";
- };
-
- gladiator_noc: interconnect@17900000 {
- compatible = "qcom,sdm845-gladiator-noc";
- reg = <0 0x17900000 0 0xd080>;
- #interconnect-cells = <2>;
- qcom,bcm-voters = <&apps_bcm_voter>;
- };
-
- watchdog@17980000 {
- compatible = "qcom,apss-wdt-sdm845", "qcom,kpss-wdt";
- reg = <0 0x17980000 0 0x1000>;
- clocks = <&sleep_clk>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- apss_shared: mailbox@17990000 {
- compatible = "qcom,sdm845-apss-shared";
- reg = <0 0x17990000 0 0x1000>;
- #mbox-cells = <1>;
- };
-
- apps_rsc: rsc@179c0000 {
- label = "apps_rsc";
- compatible = "qcom,rpmh-rsc";
- reg = <0 0x179c0000 0 0x10000>,
- <0 0x179d0000 0 0x10000>,
- <0 0x179e0000 0 0x10000>;
- reg-names = "drv-0", "drv-1", "drv-2";
- interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
- qcom,tcs-offset = <0xd00>;
- qcom,drv-id = <2>;
- qcom,tcs-config = <ACTIVE_TCS 2>,
- <SLEEP_TCS 3>,
- <WAKE_TCS 3>,
- <CONTROL_TCS 1>;
-
- apps_bcm_voter: bcm-voter {
- compatible = "qcom,bcm-voter";
- };
-
- rpmhcc: clock-controller {
- compatible = "qcom,sdm845-rpmh-clk";
- #clock-cells = <1>;
- clock-names = "xo";
- clocks = <&xo_board>;
- };
-
- rpmhpd: power-controller {
- compatible = "qcom,sdm845-rpmhpd";
- #power-domain-cells = <1>;
- operating-points-v2 = <&rpmhpd_opp_table>;
-
- rpmhpd_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- rpmhpd_opp_ret: opp1 {
- opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
- };
-
- rpmhpd_opp_min_svs: opp2 {
- opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
- };
-
- rpmhpd_opp_low_svs: opp3 {
- opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
- };
-
- rpmhpd_opp_svs: opp4 {
- opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
- };
-
- rpmhpd_opp_svs_l1: opp5 {
- opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
- };
-
- rpmhpd_opp_nom: opp6 {
- opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
- };
-
- rpmhpd_opp_nom_l1: opp7 {
- opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
- };
-
- rpmhpd_opp_nom_l2: opp8 {
- opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
- };
-
- rpmhpd_opp_turbo: opp9 {
- opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
- };
-
- rpmhpd_opp_turbo_l1: opp10 {
- opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
- };
- };
- };
- };
-
- intc: interrupt-controller@17a00000 {
- compatible = "arm,gic-v3";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- #interrupt-cells = <3>;
- interrupt-controller;
- reg = <0 0x17a00000 0 0x10000>, /* GICD */
- <0 0x17a60000 0 0x100000>; /* GICR * 8 */
- interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
-
- msi-controller@17a40000 {
- compatible = "arm,gic-v3-its";
- msi-controller;
- #msi-cells = <1>;
- reg = <0 0x17a40000 0 0x20000>;
- status = "disabled";
- };
- };
-
- slimbam: dma-controller@17184000 {
- compatible = "qcom,bam-v1.7.0";
- qcom,controlled-remotely;
- reg = <0 0x17184000 0 0x2a000>;
- num-channels = <31>;
- interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
- #dma-cells = <1>;
- qcom,ee = <1>;
- qcom,num-ees = <2>;
- iommus = <&apps_smmu 0x1806 0x0>;
- };
-
- timer@17c90000 {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- compatible = "arm,armv7-timer-mem";
- reg = <0 0x17c90000 0 0x1000>;
-
- frame@17ca0000 {
- frame-number = <0>;
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17ca0000 0 0x1000>,
- <0 0x17cb0000 0 0x1000>;
- };
-
- frame@17cc0000 {
- frame-number = <1>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17cc0000 0 0x1000>;
- status = "disabled";
- };
-
- frame@17cd0000 {
- frame-number = <2>;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17cd0000 0 0x1000>;
- status = "disabled";
- };
-
- frame@17ce0000 {
- frame-number = <3>;
- interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17ce0000 0 0x1000>;
- status = "disabled";
- };
-
- frame@17cf0000 {
- frame-number = <4>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17cf0000 0 0x1000>;
- status = "disabled";
- };
-
- frame@17d00000 {
- frame-number = <5>;
- interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17d00000 0 0x1000>;
- status = "disabled";
- };
-
- frame@17d10000 {
- frame-number = <6>;
- interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0 0x17d10000 0 0x1000>;
- status = "disabled";
- };
- };
-
- osm_l3: interconnect@17d41000 {
- compatible = "qcom,sdm845-osm-l3";
- reg = <0 0x17d41000 0 0x1400>;
-
- clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
- clock-names = "xo", "alternate";
-
- #interconnect-cells = <1>;
- };
-
- cpufreq_hw: cpufreq@17d43000 {
- compatible = "qcom,cpufreq-hw";
- reg = <0 0x17d43000 0 0x1400>, <0 0x17d45800 0 0x1400>;
- reg-names = "freq-domain0", "freq-domain1";
-
- clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
- clock-names = "xo", "alternate";
-
- #freq-domain-cells = <1>;
- };
-
- wifi: wifi@18800000 {
- compatible = "qcom,wcn3990-wifi";
- status = "disabled";
- reg = <0 0x18800000 0 0x800000>;
- reg-names = "membase";
- memory-region = <&wlan_msa_mem>;
- clock-names = "cxo_ref_clk_pin";
- clocks = <&rpmhcc RPMH_RF_CLK2>;
- interrupts =
- <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
- iommus = <&apps_smmu 0x0040 0x1>;
- };
- };
-
- thermal-zones {
- cpu0-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 1>;
-
- trips {
- cpu0_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu0_alert1: trip-point1 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu0_crit: cpu_crit {
- temperature = <110000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&cpu0_alert0>;
- cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- map1 {
- trip = <&cpu0_alert1>;
- cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- cpu1-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 2>;
-
- trips {
- cpu1_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu1_alert1: trip-point1 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu1_crit: cpu_crit {
- temperature = <110000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&cpu1_alert0>;
- cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- map1 {
- trip = <&cpu1_alert1>;
- cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- cpu2-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 3>;
-
- trips {
- cpu2_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu2_alert1: trip-point1 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu2_crit: cpu_crit {
- temperature = <110000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&cpu2_alert0>;
- cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- map1 {
- trip = <&cpu2_alert1>;
- cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- cpu3-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 4>;
-
- trips {
- cpu3_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu3_alert1: trip-point1 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu3_crit: cpu_crit {
- temperature = <110000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&cpu3_alert0>;
- cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- map1 {
- trip = <&cpu3_alert1>;
- cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- cpu4-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 7>;
-
- trips {
- cpu4_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu4_alert1: trip-point1 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu4_crit: cpu_crit {
- temperature = <110000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&cpu4_alert0>;
- cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- map1 {
- trip = <&cpu4_alert1>;
- cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- cpu5-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 8>;
-
- trips {
- cpu5_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu5_alert1: trip-point1 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu5_crit: cpu_crit {
- temperature = <110000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&cpu5_alert0>;
- cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- map1 {
- trip = <&cpu5_alert1>;
- cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- cpu6-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 9>;
-
- trips {
- cpu6_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu6_alert1: trip-point1 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu6_crit: cpu_crit {
- temperature = <110000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&cpu6_alert0>;
- cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- map1 {
- trip = <&cpu6_alert1>;
- cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- cpu7-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 10>;
-
- trips {
- cpu7_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu7_alert1: trip-point1 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu7_crit: cpu_crit {
- temperature = <110000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&cpu7_alert0>;
- cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- map1 {
- trip = <&cpu7_alert1>;
- cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- aoss0-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 0>;
-
- trips {
- aoss0_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- cluster0-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 5>;
-
- trips {
- cluster0_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- cluster0_crit: cluster0_crit {
- temperature = <110000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- };
-
- cluster1-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 6>;
-
- trips {
- cluster1_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- cluster1_crit: cluster1_crit {
- temperature = <110000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- };
-
- gpu-thermal-top {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 11>;
-
- trips {
- gpu1_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- gpu-thermal-bottom {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 12>;
-
- trips {
- gpu2_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- aoss1-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 0>;
-
- trips {
- aoss1_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- q6-modem-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 1>;
-
- trips {
- q6_modem_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- mem-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 2>;
-
- trips {
- mem_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- wlan-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 3>;
-
- trips {
- wlan_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- q6-hvx-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 4>;
-
- trips {
- q6_hvx_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- camera-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 5>;
-
- trips {
- camera_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- video-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 6>;
-
- trips {
- video_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- modem-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 7>;
-
- trips {
- modem_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
- };
-};
é¡¹ç® / edk2-sdm845.git / commitdiff