--- /dev/null
+/*\r
+ * Intel ACPI Component Architecture\r
+ * AML/ASL+ Disassembler version 20180105 (64-bit version)\r
+ * Copyright (c) 2000 - 2018 Intel Corporation\r
+ * \r
+ * Disassembling to symbolic ASL+ operators\r
+ *\r
+ * Disassembly of dsdt_850.aml, Sat Mar 9 21:03:12 2019\r
+ *\r
+ * Original Table Header:\r
+ * Signature "DSDT"\r
+ * Length 0x000443A2 (279458)\r
+ * Revision 0x02\r
+ * Checksum 0x0D\r
+ * OEM ID "QCOMM "\r
+ * OEM Table ID "SDM850 "\r
+ * OEM Revision 0x00000003 (3)\r
+ * Compiler ID "MSFT"\r
+ * Compiler Version 0x05000000 (83886080)\r
+ */\r
+ \r
+DefinitionBlock ("", "DSDT", 2, "QCOMM ", "SDM850 ", 0x00000003)\r
+{\r
+ External (_SB_.TZ98, UnknownObj)\r
+ External (_SB_.TZ98._PSV, IntObj)\r
+ External (_SB_.TZ98._TC1, IntObj)\r
+ External (_SB_.TZ98._TC2, IntObj)\r
+ External (_SB_.TZ98._TSP, IntObj)\r
+ External (_SB_.TZ98.TPSV, UnknownObj)\r
+ External (_SB_.TZ98.TTC1, UnknownObj)\r
+ External (_SB_.TZ98.TTC2, UnknownObj)\r
+ External (_SB_.TZ98.TTSP, UnknownObj)\r
+ External (BFCC, IntObj)\r
+ External (BOCP, IntObj)\r
+ External (CUST, IntObj)\r
+ External (DCMA, IntObj)\r
+ External (EMPT, IntObj)\r
+ External (IFGD, IntObj)\r
+ External (PCT1, UnknownObj)\r
+ External (PCT2, UnknownObj)\r
+ External (RID2, IntObj)\r
+ External (RID3, IntObj)\r
+ External (TRUU, UnknownObj)\r
+ External (VFGD, IntObj)\r
+ External (VLOW, IntObj)\r
+ External (VNOM, IntObj)\r
+\r
+ Scope (\_SB)\r
+ {\r
+ Name (PSUB, "C153144D")\r
+ Name (SOID, 0xFFFFFFFF) // Holds the Chip Id\r
+ Name (SIDS, "899800000000000") // Holds the Chip ID translated to a string\r
+ Name (SIDV, 0xFFFFFFFF) // Holds the Chip Version as (major<<16)|(minor&0xffff)\r
+ Name (SVMJ, 0xFFFF) // Holds the major Chip Version\r
+ Name (SVMI, 0xFFFF) // Holds the minor Chip Version\r
+ Name (SDFE, 0xFFFF) // Holds the Chip Family enum\r
+ Name (SFES, "899800000000000") // Holds the Chip Family translated to a string\r
+ Name (SIDM, 0x0000000FFFFFFFFF) // Holds the Modem Support bit field\r
+ Name (SOSN, 0xAAAAAAAABBBBBBBB)\r
+ Name (RMTB, 0x99500000)\r
+ Name (RMTX, 0x00A00000)\r
+ Name (RFMB, 0x99F00000)\r
+ Name (RFMS, 0x00010000)\r
+ Name (RFAB, 0x99F10000)\r
+ Name (RFAS, 0x00010000)\r
+ Name (TCMA, 0x8B500000)\r
+ Name (TCML, 0x00A00000)\r
+ Name (SOSI, 0xDEADBEEFFFFFFFFF)\r
+ Name (MDID, 0xFFFFFFFF)\r
+ Device (UFS0)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ //Name (_HID, "NOPE1234") // _HID: Hardware ID\r
+ Name (_HID, "QCOM24A5") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_CID, "ACPIQCOM24A5") // _CID: Compatible ID\r
+ //Name (_CID, "ACPINOPE1234") // _CID: Compatible ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x01D84000, // Address Base\r
+ 0x00014000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000129,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.UFS0._CRS.RBUF */\r
+ }\r
+\r
+ Device (DEV0)\r
+ {\r
+ Method (_ADR, 0, NotSerialized) // _ADR: Address\r
+ {\r
+ Return (0x08)\r
+ }\r
+\r
+ Method (_RMV, 0, NotSerialized) // _RMV: Removal Status\r
+ {\r
+ Return (Zero)\r
+ }\r
+ }\r
+ }\r
+\r
+#if 0\r
+ Device (SDC2)\r
+ {\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.GIO0\r
+ })\r
+ Name (_HID, "QCOM2466") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_CID, "ACPIQCOM2466") // _CID: Compatible ID\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x08804000, // Address Base\r
+ 0x00001000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000EC,\r
+ }\r
+ GpioInt (Edge, ActiveBoth, SharedAndWake, PullUp, 0x7530,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x00C0\r
+ }\r
+ GpioIo (Shared, PullUp, 0x0000, 0x0000, IoRestrictionNone,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x007E\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.SDC2._CRS.RBUF */\r
+ }\r
+\r
+ Method (_DIS, 0, NotSerialized) // _DIS: Disable Device\r
+ {\r
+ }\r
+\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+ }\r
+#endif\r
+\r
+ Device (ABD)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ Name (_HID, "QCOM0242") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0B)\r
+ }\r
+\r
+ OperationRegion (ROP1, GenericSerialBus, Zero, 0x0100)\r
+ Name (AVBL, Zero)\r
+ Method (_REG, 2, NotSerialized) // _REG: Region Availability\r
+ {\r
+ If ((Arg0 == 0x09))\r
+ {\r
+ AVBL = Arg1\r
+ }\r
+ }\r
+ }\r
+\r
+ Name (ESNL, 0x14) // Exsoc name limit 20 characters\r
+ Name (DBFL, 0x17) // buffer Length, should be ESNL+3\r
+ Device (PMIC)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.SPMI\r
+ })\r
+ Name (_HID, "QCOM0266") // _HID: Hardware ID\r
+ Name (_CID, "PNP0CA3") // _CID: Compatible ID\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0B)\r
+ }\r
+\r
+ Method (PMCF, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x04)\r
+ {\r
+ // PMIC Info\r
+ 0x03, // Number of PMICs, must match the number of info packages\r
+ Package (0x02)\r
+ {\r
+ Zero, \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x02, \r
+ 0x03\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x04, \r
+ 0x05\r
+ }\r
+ })\r
+ Return (CFG0) /* \_SB_.PMIC.PMCF.CFG0 */\r
+ }\r
+ }\r
+\r
+ Device (PM01)\r
+ {\r
+ Name (_HID, "QCOM0269") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.PMIC\r
+ })\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0B)\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ //\r
+ // QGIC Interrupt Resource\r
+ //\r
+ // Register for SPMI interrupt 513\r
+ //\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )\r
+ {\r
+ 0x00000201,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.PM01._CRS.RBUF */\r
+ }\r
+\r
+ // _DSM method to mark PM01's ActiveBoth interrupts\r
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_0, Buffer (0x01) // _T_x: Emitted by ASL Compiler\r
+ {\r
+ 0x00 // .\r
+ })\r
+ CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.PM01._DSM._T_0 */\r
+ If ((_T_0 == ToUUID ("4f248f40-d5e2-499f-834c-27758ea1cd3f") /* GPIO Controller */))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_1 = ToInteger (Arg2)\r
+ If ((_T_1 == Zero))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x03 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == One))\r
+ {\r
+ Return (Package (0x02)\r
+ {\r
+ Zero, \r
+ One\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ Else\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ }\r
+\r
+ //\r
+ // PMIC Apps Driver\r
+ // \r
+ Device (PMAP)\r
+ {\r
+ Name (_HID, "QCOM0268") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_DEP, Package (0x03) // _DEP: Dependencies\r
+ {\r
+ \_SB.PMIC, \r
+ \_SB.ABD, \r
+ \_SB.SCM0\r
+ })\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0B)\r
+ }\r
+\r
+ //PMAP is dependent on ABD for operation region access\r
+ \r
+ // Get pseudo SPB controller port which is used to handle the ACPI operation region access\r
+ Method (GEPT, 0, NotSerialized)\r
+ {\r
+ Name (BUFF, Buffer (0x04){})\r
+ CreateByteField (BUFF, Zero, STAT)\r
+ CreateWordField (BUFF, 0x02, DATA)\r
+ DATA = 0x02\r
+ Return (DATA) /* \_SB_.PMAP.GEPT.DATA */\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, Buffer (0x02)\r
+ {\r
+ 0x79, 0x00 // y.\r
+ })\r
+ Return (RBUF) /* \_SB_.PMAP._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (PRTC)\r
+ {\r
+ Name (_HID, "ACPI000E" /* Time and Alarm Device */) // _HID: Hardware ID\r
+ /*Name (_DEP, Package (0x01) // _DEP: Dependencies\r
+ {\r
+ \_SB.PMAP // PRTC is dependent on PMAP which implements the RTC Functions\r
+ })*/\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0B)\r
+ }\r
+\r
+ //Get the capabilities of the time and alarm device\r
+ Method (_GCP, 0, NotSerialized) // _GCP: Get Capabilities\r
+ {\r
+ Return (0x04)\r
+ }\r
+\r
+ /*Field (\_SB.ABD.ROP1, BufferAcc, NoLock, Preserve)\r
+ {\r
+ Connection (\r
+ I2cSerialBusV2 (0x0002, ControllerInitiated, 0x00000000,\r
+ AddressingMode7Bit, "\\_SB.ABD",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ ), \r
+ AccessAs (BufferAcc, AttribRawBytes (0x18)), \r
+ FLD0, 192\r
+ }*/\r
+\r
+ Method (_GRT, 0, Serialized) // _GRT: Get Real Time\r
+ {\r
+ /*Name (BUFF, Buffer (0x1A){})\r
+ CreateField (BUFF, 0x10, 0x80, TME1)\r
+ CreateField (BUFF, 0x90, 0x20, ACT1)\r
+ CreateField (BUFF, 0xB0, 0x20, ACW1)\r
+ BUFF = FLD0 /* \_SB_.PRTC.FLD0 * /\r
+ Return (TME1) /* \_SB_.PRTC._GRT.TME1 */\r
+\r
+ Local1 = Buffer(16){}\r
+ CreateWordField (Local1, Zero, TYEA)\r
+ CreateByteField (Local1, 0x02, TMNT)\r
+ CreateByteField (Local1, 0x03, TDAY)\r
+ CreateByteField (Local1, 0x04, THOU)\r
+ CreateByteField (Local1, 0x05, TMIN)\r
+ CreateByteField (Local1, 0x06, TSEC)\r
+ CreateByteField (Local1, 0x07, TISO)\r
+ CreateWordField (Local1, 0x08, TMIL)\r
+ CreateWordField (Local1, 0x0A, TTMZ) \r
+ CreateByteField (Local1, 0x0C, TDAS)\r
+\r
+ TYEA = 2020\r
+ TMNT = 9\r
+ TDAY = 28\r
+ THOU = 0\r
+ TMIN = 0\r
+ TSEC = 0\r
+ TISO = 1\r
+ TMIL = 0\r
+ TTMZ = 2047\r
+ TDAS = 0\r
+\r
+ return (Local1)\r
+ }\r
+\r
+ Method (_SRT, 1, NotSerialized) // _SRT: Set Real Time\r
+ {\r
+ /*Name (BUFF, Buffer (0x32){})\r
+ CreateByteField (BUFF, Zero, STAT)\r
+ CreateField (BUFF, 0x10, 0x80, TME1)\r
+ CreateField (BUFF, 0x90, 0x20, ACT1)\r
+ CreateField (BUFF, 0xB0, 0x20, ACW1)\r
+ ACT1 = Zero\r
+ TME1 = Arg0\r
+ ACW1 = Zero\r
+ BUFF = FLD0 = BUFF /* \_SB_.PRTC._SRT.BUFF * /\r
+ If ((STAT != Zero))\r
+ {\r
+ Return (One)\r
+ }*/\r
+\r
+ Return (Zero)\r
+ }\r
+ }\r
+\r
+#if 0\r
+ Device (PM3P)\r
+ {\r
+ Name (_HID, "SAM0606") // _HID: Hardware ID\r
+ Name (_SUB, "C153144D") // _SUB: Subsystem ID\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, Buffer (0x02)\r
+ {\r
+ 0x79, 0x00 // y.\r
+ })\r
+ Return (RBUF) /* \_SB_.PM3P._CRS.RBUF */\r
+ }\r
+\r
+ Method (PMCF, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x04)\r
+ {\r
+ Zero, \r
+ 0x02, \r
+ One, \r
+ 0x02\r
+ })\r
+ Return (CFG0) /* \_SB_.PM3P.PMCF.CFG0 */\r
+ }\r
+\r
+ Name (BSTP, Package (0x08)\r
+ {\r
+ Zero, \r
+ 0xFFFFFFFF, \r
+ 0xFFFFFFFF, \r
+ 0xFFFFFFFF, \r
+ Zero, \r
+ Zero, \r
+ 0xFFFFFFFF, \r
+ 0xFFFFFFFF\r
+ })\r
+ Method (GBST, 0, NotSerialized)\r
+ {\r
+ If ((\_SB.EMEC.AVBL == One))\r
+ {\r
+ BSTP [Zero] = \_SB.EMEC.CHST\r
+ BSTP [One] = \_SB.EMEC.CHGC\r
+ BSTP [0x02] = \_SB.EMEC.SOC\r
+ BSTP [0x03] = \_SB.EMEC.VOLT\r
+ BSTP [0x04] = \_SB.EMEC.CHTY\r
+ }\r
+ Else\r
+ {\r
+ ADBG ("EMECNotReady")\r
+ }\r
+\r
+ Return (BSTP) /* \_SB_.PM3P.BSTP */\r
+ }\r
+ }\r
+#endif\r
+\r
+ //******************************************\r
+ //Configs for Battery Manager Device: PMBT\r
+ //******************************************\r
+ //--------------------\r
+ //PMBT: Method(BBAT)\r
+ //--------------------\r
+ Name (BFCC, 0x4150) //* (mWh), Full Charge Capacity \r
+ Name (PCT1, 0x05) //* (% of FCC), Default Alert 1 \r
+ Name (PCT2, 0x09) //* (% of FCC), Default Alert 2 \r
+ //--------------------\r
+ //PMBT: Method(BMNR)\r
+ //--------------------\r
+ Name (CUST, "850_HAN") //* cust file identifier\r
+ //--------------------\r
+ //PMBT: Method(BPLT)\r
+ //--------------------\r
+ Name (VNOM, 0x0ED8) //* (mV), Nominal Battery Voltage \r
+ Name (VLOW, 0x0CE4) //* (mV), Low Battery Voltage \r
+ Name (EMPT, 0x0C80) //* (mV), VCutOff \r
+ Name (DCMA, 0x0384) //* (mA), DC Current \r
+ Name (BOCP, 0x1194) //* (mA), OCP current used in BCL \r
+ Name (BVLO, 0x0BB8) //* (mV), BCL low Vbatt \r
+ Name (BLOP, 0x14) //* (%), BCL Low batt percent notification \r
+ Name (BNOP, 0x16) //* (%), BCL normal batt percent notification\r
+ Name (IFGD, Zero)\r
+ Name (VFGD, Zero)\r
+ Name (VDD1, 0x10FE)\r
+ Name (FCC1, 0x0BEA)\r
+ Name (HCLI, 0x0A)\r
+ Name (SCLI, 0x14)\r
+ Name (SHLI, 0x2D)\r
+ Name (HHLI, 0x3A)\r
+ Name (FVC1, Zero)\r
+ Name (FVH1, 0xC8)\r
+ Name (CCC1, 0x0352)\r
+ //--------------------\r
+ //PMBT: Method(CTMC)\r
+ //--------------------\r
+ Name (RID2, 0x3A98) //* (Ohm), min RID for NORMAL category: 15K\r
+ Name (RID3, 0x000222E0) //* (Ohm), max RID for NORMAL category: 140K\r
+\r
+#if 0\r
+ //PMIC EIC\r
+ //\r
+ Device (PEIC)\r
+ {\r
+ Name (_HID, "QCOM02D3") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ I2cSerialBusV2 (0x0055, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.I2C4",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ })\r
+ Return (RBUF) /* \_SB_.PEIC._CRS.RBUF */\r
+ }\r
+\r
+ Method (PMCF, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x04)\r
+ {\r
+ // Charger Info\r
+ 0xFF, \r
+ Zero, \r
+ Zero, \r
+ 0x02\r
+ })\r
+ Return (CFG0) /* \_SB_.PEIC.PMCF.CFG0 */\r
+ }\r
+ }\r
+#endif\r
+\r
+ Device (BCL1)\r
+ {\r
+ Name (_HID, "QCOM02D6") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.PMIC\r
+ })\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0040\r
+ }\r
+ GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0041\r
+ }\r
+ GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0042\r
+ }\r
+ GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0043\r
+ }\r
+ GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0044\r
+ }\r
+ GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x004B\r
+ }\r
+ GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0150\r
+ }\r
+ GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0151\r
+ }\r
+ GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0153\r
+ }\r
+ GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0154\r
+ }\r
+ GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0144\r
+ }\r
+ GpioInt (Edge, ActiveHigh, Shared, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0146\r
+ }\r
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ RawDataBuffer (0x01) // Vendor Data\r
+ {\r
+ 0x08\r
+ })\r
+ { // Pin list\r
+ 0x0158\r
+ }\r
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ RawDataBuffer (0x01) // Vendor Data\r
+ {\r
+ 0x08\r
+ })\r
+ { // Pin list\r
+ 0x0159\r
+ }\r
+ GpioInt (Edge, ActiveBoth, Shared, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ RawDataBuffer (0x01) // Vendor Data\r
+ {\r
+ 0x08\r
+ })\r
+ { // Pin list\r
+ 0x015A\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.BCL1._CRS.RBUF */\r
+ }\r
+\r
+ Method (BCLS, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x0B)\r
+ {\r
+ 0x02, \r
+ One, \r
+ 0x1388, \r
+ 0x50, \r
+ 0x5A, \r
+ 0x0CE4, \r
+ 0x0A28, \r
+ 0x0C80, \r
+ 0x0ABE, \r
+ 0x09C4, \r
+ 0x0A\r
+ })\r
+ Return (CFG0) /* \_SB_.BCL1.BCLS.CFG0 */\r
+ }\r
+\r
+ Method (BCLQ, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x06)\r
+ {\r
+ "VCOMP_LOW0", \r
+ "VCOMP_LOW1", \r
+ "VCOMP_LOW2", \r
+ "VCOMP_HI", \r
+ "SYS_OK", \r
+ "BAN_ALARM"\r
+ })\r
+ Return (CFG0) /* \_SB_.BCL1.BCLQ.CFG0 */\r
+ }\r
+ }\r
+\r
+ Device (PTCC)\r
+ {\r
+ Name (_HID, "QCOM02E6") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.PMIC//,\r
+ //\_SB.PMBT\r
+ })\r
+ /*Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (Zero)\r
+ }*/\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x00EF\r
+ }\r
+ GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x010E\r
+ }\r
+ GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x010D\r
+ }\r
+ GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x010C\r
+ }\r
+ GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x010B\r
+ }\r
+ GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x010A\r
+ }\r
+ GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0109\r
+ }\r
+ GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0108\r
+ }\r
+ GpioInt (Edge, ActiveHigh, Exclusive, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x00D9\r
+ }\r
+ GpioInt (Edge, ActiveBoth, Exclusive, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0107\r
+ }\r
+ GpioInt (Edge, ActiveHigh, Exclusive, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x00EB\r
+ }\r
+ GpioIo (Exclusive, PullUp, 0x0000, 0x0000, IoRestrictionNone,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x01ED\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.PTCC._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+#if 0\r
+ //\r
+ //PMIC Battery Manger Driver\r
+ //\r
+ Device (PMBT)\r
+ {\r
+ Name (_HID, "QCOM0264") // _HID: Hardware ID\r
+ Name (_DEP, Package (2) // _DEP: Dependencies\r
+ {\r
+ \_SB.PMIC,\r
+ \_SB.OP3P\r
+ })\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ GpioInt (Edge, ActiveHigh, Exclusive, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x00EB\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.PMBT._CRS.RBUF */\r
+ }\r
+\r
+ //ACPI methods for Battery Manager Device\r
+ Method (BMNR, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x04)\r
+ {\r
+ 2, //* 0: Select Platform: 0- No HW, 1- SMChg+FGGge, 2- SMB3pChg+SMB3pGge, 3- LBChg+VMBMS\r
+ Zero, //* 1: Error State Handling: 0- Don’t Shutdown, 1- Shutdown\r
+ One, //* 2: Listen to BatteryClass: 0- No 1- Yes\r
+ Zero //* 3: Test Mode Charger Current: 0- No current drawn, 1- Current drawn\r
+ })\r
+ Return (CFG0) /* \_SB_.PMBT.BMNR.CFG0 */\r
+ }\r
+\r
+ //ACPI methods for Timer\r
+ Method (BTIM, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x08)\r
+ {\r
+ 0x2710, // Charging Heartbeat Timer\r
+ 0x2710, // Charging Tolerable Delay\r
+ 0x000493E0, // Discharging Heartbeat Timer\r
+ 0x0001D4C0, // Discharging Tolerable Delay\r
+ Zero, // Poll Timer , 0=Timer not used.\r
+ Zero, // Poll Tolerable Delay\r
+ 0x01AC7780, //Charging Timeout (TDone) Timer\r
+ Zero //Charging Timeout(TDone) Tolerable Delay\r
+ })\r
+ Name (CFG1, Package (0x08)\r
+ {\r
+ 0x7530, \r
+ 0x2710, \r
+ 0x000493E0, \r
+ 0x0001D4C0, \r
+ Zero, \r
+ Zero, \r
+ 0x01AC7780, \r
+ Zero\r
+ })\r
+ Name (HWID, Zero)\r
+ Return (CFG0) /* \_SB_.PMBT.BTIM.CFG0 */\r
+ }\r
+\r
+ //ACPI methods for Battery Info\r
+ Method (BBAT, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x0D)\r
+ {\r
+ One, //* 0: Battery Technology \r
+ 0x4C494F4E, //* 1: Battery Chemistry: hex(LION) \r
+ 0x2CEC, //* 2: BFCC: (mWh), Design Capacity \r
+ 0x2CEC, //* 3: BFCC: (mWh), Full Charge Capacity \r
+ 0x023F, //* 4: PCT1: (% of FCC), Default Alert 1 \r
+ 0x040B, //* 5: PCT2: (% of FCC), Default Alert 2 \r
+ "QCOMBATT01", //* 6: Device Name \r
+ "Qualcomm", //* 7: Manufacture Name \r
+ "QCOMBAT01_07012011", //* 8: Battery Unique ID \r
+ "07012011", //* 9: Battery Serial Number \r
+ 0x13, //* 10: Battery Manufacture Date \r
+ 0x04, //* 11: Battery Manufacture Month \r
+ 0x07DE //* 12: Battery Manufacture Year \r
+ })\r
+ Return (CFG0) /* \_SB_.PMBT.BBAT.CFG0 */\r
+ }\r
+\r
+ //ACPI methods for Proprietary chargers\r
+ Method (BPCH, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x02)\r
+ {\r
+ 0x05DC, // charger current = 1500mA\r
+ 0x05DC\r
+ })\r
+ Return (CFG0) /* \_SB_.PMBT.BPCH.CFG0 */\r
+ }\r
+\r
+ //ACPI methods for coin cell charger\r
+ Method (BCCC, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x03)\r
+ {\r
+ One, //Enable coin cell charger; 1 = enable, 0 = disable\r
+ Zero, // RSET, 0=2K1, 1=1K7, 2=1K2, 3 = 0K8\r
+ Zero // VSET, 0=2V5, 1=3V2, 2=3V1, 3=3V0\r
+ })\r
+ Return (CFG0) /* \_SB_.PMBT.BCCC.CFG0 */\r
+ }\r
+\r
+ //ACPI methods for Recharge/Maintenance Mode\r
+ Method (BRCH, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x02)\r
+ {\r
+ 0x64, // Delta V Recharge threshold = 100mV\r
+ Zero // Delta V Recharge Reduction below Normal= 0mV\r
+ })\r
+ Return (CFG0) /* \_SB_.PMBT.BRCH.CFG0 */\r
+ }\r
+\r
+ Method (_BQI, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x01)\r
+ {\r
+ Zero\r
+ })\r
+ Return (CFG0) /* \_SB_.PMBT._BQI.CFG0 */\r
+ }\r
+\r
+ //ACPI methods for Interrupt Name\r
+ Method (BIRQ, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package ()\r
+ {\r
+ "SmbStatIrq"\r
+ })\r
+ Return (CFG0) /* \_SB_.PMBT.BIRQ.CFG0 */\r
+ }\r
+\r
+ //ACPI methods for Platform File\r
+ Method (BPLT, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x25)\r
+ {\r
+ 0x03FC, //* 0: ACPI Version \r
+ 0x0ED8, //* 1: VNOM: (mV), Nominal Battery Voltage \r
+ 0x0DAC, //* 2: VLOW: (mV), Low Battery Voltage \r
+ 0x0D48, //* 3: EMPT: (mV), VcutOff \r
+ 0x0384, //* 4: DCMA: (mA), DC Current \r
+ One, //* 5: ChargePath Priority: Select 0 for DC, 1 for USB \r
+ 0x32, //* 6: RSLOW for maxFlashCurrentPrediction \r
+ 0x32, //* 7: RPARA for maxFlashCurrentPrediction \r
+ 0x1388, //* 8: VINFLASH for maxFlashCurrentPrediction \r
+ 0x08, //* 9: FlashParam for maxFlashCurrentPrediction \r
+ One, //* 10: AFP Mode Supported \r
+ 0x50, //* 11: AFP Trigger Max Battery Temp (+80 deg C) \r
+ 0xFFFFFFEC, //* 12: AFP Trigger Min Battery Temp (-20 deg C) \r
+ 0x48, //* 13: Watchdog timer in secs \r
+ 0x64, //* 14: Charger iterm 100 mA for now \r
+ 0x1E, //* 15: SRAM logging timer \r
+ 0x05, //* 16: VBATT average Window Size \r
+ 0x06, //* 17: Emergency Shutdown Initial SOC \r
+ 0x01F4, //* 18: SoC convergent point \r
+ 0x7E, //* 19: LM_Threshold \r
+ 0x0190, //* 20: MH_Threshold \r
+ 0x1194, \r
+ 0x0BB8, \r
+ 0x012C, \r
+ 0x01F4, \r
+ 0x05DC, \r
+ 0x0F, \r
+ 0x11, \r
+ 0x02EE, \r
+ 0x08, \r
+ One, \r
+ 0x1004, \r
+ 0x32, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ One\r
+ })\r
+ Name (CFG1, Package (0x25)\r
+ {\r
+ 0x03FC, \r
+ 0x0ED8, \r
+ 0x0DAC, \r
+ 0x0D48, \r
+ 0x0384, \r
+ One, \r
+ 0x32, \r
+ 0x32, \r
+ 0x1388, \r
+ 0x08, \r
+ One, \r
+ 0x50, \r
+ 0xFFFFFFEC, \r
+ 0x48, \r
+ 0x64, \r
+ 0x1E, \r
+ 0x05, \r
+ 0x06, \r
+ 0x01F4, \r
+ 0x7E, \r
+ 0x0190, \r
+ 0x1194, \r
+ 0x0BB8, \r
+ 0x012C, \r
+ 0x01F4, \r
+ 0x05DC, \r
+ 0x0F, \r
+ 0x11, \r
+ 0x02EE, \r
+ One, \r
+ One, \r
+ 0x1004, \r
+ 0x32, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ One\r
+ })\r
+ Return (CFG0) /* \_SB_.PMBT.BPLT.CFG0 */\r
+ }\r
+\r
+ //ACPI methods for Platform File\r
+ Method (BPTM, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x02)\r
+ {\r
+ 0x3A98, \r
+ Zero\r
+ })\r
+ Return (CFG0) /* \_SB_.PMBT.BPTM.CFG0 */\r
+ }\r
+\r
+ //ACPI methods for JEITA\r
+ Method (BJTA, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x11)\r
+ {\r
+ One, \r
+ 0x10FE, \r
+ 0x0834, \r
+ Zero, \r
+ 0x3C, \r
+ 0x02, \r
+ 0x04, \r
+ 0x02, \r
+ 0x10FE, \r
+ 0x041A, \r
+ 0x0A, \r
+ 0x1097, \r
+ 0x0834, \r
+ 0x2D, \r
+ 0x1064, \r
+ 0x0834, \r
+ 0x32\r
+ })\r
+ Return (CFG0) /* \_SB_.PMBT.BJTA.CFG0 */\r
+ }\r
+\r
+ //ACPI methods for Thermal\r
+ Method (BTHM, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x07)\r
+ {\r
+ 0x0BB8, // IUSBMax (mA),maximum USB input current for the HW platform\r
+ 0x03E8, // IWLCMax (mA), maximum DC input current for the HW platform\r
+ 0x46, // %,Thermal mitigation perc at which HVDCP voltage reduces from 9V to 5V\r
+ 0x50, // %,Thermal mitigation perc at which HVDCP voltage increases from 5V to 9V\r
+ 0x01F4, // Ibat_therm (mA), IBAt_THERM value to which it drops during thermal mitigation.\r
+ 0x31, // %, Thermal mitigation perc at which Ibat reduces from Ibat_Max to Ibat_therm\r
+ 0x36 // %, Thermal mitigation perc at which Ibat increases from Ibat_therm to Ibat_Max\r
+ })\r
+ Return (CFG0) /* \_SB_.PMBT.BTHM.CFG0 */\r
+ }\r
+\r
+ //ACPI methods for Battery Error Handling\r
+ Method (BEHC, 0, NotSerialized)\r
+ {\r
+ //Actions for Battery Error Handling\r
+ // 0x0 - Do Nothing\r
+ // 0x1 - Reload Charge Table\r
+ // 0x2 - Error Shutdown\r
+ // 0x4 - Emergency Shutdown\r
+ // 0x8 - Enter Test Mode\r
+ Name (CFG0, Package (0x08)\r
+ {\r
+ One, \r
+ 0x08, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x04, \r
+ 0x02, \r
+ 0x04\r
+ })\r
+ Name (CFG1, Package (0x08)\r
+ {\r
+ One, \r
+ 0x08, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x04, \r
+ 0x02, \r
+ 0x04\r
+ })\r
+ Name (HWID, Zero)\r
+ Return (CFG0) /* \_SB_.PMBT.BEHC.CFG0 */\r
+ }\r
+\r
+ //ACPI methods for Charge Table Management Configuration\r
+ Method (CTMC, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x07)\r
+ {\r
+ Zero, //* 0: min RID for DEBUG category: 0K \r
+ 0x36B0, //* 1: max RID for DEBUG category: \r
+ 0x4A38, //* 2: RID2: min RID for NORMAL category: \r
+ 0x000222E0, //* 3: RID3: max RID for NORMAL category: \r
+ 0x0003A980, //* 4: min RID for SMART category: \r
+ 0x0006DDD0, //* 5: max RID for SMART category: \r
+ One //* 6: Number of charging table \r
+ })\r
+ Return (CFG0) /* \_SB_.PMBT.CTMC.CFG0 */\r
+ }\r
+\r
+ //ACPI methods for Battery Charge Tables #1\r
+ Method (BCT1, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x15)\r
+ {\r
+ Zero, //* 0: Battery Category: 0-NORMAL, 1-SMART\r
+ 0xFFFFFFEC, //* 1: min operating battery temp (-20 deg C) \r
+ 0x50, //* 2: max operating battery temp (+80 deg C)\r
+ Package (0x04)\r
+ {\r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }, //* 3: 128-bit battery info for future expansion\r
+\r
+ One, \r
+ 0x10FE, \r
+ 0x0834, \r
+ Zero, \r
+ 0x3C, \r
+ 0x02, \r
+ 0x04, \r
+ 0x02, \r
+ 0x10FE, \r
+ 0x03E8, \r
+ 0x0A, \r
+ 0x1090, \r
+ 0x0834, \r
+ 0x2D, \r
+ 0x1054, \r
+ 0x0834, \r
+ 0x32 \r
+ })\r
+ Return (CFG0) /* \_SB_.PMBT.BCT1.CFG0 */\r
+ }\r
+ }\r
+#endif\r
+\r
+ Device (PMBT) {\r
+ Name (_HID, "QCOM0264")\r
+ Name (_DEP, Package(0x2) {\r
+ \_SB_.PMIC,\r
+ \_SB_.OP3P\r
+ }) \r
+ \r
+ Alias (\_SB.PSUB, _SUB)\r
+ \r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0B)\r
+ }\r
+ \r
+ Method (_CRS, 0x0, NotSerialized) {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ //GpioInt(Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.PM01",,,,) {58} // STAT Interrupt \r
+ })\r
+ Return (RBUF)\r
+ }\r
+\r
+ //ACPI methods for Battery Manager Device\r
+ Method (BMNR) {\r
+ Name (CFG0, \r
+ Package(){\r
+ 2, // Select Platform: 0- No HW, 1- SMChg+FGGge, 2- SMB3pChg+SMB3pGge, 3- LBChg+VMBMS\r
+ 0, // Error State Handling: 0- Don't Shutdown, 1- Shutdown\r
+ 1, // Listen to BatteryClass: 0- No 1- Yes\r
+ 0 // Test Mode Charger Current: 0- No current drawn, 1- Current drawn\r
+ })\r
+ Return (CFG0)\r
+ }\r
+ \r
+ //ACPI methods for Timer\r
+ Method (BTIM) {\r
+ Name (CFG0, \r
+ Package(){\r
+ 20000, // Charging Heartbeat Timer\r
+ 10000, // Charging Tolerable Delay\r
+ 300000, // Discharging Heartbeat Timer\r
+ 120000, // Discharging Tolerable Delay\r
+ 0, // Poll Timer , 0=Timer not used.\r
+ 0, // Poll Tolerable Delay\r
+ 28080000, //Charging Timeout (TDone) Timer\r
+ 0, //Charging Timeout(TDone) Tolerable Delay\r
+ })\r
+ Return (CFG0)\r
+ }\r
+\r
+ \r
+ //ACPI methods for Battery Info\r
+ Method (BBAT) {\r
+ Name (CFG0, \r
+ Package(){\r
+ 1, // Battery Technology\r
+ 0x4C494F4E, // Battery Chemistry: hex(LION)\r
+ 9500, //8360, // (mWh), Design Capacity\r
+ 9500, //8360, // (mWh), Full Charge Capacity\r
+ 475, // Default Alert 1 (5% of full capacity)\r
+ 855, //Default Alert 2 (9% of full capacity)\r
+ "QCOMBATT01", //Device Name\r
+ "Qualcomm", // Manufacture Name\r
+ "QCOMBAT01_07012011", // Battery Unique ID\r
+ "07012011", // Battery Serial Number\r
+ 02, // Battery Manufacture Date\r
+ 07, // Battery Manufacture Month\r
+ 2015 // Battery Manufacture Year\r
+ })\r
+ Return (CFG0)\r
+ }\r
+ \r
+ //ACPI methods for Proprietary chargers\r
+ Method (BPCH) {\r
+ Name (CFG0, \r
+ Package(){\r
+ 0, // HVDCP charger not supported\r
+ 500 // Invalid Wall charger current = 500mA\r
+ })\r
+ Return (CFG0)\r
+ }\r
+ \r
+ //ACPI methods for coin cell charger\r
+ Method (BCCC) {\r
+ Name (CFG0, \r
+ Package(){\r
+ 1, //Enable coin cell charger; 1 = enable, 0 = disable\r
+ 0, // RSET, 0=2K1, 1=1K7, 2=1K2, 3 = 0K8\r
+ 0 // VSET, 0=2V5, 1=3V2, 2=3V1, 3=3V0\r
+ })\r
+ Return (CFG0)\r
+ }\r
+ \r
+ //ACPI methods for Interrupt Name\r
+ Method (BIRQ) {\r
+ Name (CFG0, \r
+ Package(){\r
+ //"SmbStatIrq" //SMB interrupt\r
+ })\r
+ Return (CFG0)\r
+ }\r
+ \r
+ //ACPI methods for Platform File\r
+ Method (BPLT) {\r
+ Name (CFG0, \r
+ Package(){\r
+ 1005, // ACPI Version\r
+ 3800, // (mV), Nominal Battery Voltage\r
+ 3500, // (mV), Low Battery Voltage\r
+ 3400, // (mV), Empty Battery Voltage\r
+ 100, // (mA), Termination Current\r
+ 500, // (per mil), Convergent SOC\r
+ 0, // Min Battery ID\r
+ 1800, // Max Battery ID\r
+ 34522, // Thermistor c1 coefficient (=0x86DB default)\r
+ 33422, // cc to soc coefficient (=0x8372: for 2200mAh)\r
+ 750 //soc (75%) below which no soc linearization even in CV charging\r
+ })\r
+ Return (CFG0)\r
+ }\r
+ \r
+ //ACPI methods for Platform File\r
+ Method (BPTM) {\r
+ Name (CFG0, \r
+ Package(){\r
+ 50000, // Emergency Timer\r
+ 10000, // Emergency Tolerable Delay\r
+ })\r
+ Return (CFG0)\r
+ }\r
+ \r
+ //ACPI methods for JEITA\r
+ //No JEITA\r
+ Method (BJTA) {\r
+ Name (CFG0, \r
+ Package(){\r
+ 1, // Select JEITA Configuration: 0- No JEITA, 1- SW JEITA, 2- HW JEITA\r
+ 4350, // Max Battery Voltage (mV) for Standard Zone\r
+ 1500, // Max Battery Current (mA) for Standard Zone\r
+ 0, // Safe Min Temperature(in deg C) eg. -2 for 0xFFFFFFFE (2's complement in case of -ve number)\r
+ 60, // Safe Max Temperature(in deg C)\r
+ 1, // Temperature Hysteresis (in deg C)\r
+ // SW Jeita Entries\r
+ 4, // Total Zones (Standard Zone + 3 Jeita Zone)\r
+ 2, // Standard Zone #\r
+ 4350, // Voltage Zone 1, 4200 mV\r
+ 750, // Current Zone 1, 750 mA\r
+ 10, // Temperature Zone 1, 10 deg C\r
+ 4350, // Voltage Zone 3, 4150 mV\r
+ 1500, // Current Zone 3, 1500 mA\r
+ 45, // Temperature Zone 3, 45 deg C\r
+ 4100, // Voltage Zone 4, 4100 mV\r
+ 750, // Current Zone 4, 1500 mA\r
+ 50 // Temperature Zone 4, 50 deg C\r
+ })\r
+ Return (CFG0)\r
+ }\r
+\r
+ //ACPI methods for Recharge/Maintenance Mode\r
+ Method (BRCH) {\r
+ Name (CFG0, \r
+ Package(){\r
+ 100, // Delta V Recharge threshold = 100mV\r
+ 0 // Delta V Recharge Reduction below Normal= 0mV\r
+ })\r
+ Return (CFG0)\r
+ }\r
+ Method (BEHC)\r
+ {\r
+ //Actions for Battery Error Handling\r
+ // 0x0 - Do Nothing\r
+ // 0x1 - Reload Charge Table\r
+ // 0x2 - Error Shutdown\r
+ // 0x4 - Emergency Shutdown\r
+ // 0x8 - Enter Test Mode\r
+ Name (CFG0,\r
+ Package(){\r
+ 1, //1-Feature Enable, 0-Feature Disable\r
+ 0x8, //Action(s) for DEBUG state -> Enter Test Mode\r
+ 0x1, //Action(s) for NORMAL state -> Reload Charge Table\r
+ 0x1, //Action(s) for SMART_AUTHENTICATED state -> Reload Charge Table\r
+ 0x2, //Action(s) for UNKNOWN state -> Error Shutdown\r
+ 0x2, //Action(s) for NOT_PRESENT state -> Error Shutdown\r
+ 0x2, //Action(s) for INVALID state -> Error Shutdown\r
+ 0x2 //Action(s) for OUT_OP_RANGE state -> Error Shutdown\r
+ })\r
+ Return (CFG0)\r
+ }\r
+ //ACPI methods for Charge Table Management Configuration\r
+ Method (CTMC)\r
+ {\r
+ Name (CFG0,\r
+ Package(){\r
+ 1800, //min BATT_ID Voltage(mV) for DEBUG category: 1800 mV (debug board support disabled since BAT_ID is grounded)\r
+ 1800, //max BATT_ID Voltage(mV) for DEBUG category: 1800 mV (debug board support disabled since BAT_ID is grounded)\r
+ 0, //min BATT_ID Voltage(mV) for NORMAL category: 0 mV (maximize BAT_ID range for NORMAL battery )\r
+ 1800, //max BATT_ID Voltage(mV) for NORMAL category: 1800 mV(maximize BAT_ID range for NORMAL battery )\r
+ 1800, //min BATT_ID Voltage(mV) for SMART category: 1800 mV (smart battery support disabled since BAT_ID is grounded)\r
+ 1800, //max BATT_ID Voltage(mV) for SMART category: 1800 mV (smart battery support disabled since BAT_ID is grounded)\r
+ 1, //Number of charging table\r
+ })\r
+ Return (CFG0)\r
+ }\r
+ //ACPI methods for Battery Charge Tables #1\r
+ Method (BCT1)\r
+ {\r
+ Name (CFG0, \r
+ Package(){\r
+ 0, //Battery Category: 0-NORMAL, 1-SMART\r
+ 0xFFFFFFEC, //min operating battery temp (-20 deg C) \r
+ 70, //max operating battery temp (+70 deg C)\r
+ Package(4){0,0,0,0},//128-bit battery info for future expansion\r
+ //Jeita Settings \r
+ 1, // Select JEITA Configuration: 0- No JEITA, 1- SW JEITA, 2- HW JEITA\r
+ 4200, // Max Battery Voltage (mV) for Standard Zone\r
+ 1500, // Max Battery Current (mA) for Standard Zone\r
+ 0, // Safe Min Temperature(in deg C) eg. -2 for 0xFFFFFFFE (2's complement in case of -ve number)\r
+ 60, // Safe Max Temperature(in deg C)\r
+ 2, // Temperature Hysteresis (in deg C)\r
+ // SW Jeita Entries\r
+ 4, // Total Zones (Standard Zone + 3 Jeita Zone)\r
+ 2, // Standard Zone #\r
+ 4200, // Voltage Zone 1, 4200 mV\r
+ 750, // Current Zone 1, 750 mA\r
+ 10, // Temperature Zone 1, 10 deg C\r
+ 4150, // Voltage Zone 3, 4150 mV\r
+ 1500, // Current Zone 3, 1500 mA\r
+ 45, // Temperature Zone 3, 45 deg C\r
+ 4100, // Voltage Zone 4, 4100 mV\r
+ 1500, // Current Zone 4, 1500 mA\r
+ 50 // Temperature Zone 4, 50 deg C\r
+ })\r
+ Return (CFG0)\r
+ }\r
+ }\r
+\r
+\r
+ //\r
+ //PMIC Battery Miniclass Driver\r
+ //\r
+ Device (PMBM)\r
+ {\r
+ Name (_HID, "QCOM0263") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.PMBT\r
+ })\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, Buffer (0x02)\r
+ {\r
+ 0x79, 0x00 // y.\r
+ })\r
+ Return (RBUF) /* \_SB_.PMBM._CRS.RBUF */\r
+ }\r
+\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0B)\r
+ }\r
+ }\r
+\r
+ Device (PEP0)\r
+ {\r
+ Name (_HID, "QCOM0237") // _HID: Hardware ID\r
+ Name (_CID, "PNP0D80" /* Windows-compatible System Power Management Controller */) // _CID: Compatible ID\r
+ Method (THTZ, 4, NotSerialized)\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_0, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_0 = ToInteger (Arg0)\r
+ If ((_T_0 == One))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_1 = ToInteger (Arg3)\r
+ If ((_T_1 == Zero))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ1.TPSV = Arg1\r
+ Notify (\_SB.TZ1, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ1._PSV ())\r
+ }\r
+ ElseIf ((_T_1 == 0x02))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ1.TTSP = Arg1\r
+ Notify (\_SB.TZ1, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ1._TSP ())\r
+ }\r
+ ElseIf ((_T_1 == 0x03))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ1.TTC1 = Arg1\r
+ Notify (\_SB.TZ1, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ1._TC1 ())\r
+ }\r
+ ElseIf ((_T_1 == 0x04))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ1.TTC2 = Arg1\r
+ Notify (\_SB.TZ1, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ1._TC2 ())\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_0 == 0x03))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_2 = ToInteger (Arg3)\r
+ If ((_T_2 == Zero))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ3.TPSV = Arg1\r
+ Notify (\_SB.TZ3, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ3._PSV ())\r
+ }\r
+ ElseIf ((_T_2 == 0x02))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ3.TTSP = Arg1\r
+ Notify (\_SB.TZ3, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ3._TSP ())\r
+ }\r
+ ElseIf ((_T_2 == 0x03))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ3.TTC1 = Arg1\r
+ Notify (\_SB.TZ3, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ3._TC1 ())\r
+ }\r
+ ElseIf ((_T_2 == 0x04))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ3.TTC2 = Arg1\r
+ Notify (\_SB.TZ3, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ3._TC2 ())\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_0 == 0x04))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_3, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_3 = ToInteger (Arg3)\r
+ If ((_T_3 == Zero))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ4.TPSV = Arg1\r
+ Notify (\_SB.TZ4, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ4._PSV ())\r
+ }\r
+ ElseIf ((_T_3 == 0x02))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ4.TTSP = Arg1\r
+ Notify (\_SB.TZ4, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ4._TSP ())\r
+ }\r
+ ElseIf ((_T_3 == 0x03))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ4.TTC1 = Arg1\r
+ Notify (\_SB.TZ4, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ4._TC1 ())\r
+ }\r
+ ElseIf ((_T_3 == 0x04))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ4.TTC2 = Arg1\r
+ Notify (\_SB.TZ4, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ4._TC2 ())\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_0 == 0x05))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_4, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_4 = ToInteger (Arg3)\r
+ If ((_T_4 == Zero))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ5.TPSV = Arg1\r
+ Notify (\_SB.TZ5, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ5._PSV ())\r
+ }\r
+ ElseIf ((_T_4 == 0x02))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ5.TTSP = Arg1\r
+ Notify (\_SB.TZ5, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ5._TSP ())\r
+ }\r
+ ElseIf ((_T_4 == 0x03))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ5.TTC1 = Arg1\r
+ Notify (\_SB.TZ5, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ3._TC1 ())\r
+ }\r
+ ElseIf ((_T_4 == 0x04))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ5.TTC2 = Arg1\r
+ Notify (\_SB.TZ5, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ5._TC2 ())\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_0 == 0x06))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_5, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_5 = ToInteger (Arg3)\r
+ If ((_T_5 == Zero))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ6.TPSV = Arg1\r
+ Notify (\_SB.TZ6, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ6._PSV ())\r
+ }\r
+ ElseIf ((_T_5 == 0x02))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ6.TTSP = Arg1\r
+ Notify (\_SB.TZ6, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ6._TSP ())\r
+ }\r
+ ElseIf ((_T_5 == 0x03))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ6.TTC1 = Arg1\r
+ Notify (\_SB.TZ6, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ6._TC1 ())\r
+ }\r
+ ElseIf ((_T_5 == 0x04))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ6.TTC2 = Arg1\r
+ Notify (\_SB.TZ6, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ6._TC2 ())\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_0 == 0x07))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_6, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_6 = ToInteger (Arg3)\r
+ If ((_T_6 == Zero))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ7.TPSV = Arg1\r
+ Notify (\_SB.TZ7, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ7._PSV ())\r
+ }\r
+ ElseIf ((_T_6 == One))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ7.TCRT = Arg1\r
+ Notify (\_SB.TZ7, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ7._CRT ())\r
+ }\r
+ ElseIf ((_T_6 == 0x02))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ7.TTSP = Arg1\r
+ Notify (\_SB.TZ7, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ7._TSP ())\r
+ }\r
+ ElseIf ((_T_6 == 0x03))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ7.TTC1 = Arg1\r
+ Notify (\_SB.TZ7, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ7._TC1 ())\r
+ }\r
+ ElseIf ((_T_6 == 0x04))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ7.TTC2 = Arg1\r
+ Notify (\_SB.TZ7, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ7._TC2 ())\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_0 == 0x08))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_7, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_7 = ToInteger (Arg3)\r
+ If ((_T_7 == Zero))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ8.TPSV = Arg1\r
+ Notify (\_SB.TZ8, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ8._PSV ())\r
+ }\r
+ ElseIf ((_T_7 == 0x02))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ8.TTSP = Arg1\r
+ Notify (\_SB.TZ8, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ8._TSP ())\r
+ }\r
+ ElseIf ((_T_7 == 0x03))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ8.TTC1 = Arg1\r
+ Notify (\_SB.TZ8, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ8._TC1 ())\r
+ }\r
+ ElseIf ((_T_7 == 0x04))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ8.TTC2 = Arg1\r
+ Notify (\_SB.TZ8, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ8._TC2 ())\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_0 == 0x09))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_8, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_8 = ToInteger (Arg3)\r
+ If ((_T_8 == Zero))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ9.TPSV = Arg1\r
+ Notify (\_SB.TZ9, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ9._PSV ())\r
+ }\r
+ ElseIf ((_T_8 == 0x02))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ9.TTSP = Arg1\r
+ Notify (\_SB.TZ9, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ9._TSP ())\r
+ }\r
+ ElseIf ((_T_8 == 0x03))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ9.TTC1 = Arg1\r
+ Notify (\_SB.TZ9, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ9._TC1 ())\r
+ }\r
+ ElseIf ((_T_8 == 0x04))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ9.TTC2 = Arg1\r
+ Notify (\_SB.TZ9, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ9._TC2 ())\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_0 == 0x14))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_9, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_9 = ToInteger (Arg3)\r
+ If ((_T_9 == Zero))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ20.TPSV = Arg1\r
+ Notify (\_SB.TZ20, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ20._PSV ())\r
+ }\r
+ ElseIf ((_T_9 == 0x02))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ20.TTSP = Arg1\r
+ Notify (\_SB.TZ20, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ20._TSP ())\r
+ }\r
+ ElseIf ((_T_9 == 0x03))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ20.TTC1 = Arg1\r
+ Notify (\_SB.TZ20, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ20._TC1 ())\r
+ }\r
+ ElseIf ((_T_9 == 0x04))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ20.TTC2 = Arg1\r
+ Notify (\_SB.TZ20, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ20._TC2 ())\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_0 == 0x15))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_A, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_A = ToInteger (Arg3)\r
+ If ((_T_A == Zero))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ21.TPSV = Arg1\r
+ Notify (\_SB.TZ21, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ21._PSV ())\r
+ }\r
+ ElseIf ((_T_A == 0x02))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ21.TTSP = Arg1\r
+ Notify (\_SB.TZ21, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ21._TSP ())\r
+ }\r
+ ElseIf ((_T_A == 0x03))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ21.TTC1 = Arg1\r
+ Notify (\_SB.TZ21, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ21._TC1 ())\r
+ }\r
+ ElseIf ((_T_A == 0x04))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ21.TTC2 = Arg1\r
+ Notify (\_SB.TZ21, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ21._TC2 ())\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_0 == 0x21))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_B, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_B = ToInteger (Arg3)\r
+ If ((_T_B == Zero))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ33.TPSV = Arg1\r
+ Notify (\_SB.TZ33, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ33._PSV ())\r
+ }\r
+ ElseIf ((_T_B == 0x02))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ33.TTSP = Arg1\r
+ Notify (\_SB.TZ33, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ33._TSP ())\r
+ }\r
+ ElseIf ((_T_B == 0x03))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ33.TTC1 = Arg1\r
+ Notify (\_SB.TZ33, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ33._TC1 ())\r
+ }\r
+ ElseIf ((_T_B == 0x04))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ33.TTC2 = Arg1\r
+ Notify (\_SB.TZ33, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ33._TC2 ())\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_0 == 0x24))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_C, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_C = ToInteger (Arg3)\r
+ If ((_T_C == Zero))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ36.TPSV = Arg1\r
+ Notify (\_SB.TZ36, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ36._PSV ())\r
+ }\r
+ ElseIf ((_T_C == 0x02))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ36.TTSP = Arg1\r
+ Notify (\_SB.TZ36, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ36._TSP ())\r
+ }\r
+ ElseIf ((_T_C == 0x03))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ36.TTC1 = Arg1\r
+ Notify (\_SB.TZ36, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ36._TC1 ())\r
+ }\r
+ ElseIf ((_T_C == 0x04))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ36.TTC2 = Arg1\r
+ Notify (\_SB.TZ36, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ36._TC2 ())\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_0 == 0x25))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_D, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_D = ToInteger (Arg3)\r
+ If ((_T_D == Zero))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ37.TPSV = Arg1\r
+ Notify (\_SB.TZ37, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ37._PSV ())\r
+ }\r
+ ElseIf ((_T_D == One))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ37.TCRT = Arg1\r
+ Notify (\_SB.TZ37, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ37._CRT ())\r
+ }\r
+ ElseIf ((_T_D == 0x02))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ37.TTSP = Arg1\r
+ Notify (\_SB.TZ37, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ37._TSP ())\r
+ }\r
+ ElseIf ((_T_D == 0x03))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ37.TTC1 = Arg1\r
+ Notify (\_SB.TZ37, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ37._TC1 ())\r
+ }\r
+ ElseIf ((_T_D == 0x04))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ37.TTC2 = Arg1\r
+ Notify (\_SB.TZ37, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ37._TC2 ())\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_0 == 0x26))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_E, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_E = ToInteger (Arg3)\r
+ If ((_T_E == Zero))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ38.TPSV = Arg1\r
+ Notify (\_SB.TZ38, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ38._PSV ())\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_0 == 0x28))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_F, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_F = ToInteger (Arg3)\r
+ If ((_T_F == Zero))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ40.TPSV = Arg1\r
+ Notify (\_SB.TZ40, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ40._PSV ())\r
+ }\r
+ ElseIf ((_T_F == 0x02))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ40.TTSP = Arg1\r
+ Notify (\_SB.TZ40, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ40._TSP ())\r
+ }\r
+ ElseIf ((_T_F == 0x03))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ40.TTC1 = Arg1\r
+ Notify (\_SB.TZ40, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ40._TC1 ())\r
+ }\r
+ ElseIf ((_T_F == 0x04))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ40.TTC2 = Arg1\r
+ Notify (\_SB.TZ40, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ40._TC2 ())\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_0 == 0x2C))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_G, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_G = ToInteger (Arg3)\r
+ If ((_T_G == Zero))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ44.TPSV = Arg1\r
+ Notify (\_SB.TZ44, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ44._PSV ())\r
+ }\r
+ ElseIf ((_T_G == 0x02))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ44.TTSP = Arg1\r
+ Notify (\_SB.TZ44, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ44._TSP ())\r
+ }\r
+ ElseIf ((_T_G == 0x03))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ44.TTC1 = Arg1\r
+ Notify (\_SB.TZ44, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ44._TC1 ())\r
+ }\r
+ ElseIf ((_T_G == 0x04))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ44.TTC2 = Arg1\r
+ Notify (\_SB.TZ44, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ44._TC2 ())\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_0 == 0x62))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_H, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_H = ToInteger (Arg3)\r
+ If ((_T_H == Zero))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ98.TPSV = Arg1\r
+ Notify (\_SB.TZ98, 0x81) // Information Change\r
+ }\r
+\r
+ Return (\_SB.TZ98._PSV) /* External reference */\r
+ }\r
+ ElseIf ((_T_H == 0x02))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ98.TTSP = Arg1\r
+ Notify (\_SB.TZ98, 0x81) // Information Change\r
+ }\r
+\r
+ Return (\_SB.TZ98._TSP) /* External reference */\r
+ }\r
+ ElseIf ((_T_H == 0x03))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ98.TTC1 = Arg1\r
+ Notify (\_SB.TZ98, 0x81) // Information Change\r
+ }\r
+\r
+ Return (\_SB.TZ98._TC1) /* External reference */\r
+ }\r
+ ElseIf ((_T_H == 0x04))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ98.TTC2 = Arg1\r
+ Notify (\_SB.TZ98, 0x81) // Information Change\r
+ }\r
+\r
+ Return (\_SB.TZ98._TC2) /* External reference */\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_0 == 0x63))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_I, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_I = ToInteger (Arg3)\r
+ If ((_T_I == One))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ99.TCRT = Arg1\r
+ Notify (\_SB.TZ99, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ99._CRT ())\r
+ }\r
+ ElseIf ((_T_I == 0x02))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ99.TTSP = Arg1\r
+ Notify (\_SB.TZ99, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ99._TSP ())\r
+ }\r
+ ElseIf ((_T_I == 0x03))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ99.TTC1 = Arg1\r
+ Notify (\_SB.TZ99, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ99._TC1 ())\r
+ }\r
+ ElseIf ((_T_I == 0x04))\r
+ {\r
+ If (Arg2)\r
+ {\r
+ \_SB.TZ99.TTC2 = Arg1\r
+ Notify (\_SB.TZ99, 0x81) // Thermal Trip Point Change\r
+ }\r
+\r
+ Return (\_SB.TZ99._TC2 ())\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ Else\r
+ {\r
+ Return (0xFFFF)\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Return (ResourceTemplate ()\r
+ {\r
+ // List interrupt resources in the order they are used in PEP_Driver.c\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, ExclusiveAndWake, ,, )\r
+ {\r
+ 0x0000021A,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, ExclusiveAndWake, ,, )\r
+ {\r
+ 0x0000021C,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, ExclusiveAndWake, ,, )\r
+ {\r
+ 0x0000021B,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, ExclusiveAndWake, ,, )\r
+ {\r
+ 0x0000021D,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000025,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000A1,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001A5,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000040,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000041,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000265,\r
+ }\r
+ })\r
+ }\r
+\r
+ // need 20 char and 1 D state info\r
+ Field (\_SB.ABD.ROP1, BufferAcc, NoLock, Preserve)\r
+ {\r
+ /* Connection Object - 0x007C is the unique identifier */\r
+ Connection (\r
+ I2cSerialBusV2 (0x0001, ControllerInitiated, 0x00000000,\r
+ AddressingMode7Bit, "\\_SB.ABD",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ ), \r
+ AccessAs (BufferAcc, AttribRawBytes (0x15)), \r
+ FLD0, 168\r
+ }\r
+\r
+ //Get port to connect to\r
+ Method (GEPT, 0, NotSerialized)\r
+ {\r
+ Name (BUFF, Buffer (0x04){})\r
+ CreateByteField (BUFF, Zero, STAT)\r
+ CreateWordField (BUFF, 0x02, DATA)\r
+ DATA = One //in this example we will connect to ABDO\r
+ Return (DATA) /* \_SB_.PEP0.GEPT.DATA */\r
+ }\r
+\r
+ Name (ROST, Zero)\r
+ // Number of CPUs to Park\r
+ Method (NPUR, 1, NotSerialized)\r
+ {\r
+ \_SB.AGR0._PUR [One] = Arg0\r
+ Notify (\_SB.AGR0, 0x80) // Status Change\r
+ }\r
+\r
+ // ACPI method to return intr descriptor\r
+ Method (INTR, 0, NotSerialized)\r
+ {\r
+ Name (RBUF, Package (0x18)\r
+ {\r
+ // Version\r
+ 0x02, \r
+ // Number of hosts\r
+ One, \r
+ // number of memory regions\r
+ 0x03, \r
+ // number of IPC registers\r
+ One, \r
+\r
+ 0x06, \r
+ 0x17911008, \r
+ One, \r
+ Zero,\r
+\r
+ // Shared memory\r
+ // Start address\r
+ 0x86000000, \r
+ // Size\r
+ 0x00200000, \r
+ // Reserved\r
+ Zero, \r
+ // Reserved\r
+ Zero, \r
+\r
+ // AOSS QMP\r
+ // Start address\r
+ 0x0C300000, \r
+ 0x1000, \r
+ Zero, \r
+ Zero, \r
+\r
+ 0x01FD4000, \r
+ 0x08, \r
+ Zero, \r
+ Zero, \r
+\r
+ // apss shared\r
+ 0x1799000C, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ })\r
+ Return (RBUF) /* \_SB_.PEP0.INTR.RBUF */\r
+ }\r
+\r
+ Method (CRTC, 0, NotSerialized)\r
+ {\r
+ Return (CTRX) /* \_SB_.PEP0.CTRX */\r
+ }\r
+\r
+ Name (CTRX, Package (0x0B)\r
+ {\r
+ // Methods (names are reversed) that are critical to\r
+ // system boot\r
+\r
+ "NSTC", \r
+ "HLCB", \r
+ "MMVD", // Discrete Vreg Mapping Package\r
+ "DSGP", //System Default Configuration, SDFR\r
+ "CCGP", // CPU Configuration\r
+ "MTPS", //Read the speaker calibration related parameters\r
+ "CPGP", // CPU cap for DCVS Package \r
+ "DMPP", // PEP resources (usually dummy devices required for power mgmt)\r
+ "VRDL", \r
+ "GBDL", // Debugger configuration -- must be below DSGP (reading SDFR)\r
+ "SRDL" // Default resources -- must be below DSGP (reading SDFR)\r
+ })\r
+ Method (STND, 0, NotSerialized)\r
+ {\r
+ Return (STNX) /* \_SB_.PEP0.STNX */\r
+ }\r
+\r
+ Name (STNX, Package (0x19)\r
+ {\r
+ // Power resources for devices\r
+ // Names are reversed (so method OCMD becomes DMCO)\r
+ //\r
+ // Following format must be followed for name:\r
+ // DMxx -- Exists on QCOM SoC. Will use normal PoFX for power mgmt\r
+ // XMxx -- Exists off QCOM SoC and uses legacy power mgmt (_PS1, _PS2, etc)\r
+ //\r
+ // The files where these methods are declared must be included\r
+ // at the bottom of this file and must exists inside the scope: \_SB.PEP0\r
+ "DMPO", \r
+ "DMSB", \r
+ "DMQP", \r
+ "DMMS", \r
+ "DMPA", \r
+ "DMPC", \r
+ "DMPB", \r
+ "DM0G", \r
+ "DM1G", \r
+ "DM2G", \r
+ "DM3G", \r
+ "DM4G", \r
+ "DM5G", \r
+ "DM6G", \r
+ "DM7G", \r
+ "DM8G", \r
+ "DM9G", \r
+ "DMPS", \r
+ "DMPL", \r
+ "DMDQ", \r
+ "DMPI", \r
+ "DMWE", \r
+ "XMPC", \r
+ "XMPL", \r
+ "DMEP"\r
+ })\r
+ //\r
+ // Core topology\r
+ //\r
+ Method (CTPM, 0, NotSerialized)\r
+ {\r
+ Name (CTPN, Package (0x02)\r
+ {\r
+ "CORE_TOPOLOGY", \r
+ 0x08\r
+ })\r
+ Return (CTPN) /* \_SB_.PEP0.CTPM.CTPN */\r
+ }\r
+\r
+ // CPU/Core Configurations Packages\r
+ Name (CCFG, Package (0x08)\r
+ {\r
+ Package (0x02)\r
+ {\r
+ "\\_SB.SYSM.CLUS.CPU0", \r
+ 0x10\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "\\_SB.SYSM.CLUS.CPU1", \r
+ 0x11\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "\\_SB.SYSM.CLUS.CPU2", \r
+ 0x12\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "\\_SB.SYSM.CLUS.CPU3", \r
+ 0x13\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "\\_SB.SYSM.CLUS.CPU4", \r
+ 0x14\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "\\_SB.SYSM.CLUS.CPU5", \r
+ 0x15\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "\\_SB.SYSM.CLUS.CPU6", \r
+ 0x16\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "\\_SB.SYSM.CLUS.CPU7", \r
+ 0x17\r
+ }\r
+ })\r
+ // Method to return CPU configuration packages\r
+ // PEP Get CPU Configuration\r
+ Method (PGCC, 0, NotSerialized)\r
+ {\r
+ Return (CCFG) /* \_SB_.PEP0.CCFG */\r
+ }\r
+\r
+ Name (DRVC, Package (0x02)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "HLOS_DRV", \r
+ 0x02, \r
+ "/icb/arbiter"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "DISPLAY_DRV", \r
+ 0x09, \r
+ "/icb/arbiter/display"\r
+ }\r
+ })\r
+ Method (LDRV, 0, NotSerialized)\r
+ {\r
+ Return (DRVC) /* \_SB_.PEP0.DRVC */\r
+ }\r
+\r
+ // CPU cap for DCVS Packages\r
+ Name (DCVS, Zero)\r
+\r
+ // Method to return CPU cap for DCVS Package\r
+ Method (PGDS, 0, NotSerialized)\r
+ {\r
+ Return (DCVS) /* \_SB_.PEP0.DCVS */\r
+ }\r
+\r
+ // PPP Supported Resources Package\r
+ Name (PPPP, Package (0x32)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS1_A", // Resource ID\r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", // Set Interface Type\r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF" // Get Interface Type\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS2_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS3_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS4_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS5_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS6_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS7_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS9_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS1_C", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS2_C", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS3_C", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO1_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO2_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO3_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO4_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO5_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO6_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO7_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO8_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO9_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO10_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO11_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO12_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO13_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO14_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO15_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO16_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO17_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO18_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO19_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO20_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO21_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO22_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO23_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO24_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO25_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO26_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO27_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO28_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LVS1_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_LVS2_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_CXO_BUFFERS_BBCLK2_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_CXO_BUFFERS_BBCLK3_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_CXO_BUFFERS_RFCLK1_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_CXO_BUFFERS_RFCLK2_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_CXO_BUFFERS_RFCLK3_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_CXO_BUFFERS_DIVCLK1_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_CXO_BUFFERS_DIVCLK2_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_CXO_BUFFERS_DIVCLK3_A", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_BUCK_BOOST1_B", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_RPMH", \r
+ "PM_RESOURCE_SERVICE_INTERFACE_TYPE_PMIC_KMDF"\r
+ }\r
+ })\r
+ // Method to return PPP Package\r
+ Method (PPPM, 0, NotSerialized)\r
+ {\r
+ Return (PPPP) /* \_SB_.PEP0.PPPP */\r
+ }\r
+\r
+ // Method to return System Default config packages\r
+ Name (PRRP, Package (0x12)\r
+ {\r
+ "PPP_RESOURCE_RANGE_INFO_SMPS_A", // Resource type range\r
+ "PPP_RESOURCE_ID_SMPS1_A", // Initial supported resource\r
+ "PPP_RESOURCE_ID_SMPS13_A", // Last supported resource\r
+ "PPP_RESOURCE_RANGE_INFO_SMPS_C", \r
+ "PPP_RESOURCE_ID_SMPS1_C", \r
+ "PPP_RESOURCE_ID_SMPS4_C", \r
+ "PPP_RESOURCE_RANGE_INFO_LDO_A", \r
+ "PPP_RESOURCE_ID_LDO1_A", \r
+ "PPP_RESOURCE_ID_LDO28_A", \r
+ "PPP_RESOURCE_RANGE_INFO_LVS_A", \r
+ "PPP_RESOURCE_ID_LVS1_A", \r
+ "PPP_RESOURCE_ID_LVS2_A", \r
+ "PPP_RESOURCE_RANGE_INFO_CXO_BUFFERS_A", \r
+ "PPP_RESOURCE_ID_CXO_BUFFERS_BBCLK2_A", \r
+ "PPP_RESOURCE_ID_CXO_BUFFERS_DIVCLK3_A", \r
+ "PPP_RESOURCE_RANGE_INFO_BUCK_BOOST_B", \r
+ "PPP_RESOURCE_ID_BUCK_BOOST1_B", \r
+ "PPP_RESOURCE_ID_BUCK_BOOST1_B"\r
+ })\r
+ // Method to return Pep Ppp Resource Range Package\r
+ Method (PPRR, 0, NotSerialized)\r
+ {\r
+ Return (PRRP) /* \_SB_.PEP0.PRRP */\r
+ }\r
+\r
+ // Method to return System Default config packages\r
+ // PEP Get System Default package\r
+ Method (PGSD, 0, NotSerialized)\r
+ {\r
+ Return (SDFR) /* \_SB_.PEP0.SDFR */\r
+ }\r
+\r
+ // Full PEP Device Package\r
+ Name (FPDP, Zero)\r
+ // Method to return Full PEP Managed Device List Package\r
+ Method (FPMD, 0, NotSerialized)\r
+ {\r
+ Return (FPDP) /* \_SB_.PEP0.FPDP */\r
+ }\r
+\r
+ // \r
+ // PEP Processor Performance configuration \r
+ // CPU cap for DCVS Packages\r
+ Name (PPPC, Zero)\r
+ // Method to return CPU cap for DCVS Package\r
+ Method (PGPC, 0, NotSerialized)\r
+ {\r
+ Return (PPPC) /* \_SB_.PEP0.PPPC */\r
+ }\r
+\r
+ Method (DPRF, 0, NotSerialized)\r
+ {\r
+ Return (\_SB.DPP0)\r
+ }\r
+/*\r
+ Method (DMRF, 0, NotSerialized)\r
+ {\r
+ Return (\_SB.DPP1)\r
+ }*/\r
+ }\r
+\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ Method (LPDC, 0, NotSerialized)\r
+ {\r
+ Return (NPDC) /* \_SB_.PEP0.NPDC */\r
+ }\r
+\r
+ Name (NPDC, Package (0x01)\r
+ {\r
+ Package (0x02)\r
+ {\r
+ "INTERRUPT_CONFIG", \r
+ Package (0x0D)\r
+ {\r
+ Package (0x04)\r
+ {\r
+ Zero, \r
+ 0x021A, \r
+ Zero, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ One, \r
+ 0x021B, \r
+ Zero, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ 0x02, \r
+ 0x021C, \r
+ Zero, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ 0x03, \r
+ 0x021D, \r
+ Zero, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ 0x04, \r
+ 0x0218, \r
+ Zero, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ 0x05, \r
+ 0x0219, \r
+ Zero, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ 0x06, \r
+ 0x0206, \r
+ Zero, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ 0x07, \r
+ 0x0207, \r
+ Zero, \r
+ One\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ 0x08, \r
+ 0x0208, \r
+ Zero, \r
+ One, \r
+ 0x08\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ 0x09, \r
+ 0x0209, \r
+ Zero, \r
+ One, \r
+ 0x08\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ 0x0A, \r
+ 0x020A, \r
+ Zero, \r
+ One, \r
+ 0x08\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ 0x0B, \r
+ 0x020B, \r
+ Zero, \r
+ One, \r
+ 0x08\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ 0x0C, \r
+ 0x0201, \r
+ Zero, \r
+ 0x04\r
+ }\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ Method (LPCU, 0, NotSerialized)\r
+ {\r
+ Return (NPCU) /* \_SB_.PEP0.NPCU */\r
+ }\r
+\r
+ Name (NPCU, Package (0x05)\r
+ {\r
+ "PCU_CONFIG", \r
+ 0x09, \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "PCU_CLUSTER_CONFIG", \r
+ 0x09\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ "PCU_PHYS_CONFIG", \r
+ 0x17E00040, \r
+ 0x17E10040, \r
+ 0x17E20040, \r
+ 0x17E30040, \r
+ 0x17E40040, \r
+ 0x17E50040, \r
+ 0x17E60040, \r
+ 0x17E70040, \r
+ 0x17810104\r
+ }\r
+ })\r
+ }\r
+\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ Method (LVDD, 0, NotSerialized)\r
+ {\r
+ Return (NVDD) /* \_SB_.PEP0.NVDD */\r
+ }\r
+\r
+ Name (NVDD, Package (0x06)\r
+ {\r
+ Package (0x02)\r
+ {\r
+ "/arc/client/rail_cx", \r
+ "RAIL_VOLTAGE_LEVEL_NOMINAL"\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "/arc/client/display/rail_cx", \r
+ "RAIL_VOLTAGE_LEVEL_OFF"\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "/arc/client/rail_mx", \r
+ "RAIL_VOLTAGE_LEVEL_NOMINAL"\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "/arc/client/display/rail_mx", \r
+ "RAIL_VOLTAGE_LEVEL_OFF"\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "/arc/client/rail_xo", \r
+ "XO_LEVEL_ON"\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "/arc/client/display/rail_xo", \r
+ "XO_LEVEL_CRYSTAL_OFF"\r
+ }\r
+ })\r
+ }\r
+\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ Method (LLMH, 0, NotSerialized)\r
+ {\r
+ Return (NLMH) /* \_SB_.PEP0.NLMH */\r
+ }\r
+\r
+ Name (NLMH, Package (0x01)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "PEP_LMH_CFG", \r
+ Package (0x06)\r
+ {\r
+ Zero, \r
+ Zero, \r
+ 0x002DB400, \r
+ 0x0D02, \r
+ 0x0DF7, \r
+ 0x0DFC\r
+ }, \r
+\r
+ Package (0x06)\r
+ {\r
+ One, \r
+ Zero, \r
+ 0x002DB400, \r
+ 0x0D02, \r
+ 0x0DF7, \r
+ 0x0DFC\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ // Discrete Vreg Mapping Package\r
+ Name (DVMP, Package (0x02)\r
+ {\r
+ // Virtual regulator to aggregate GPIO pin control of CHIP_PWD_L\r
+ // CHIP_PWD_L must be deasserted for BT to share a clock with AR6004\r
+ // BT and WLAN devices will take a vote on this virtual regulator to\r
+ // control the shared GPIO pin\r
+ Package (0x04)\r
+ {\r
+ "PPP_RESOURCE_ID_PMIC_GPIO_DV1", // Discrete Vreg ID\r
+ "PPP_RESOURCE_TYPE_DISCRETE_PMIC_GPIO", // Vreg type\r
+ Package (0x02)\r
+ {\r
+ "PM_DISCRETE_VREG_STATE_ON", // Mapping for VREG ON\r
+ Package (0x0A)\r
+ {\r
+ Zero, // pmic_number (PM8994) - must match pmic.asl\r
+ 0x08, // gpio_id - GPIO #9\r
+ Zero, // Mode - GPIO configured as output - 0, 1 for input\r
+ Zero, // voltage_source - PM_GPIO_VIN0\r
+ One, // source - PM_GPIO_SOURCE_1 (drive logic HIGH)\r
+ Zero, // out_buffer_config - PM_GPIO_OUT_BUFFER_CONFIG_CMOS \r
+ One, // out_buffer_strength - PM_GPIO_OUT_BUFFER_LOW\r
+ Zero, // inversion � no invert\r
+ One, // External pin enable - PM_GPIO_PERPH_EN_ENABLE\r
+ 0x05 // PM_GPIO_I_SOURCE_PULL_NO_PULL, ignored for Output mode.\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PM_DISCRETE_VREG_STATE_OFF", // Mapping for VREG OFF\r
+ Package (0x0A)\r
+ {\r
+ Zero, // pmic_number 0\r
+ 0x08, // gpio_id - GPIO #9\r
+ Zero, // Mode - GPIO configured as output - 0, 1 for input\r
+ Zero, // voltage_source - PM_GPIO_VIN0\r
+ Zero, // source - PM_GPIO_SOURCE_0 (drive logic LOW)\r
+ Zero, // out_buffer_config - PM_GPIO_OUT_BUFFER_CONFIG_CMOS \r
+ One, // out_buffer_strength - PM_GPIO_OUT_BUFFER_LOW\r
+ Zero, // inversion � no invert\r
+ One, // External pin enable - PM_GPIO_PERPH_EN_ENABLE\r
+ 0x05 // PM_GPIO_I_SOURCE_PULL_NO_PULL, ignored for Output mode.\r
+ }\r
+ }\r
+ }, \r
+\r
+ //discrete vreg vote for MPP4\r
+ Package (0x04)\r
+ {\r
+ "PPP_RESOURCE_ID_PMIC_MPP_DV1", // Discrete Vreg ID\r
+ "PPP_RESOURCE_TYPE_DISCRETE_PMIC_MPP", // Vreg type\r
+ Package (0x02)\r
+ {\r
+ "PM_DISCRETE_VREG_STATE_ON", // Mapping for VREG ON\r
+ Package (0x06)\r
+ {\r
+ Zero, // PMIC number\r
+ 0x03, // MPP index (mpp #4)\r
+ Zero, // Direction, 0 - output\r
+ 0x02, // VIO_2\r
+ One, // PM_MPP__DLOGIC__OUT_CTRL_HIGH\r
+ Zero // PM_MPP__DLOGIC__DBUS_NONE\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PM_DISCRETE_VREG_STATE_OFF", // Mapping for VREG OFF\r
+ Package (0x06)\r
+ {\r
+ Zero, // PMIC number\r
+ 0x03, // MPP index (mpp #4)\r
+ Zero, // Direction, 0 - output\r
+ 0x02, // VIO_2\r
+ Zero, // PM_MPP__DLOGIC__OUT_CTRL_LOW\r
+ Zero // PM_MPP__DLOGIC__DBUS_NONE\r
+ }\r
+ }\r
+ }\r
+ })\r
+ // Method to return Discrete Vreg Mapping Package\r
+ Method (DVMM, 0, NotSerialized)\r
+ {\r
+ Return (DVMP) /* \_SB_.PEP0.DVMP */\r
+ }\r
+ }\r
+\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ Method (LDBG, 0, NotSerialized)\r
+ {\r
+ Return (NDBG) /* \_SB_.PEP0.NDBG */\r
+ }\r
+\r
+ Name (NDBG, \r
+ /**\r
+ * The debuggers package is used by PEP to detect when a debugger is connected,\r
+ * turn on the required power resources for a debugger and to turn off all \r
+ * debugger related resources when not in use (this logic is encompassed in PEP).\r
+ *\r
+ * The expected hiearchy of this package:\r
+ * DEBUGGERS\r
+ * TYPE\r
+ * String = SERIAL, USB2.0, USB3.0\r
+ * INSTANCES\r
+ * The instancepath of the drivers which the debugger impersonates\r
+ * DEBUG_ON\r
+ * The resources that need to be turned on for the debugger to work\r
+ * for the given controller type (SERIAL/USB2.0/USB3.0)\r
+ * DEBUG_OFF\r
+ * The resources to turn off when no debugger is connected for this\r
+ * debugger type and no HLOS driver is loaded for any one of the given\r
+ * HLOS types. The implementation for this feature is documented within\r
+ * PEP.\r
+ *\r
+ */\r
+ Package (0x04)\r
+ {\r
+ "DEBUGGERS", \r
+ Package (0x05)\r
+ {\r
+ "TYPE", \r
+ "SERIAL", \r
+ Package (0x02)\r
+ {\r
+ "INSTANCES", \r
+ "\\_SB.UARD"\r
+ }, \r
+\r
+ Package (0x0C)\r
+ {\r
+ "DEBUG_ON", \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_m_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_qupv3_wrap_1_m_ahb_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_qupv3_wrap_1_m_ahb_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_s_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_qupv3_wrap_1_s_ahb_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_qupv3_wrap_1_s_ahb_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_s1_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_qupv3_wrap1_s1_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_qupv3_wrap1_s1_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x07)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_2", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x00989680, \r
+ 0x0682, \r
+ "HLOS_DRV", \r
+ "SUPPRESSIBLE"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x07)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_2", \r
+ 0x00989680, \r
+ 0x004C4B40, \r
+ "HLOS_DRV", \r
+ "SUPPRESSIBLE"\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ "DEBUG_OFF"\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "TYPE", \r
+ "USB2.0", \r
+ Package (0x02)\r
+ {\r
+ "INSTANCES", \r
+ "\\_SB.USB1"\r
+ }, \r
+\r
+ Package (0x1E)\r
+ {\r
+ "DEBUG_ON", \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO12_A", \r
+ One, \r
+ 0x001B7740, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO24_A", \r
+ One, \r
+ 0x002EEBB8, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO26_A", \r
+ One, \r
+ 0x00124F80, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO1_A", \r
+ One, \r
+ 0x000D6D80, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "usb30_sec_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb30_sec_sleep_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb30_sec_sleep_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb30_sec_sleep_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb3_sec_phy_pipe_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb3_sec_phy_pipe_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb3_sec_phy_pipe_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_aggre_usb3_sec_axi_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_aggre_usb3_sec_axi_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_aggre_usb3_sec_axi_clk", \r
+ 0x08, \r
+ 0x78, \r
+ 0x09\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_cfg_noc_usb3_sec_axi_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_cfg_noc_usb3_sec_axi_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_cfg_noc_usb3_sec_axi_clk", \r
+ 0x08, \r
+ 0x78, \r
+ 0x09\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb30_sec_master_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb30_sec_master_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_usb30_sec_master_clk", \r
+ 0x08, \r
+ 0x78, \r
+ 0x09\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb3_sec_phy_aux_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb3_sec_phy_aux_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_usb3_sec_phy_aux_clk", \r
+ 0x08, \r
+ 0x04B0, \r
+ 0x07\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb_phy_cfg_ahb2phy_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb_phy_cfg_ahb2phy_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb_phy_cfg_ahb2phy_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x07)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_USB3_1", \r
+ 0x17D78400, \r
+ Zero, \r
+ "HLOS_DRV", \r
+ "SUPPRESSIBLE"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x07)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_USB3_1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x28000000, \r
+ 0x28000000, \r
+ "HLOS_DRV", \r
+ "SUPPRESSIBLE"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "NPARESOURCE", \r
+ Package (0x04)\r
+ {\r
+ One, \r
+ "/arc/client/rail_cx", \r
+ 0x0100, \r
+ "SUPPRESSIBLE"\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ "DEBUG_OFF"\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "TYPE", \r
+ "USB3.0", \r
+ Package (0x02)\r
+ {\r
+ "INSTANCES", \r
+ "\\_SB.URS0"\r
+ }, \r
+\r
+ Package (0x1E)\r
+ {\r
+ "DEBUG_ON", \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO12_A", \r
+ One, \r
+ 0x001B7740, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO24_A", \r
+ One, \r
+ 0x002EEBB8, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO26_A", \r
+ One, \r
+ 0x00124F80, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO1_A", \r
+ One, \r
+ 0x000D6D80, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "usb30_prim_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb30_prim_sleep_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb30_prim_sleep_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb30_prim_sleep_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb3_prim_phy_pipe_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb3_prim_phy_pipe_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb3_prim_phy_pipe_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_aggre_usb3_prim_axi_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_aggre_usb3_prim_axi_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_aggre_usb3_prim_axi_clk", \r
+ 0x08, \r
+ 0x78, \r
+ 0x09\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_cfg_noc_usb3_prim_axi_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_cfg_noc_usb3_prim_axi_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_cfg_noc_usb3_prim_axi_clk", \r
+ 0x08, \r
+ 0x78, \r
+ 0x09\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb30_prim_master_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb30_prim_master_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_usb30_prim_master_clk", \r
+ 0x08, \r
+ 0x78, \r
+ 0x09\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb3_prim_phy_aux_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb3_prim_phy_aux_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_usb3_prim_phy_aux_clk", \r
+ 0x08, \r
+ 0x04B0, \r
+ 0x07\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb_phy_cfg_ahb2phy_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb_phy_cfg_ahb2phy_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb_phy_cfg_ahb2phy_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x07)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_USB3_0", \r
+ 0x17D78400, \r
+ Zero, \r
+ "HLOS_DRV", \r
+ "SUPPRESSIBLE"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x07)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_USB3_0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x28000000, \r
+ 0x28000000, \r
+ "HLOS_DRV", \r
+ "SUPPRESSIBLE"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "NPARESOURCE", \r
+ Package (0x04)\r
+ {\r
+ One, \r
+ "/arc/client/rail_cx", \r
+ 0x0100, \r
+ "SUPPRESSIBLE"\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ "DEBUG_OFF"\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ // default resource information\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ Method (LDRS, 0, NotSerialized)\r
+ {\r
+ Return (NDRS) /* \_SB_.PEP0.NDRS */\r
+ }\r
+\r
+ Name (NDRS, \r
+ /**\r
+ * The default resources package is used by PEP to handle system default resources.\r
+ * Rather than having to declare them all in the SDF declaration, you define resources\r
+ * separately and annotate them by functionality. At runtime, the parsed resources\r
+ * will be placed into separate components within the SDF device node.\r
+ *\r
+ * The expected hiearchy of this package:\r
+ * DEFAULT_RESOURCES\r
+ * (WORKAROUND|OPTIMIZATION)\r
+ * String = Name\r
+ * For debugging and querying -- keep it short\r
+ * String = "BOOT", "SCREENON", "DEMAND"\r
+ * When to activate these resources\r
+ * RESOURCES\r
+ * The list of resources to activate for this set workaround / optimization\r
+ *\r
+ */\r
+ Package (0x03)\r
+ {\r
+ "DEFAULT_RESOURCES", \r
+ Package (0x04)\r
+ {\r
+ "OPTIMIZATION", \r
+ "CPU_CNOC_VOTE", \r
+ "BOOT", \r
+ Package (0x02)\r
+ {\r
+ "RESOURCES", \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x06)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_CLK_CTL", \r
+ One, \r
+ One, \r
+ "SUPPRESSIBLE"\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "WORKAROUND", \r
+ "USB1_GPIO_VOTE", \r
+ "BOOT", \r
+ Package (0x05)\r
+ {\r
+ "RESOURCES", \r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x2C, \r
+ One, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_disp_ahb_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_disp_ahb_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ Method (UIDL, 0, NotSerialized)\r
+ {\r
+ Return (NIDL) /* \_SB_.PEP0.NIDL */\r
+ }\r
+\r
+ Name (NIDL, Package (0x0E)\r
+ {\r
+ "MICROPEP_IDLE", \r
+ One, \r
+ Package (0x08)\r
+ {\r
+ "LPR", \r
+ "KryoSilver0", // LPR Name\r
+ Zero, // LPR Core Mask (0xFFFFFFFF is coordinated)\r
+ Zero, //LastMan Adder\r
+ Package (0x07)\r
+ {\r
+ "MODE", \r
+ "C1", \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "MODE", \r
+ "C2d", \r
+ 0x03E8, \r
+ 0x0FA0, \r
+ Zero, \r
+ Zero, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "MODE", \r
+ "C3", // Mode name\r
+ 0x0BB8, \r
+ 0x1194, \r
+ 0x03, \r
+ Zero, \r
+ 0x40000003 // Mode PSCI Flags \r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "MODE", \r
+ "C3_NI", \r
+ 0x0BB8, \r
+ 0x1194, \r
+ 0x13, \r
+ Zero, \r
+ 0x40000004\r
+ }\r
+ }, \r
+\r
+ Package (0x08)\r
+ {\r
+ "LPR", \r
+ "KryoSilver1", \r
+ One, \r
+ Zero, \r
+ Package (0x07)\r
+ {\r
+ "MODE", \r
+ "C1", \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "MODE", \r
+ "C2d", \r
+ 0x03E8, \r
+ 0x0FA0, \r
+ Zero, \r
+ Zero, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "MODE", \r
+ "C3", \r
+ 0x0BB8, \r
+ 0x1194, \r
+ 0x03, \r
+ Zero, \r
+ 0x40000003\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "MODE", \r
+ "C3_NI", \r
+ 0x0BB8, \r
+ 0x1194, \r
+ 0x13, \r
+ Zero, \r
+ 0x40000004\r
+ }\r
+ }, \r
+\r
+ Package (0x08)\r
+ {\r
+ "LPR", \r
+ "KryoSilver2", \r
+ 0x02, \r
+ Zero, \r
+ Package (0x07)\r
+ {\r
+ "MODE", \r
+ "C1", \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
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+ 0x0F\r
+ }\r
+ }, \r
+\r
+ Package (0x06)\r
+ {\r
+ "LITTLE", \r
+ 0x04, \r
+ "apcs_silver_sysleaf_clk", \r
+ Package (0x03)\r
+ {\r
+ 0x012C, \r
+ 0x04CD, \r
+ 0x052D\r
+ }, \r
+\r
+ 0x03, \r
+ Package (0x03)\r
+ {\r
+ Zero, \r
+ 0x0B, \r
+ 0x0F\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "L3_CACHE", \r
+ "apcs_l3_sysleaf_clk"\r
+ }\r
+ }\r
+ })\r
+ Method (LDCV, 0, NotSerialized)\r
+ {\r
+ Return (NDCV) /* \_SB_.PEP0.NDCV */\r
+ }\r
+ }\r
+\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ Method (CTSN, 0, NotSerialized)\r
+ {\r
+ Return (THSD) /* \_SB_.PEP0.THSD */\r
+ }\r
+\r
+ Method (PEPH, 0, NotSerialized)\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_0237"\r
+ })\r
+ }\r
+\r
+ Method (BCLH, 0, NotSerialized)\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_0294"\r
+ })\r
+ }\r
+\r
+ Name (THSD, Package (0x07)\r
+ {\r
+ Package (0x16)\r
+ {\r
+ 0x15, \r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_027F", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_0280", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_0281", \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_0282", \r
+ 0x03\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_0283", \r
+ 0x04\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_0284", \r
+ 0x05\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_0285", \r
+ 0x06\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_0286", \r
+ 0x07\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_0287", \r
+ 0x08\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_0288", \r
+ 0x09\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_0289", \r
+ 0x0A\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_02AB", \r
+ 0x0B\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_02AC", \r
+ 0x0C\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_02AD", \r
+ 0x0D\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_02AE", \r
+ 0x0E\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_02AF", \r
+ 0x0F\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_02C8", \r
+ 0x10\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_02C9", \r
+ 0x11\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_02CA", \r
+ 0x12\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_02CB", \r
+ 0x13\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_02CC", \r
+ 0x14\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ 0x03, \r
+ Package (0x04)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_02B0", \r
+ 0x15, \r
+ 0x05, \r
+ Package (0x05)\r
+ {\r
+ One, \r
+ 0x02, \r
+ 0x03, \r
+ 0x04, \r
+ 0x05\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_02B1", \r
+ 0x16, \r
+ 0x05, \r
+ Package (0x05)\r
+ {\r
+ 0x06, \r
+ 0x07, \r
+ 0x08, \r
+ 0x09, \r
+ 0x0A\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "ACPI\\VEN_QCOM&DEV_02B2", \r
+ 0x17, \r
+ 0x15, \r
+ Package (0x15)\r
+ {\r
+ Zero, \r
+ One, \r
+ 0x02, \r
+ 0x03, \r
+ 0x04, \r
+ 0x05, \r
+ 0x06, \r
+ 0x07, \r
+ 0x08, \r
+ 0x09, \r
+ 0x0A, \r
+ 0x0B, \r
+ 0x0C, \r
+ 0x0D, \r
+ 0x0E, \r
+ 0x0F, \r
+ 0x10, \r
+ 0x11, \r
+ 0x12, \r
+ 0x13, \r
+ 0x14\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ 0x04, \r
+ Package (0x04)\r
+ {\r
+ "SYS_THERM1", \r
+ "ACPI\\VEN_QCOM&DEV_0299", \r
+ Zero, \r
+ Zero\r
+ }, \r
+#if 0\r
+ Package (0x04)\r
+ {\r
+ "SYS_THERM2", \r
+ "ACPI\\VEN_QCOM&DEV_029A", \r
+ One, \r
+ Zero\r
+ }, \r
+#endif\r
+ Package (0x04)\r
+ {\r
+ "PA_THERM", \r
+ "ACPI\\VEN_QCOM&DEV_029B", \r
+ 0x01, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PA_THERM1", \r
+ "ACPI\\VEN_QCOM&DEV_029C", \r
+ 0x02, \r
+ Zero\r
+ }, \r
+\r
+#if 0\r
+ Package (0x04)\r
+ {\r
+ "SYS_THERM3", \r
+ "ACPI\\VEN_QCOM&DEV_029D", \r
+ 0x04, \r
+ Zero\r
+ }, \r
+#endif\r
+\r
+ Package (0x04)\r
+ {\r
+ "PMIC_THERM", \r
+ "ACPI\\VEN_QCOM&DEV_029E", \r
+ 0x03, \r
+ Zero\r
+ }, \r
+#if 0\r
+ Package (0x04)\r
+ {\r
+ "BAT_THERM", \r
+ "ACPI\\VEN_QCOM&DEV_029F", \r
+ 0x04, \r
+ Zero\r
+ }, \r
+ Package (0x04)\r
+ {\r
+ "RF_THERM", \r
+ "ACPI\\VEN_QCOM&DEV_02A0", \r
+ 0x05, \r
+ Zero\r
+ }\r
+#endif\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ One, \r
+ Package (0x05)\r
+ {\r
+ 0x02, \r
+ 0x0ADC, \r
+ 0x0B0E, \r
+ 0x02, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ 0x04, \r
+ Package (0x03)\r
+ {\r
+ "cpuv_restriction_cold", \r
+ One, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "cpuv_restriction_cold", \r
+ One, \r
+ One\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "cpuv_restriction_cold", \r
+ One, \r
+ 0x43\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "cpuv_restriction_cold", \r
+ One, \r
+ 0x53\r
+ }\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ Zero\r
+ }, \r
+\r
+ Package (0x08)\r
+ {\r
+ 0x07, \r
+ Package (0x03)\r
+ {\r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ 0x03, \r
+ 0x02, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ 0x04, \r
+ 0x02, \r
+ One\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ 0x06, \r
+ 0x02, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ 0x08, \r
+ 0x02, \r
+ 0x03\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ 0x02, \r
+ 0x04, \r
+ Zero\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ // Defined in pep_common.asl for audio resources under method STND (Name STNX)\r
+ Method (APMD, 0, NotSerialized)\r
+ {\r
+ // We return object named APCC - defined below for audio resources\r
+ Return (APCC) /* \_SB_.PEP0.APCC */\r
+ }\r
+\r
+ Name (APCC, Package (0x02)\r
+ {\r
+ Package (0x1A)\r
+ {\r
+ // These resources are for Codec hardware\r
+ "DEVICE", \r
+ "\\_SB.ADSP.SLM1.ADCM.AUDD", \r
+ Package (0x05)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x03)\r
+ {\r
+ "FSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_CXO_BUFFERS_BBCLK2_A", \r
+ 0x06, \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_CXO_BUFFERS_BBCLK2_A", \r
+ 0x06, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x06)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS4_A", \r
+ 0x02, \r
+ 0x001B7740, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS4_A", \r
+ 0x02, \r
+ 0x001B7740, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PREPARE_PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_PSTATE", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x04, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x05, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x06, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x07, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x08, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x09, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x0A, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x0B, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x0C, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x0D, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x0E, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x0F, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x10, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x11, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x12, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x13, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x14, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x15, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x16, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x17, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.ADSP.SLM1.ADCM.AUDD.MBHC", \r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+//#if 0\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ //-----------------------------------------------------------------------------------------\r
+ // GRAPHICS, DISPLAY, and VIDEO resources\r
+ //\r
+ // !!WARNING: The below table entries are auto-generated and are part of several\r
+ // interdependent ACPI methods that are all auto-generated from a single source.\r
+ // These components should NOT be edited by hand, as they must stay in sync\r
+ // with all other dependent graphics methods.\r
+ //-----------------------------------------------------------------------------------------\r
+ // OWNING DRIVER: qcdxkm850.sys\r
+ //\r
+ // HW CONTROLLED: 3D core\r
+ // MDP core\r
+ // Internal display circuitry\r
+ // HDMI circuitry\r
+ // Rotator core\r
+ // Video Decode core\r
+ // ...\r
+ //\r
+ // COMPONENTS:\r
+ // C0\r
+ // C1\r
+ // C2\r
+ // C3\r
+ // C4\r
+ // C5\r
+ // C6\r
+ // C7\r
+ // C8\r
+ // C9\r
+ //-----------------------------------------------------------------------------------------\r
+ //\r
+ \r
+ //--------------------------------------------------------------------------------------\r
+ // Complete list of individual component methods\r
+ //--------------------------------------------------------------------------------------\r
+ //\r
+ Method (GPMD, 0, NotSerialized)\r
+ {\r
+ Name (LIST, Package (0x0B)\r
+ {\r
+ "METHOD_LIST", \r
+ "DM0G", \r
+ "DM1G", \r
+ "DM2G", \r
+ "DM3G", \r
+ "DM4G", \r
+ "DM5G", \r
+ "DM6G", \r
+ "DM7G", \r
+ "DM8G", \r
+ "DM9G"\r
+ })\r
+ Return (LIST) /* \_SB_.PEP0.GPMD.LIST */\r
+ }\r
+\r
+ Method (G0MD, 0, NotSerialized)\r
+ {\r
+ Name (GPCC, Package (0x01)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.GPU0", \r
+ Package (0x0C)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x12)\r
+ {\r
+ "ENTER", \r
+ Package (0x01)\r
+ {\r
+ "PSTATE_SAVE"\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x03, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x04, \r
+ 0x2A\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x02, \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "mdss_core_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_xo_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "phy_refgen_south", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x08)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO1_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ "HLOS_DRV", \r
+ "REQUIRED"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x08)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO26_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ "HLOS_DRV", \r
+ "REQUIRED"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICGPIO", \r
+ Package (0x08)\r
+ {\r
+ "IOCTL_PM_GPIO_CONFIG_DIGITAL_OUTPUT", \r
+ Zero, \r
+ 0x11, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x60, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x7B, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x08)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO14_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ "HLOS_DRV", \r
+ "REQUIRED"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x08)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS6_A", \r
+ 0x02, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ "HLOS_DRV", \r
+ "REQUIRED"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_CXO_BUFFERS_DIVCLK3_A", \r
+ 0x06, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x80, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x11)\r
+ {\r
+ "EXIT", \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_xo_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "mdss_core_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ "PSTATE_RESTORE"\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x08)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO1_A", \r
+ One, \r
+ 0x000D6D80, \r
+ One, \r
+ 0x07, \r
+ Zero, \r
+ "HLOS_DRV", \r
+ "REQUIRED"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x08)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO26_A", \r
+ One, \r
+ 0x00124F80, \r
+ One, \r
+ 0x07, \r
+ Zero, \r
+ "HLOS_DRV", \r
+ "REQUIRED"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x08)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO14_A", \r
+ One, \r
+ 0x001CAFC0, \r
+ One, \r
+ 0x07, \r
+ Zero, \r
+ "HLOS_DRV", \r
+ "REQUIRED"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x08)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS6_A", \r
+ 0x02, \r
+ 0x000C3500, \r
+ One, \r
+ 0x07, \r
+ Zero, \r
+ "HLOS_DRV", \r
+ "REQUIRED"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICGPIO", \r
+ Package (0x08)\r
+ {\r
+ "IOCTL_PM_GPIO_CONFIG_DIGITAL_OUTPUT", \r
+ Zero, \r
+ 0x11, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ One, \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ 0x0A\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x7B, \r
+ One, \r
+ Zero, \r
+ One, \r
+ 0x03, \r
+ 0x07\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x80, \r
+ One, \r
+ Zero, \r
+ One, \r
+ 0x03, \r
+ 0x07\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x03)\r
+ {\r
+ "PPP_RESOURCE_ID_CXO_BUFFERS_DIVCLK3_A", \r
+ 0x06, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICGPIO", \r
+ Package (0x08)\r
+ {\r
+ "IOCTL_PM_GPIO_CONFIG_DIGITAL_OUTPUT", \r
+ Zero, \r
+ 0x0F, \r
+ Zero, \r
+ Zero, \r
+ 0x04, \r
+ 0x03, \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ 0x96\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "phy_refgen_south", \r
+ One\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "INIT_FSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PREPARE_PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_PSTATE", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE_SET", \r
+ One, \r
+ Package (0x05)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_xo_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "mdss_core_gdsc", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "mdss_core_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_xo_clk", \r
+ 0x02\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ "PSTATE_SET", \r
+ 0x02, \r
+ Package (0x12)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_DISPLAY_CFG", \r
+ 0x047868C0, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_mdp_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_vsync_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_vsync_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_pclk0_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_esc0_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_byte0_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_byte0_intf_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_pclk1_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_esc1_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_byte1_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_byte1_intf_clk", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x12)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_DISPLAY_CFG", \r
+ 0x047868C0, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_mdp_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_vsync_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_vsync_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_pclk0_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_esc0_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_byte0_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_byte0_intf_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_pclk1_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_esc1_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_byte1_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_byte1_intf_clk", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x12)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_DISPLAY_CFG", \r
+ 0x047868C0, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_mdp_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_vsync_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_vsync_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_pclk0_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_esc0_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_byte0_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_byte0_intf_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_pclk1_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_esc1_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_byte1_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
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+ 0x21, \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x47868C00\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x47868C00\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x22, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x4190AB00\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x4190AB00\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x23, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x3B9ACA00\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x3B9ACA00\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x24, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x35A4E900\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x35A4E900\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x25, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x2FAF0800\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x2FAF0800\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x26, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x29B92700\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x29B92700\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x27, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x23C34600\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x23C34600\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x28, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x1DCD6500\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x1DCD6500\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x29, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x17D78400\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x17D78400\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x2A, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_PSTATE", \r
+ 0x1F\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PREPARE_PSTATE", \r
+ 0x1F\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_PSTATE", \r
+ 0x1F\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ Return (GPCC) /* \_SB_.PEP0.G0MD.GPCC */\r
+ }\r
+\r
+ Method (G1MD, 0, NotSerialized)\r
+ {\r
+ Name (GPCC, Package (0x01)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.GPU0", \r
+ Package (0x0B)\r
+ {\r
+ "COMPONENT", \r
+ One, \r
+ Package (0x03)\r
+ {\r
+ "FSTATE", \r
+ Zero, \r
+ Package (0x08)\r
+ {\r
+ "ENTER", \r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ One, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gpu_cc_cxo_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gpu_cc_cx_gmu_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_gpu_memnoc_gfx_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gpu_cc_gx_gfx3d_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gpu_cc_cx_gmu_clk", \r
+ 0x03, \r
+ 0x0BEBC200, \r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_GFX3D", \r
+ "ICBID_SLAVE_EBI1", \r
+ One, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x06)\r
+ {\r
+ "ENTER", \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gpu_cc_gx_gfx3d_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_gpu_memnoc_gfx_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gpu_cc_cx_gmu_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gpu_cc_cxo_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ One, \r
+ 0x02\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "FSTATE", \r
+ 0x02, \r
+ Package (0x07)\r
+ {\r
+ "ENTER", \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_GFX3D", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gpu_cc_gx_gfx3d_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_gpu_memnoc_gfx_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gpu_cc_cx_gmu_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gpu_cc_cxo_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ One, \r
+ 0x02\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "INIT_FSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_FSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_FSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ One, \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ One, \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PREPARE_PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_PSTATE", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x08)\r
+ {\r
+ "PSTATE_SET", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "cx_gdsc", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "cx_gdsc", \r
+ 0x02\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PREPARE_PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_PSTATE", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "PSTATE_SET", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_PSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PREPARE_PSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_PSTATE", \r
+ One\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ Return (GPCC) /* \_SB_.PEP0.G1MD.GPCC */\r
+ }\r
+\r
+ Method (G2MD, 0, NotSerialized)\r
+ {\r
+ Name (GPCC, Package (0x01)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.GPU0", \r
+ Package (0x0C)\r
+ {\r
+ "COMPONENT", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x0B)\r
+ {\r
+ "ENTER", \r
+ Package (0x01)\r
+ {\r
+ "PSTATE_SAVE"\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x02, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x03, \r
+ 0x31\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_vsync_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_vsync_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_mdp_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_DISPLAY_CFG", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x09)\r
+ {\r
+ "EXIT", \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_DISPLAY_CFG", \r
+ 0x047868C0, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_mdp_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_vsync_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_vsync_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ "PSTATE_RESTORE"\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "FSTATE", \r
+ 0x02, \r
+ Package (0x0F)\r
+ {\r
+ "ENTER", \r
+ Package (0x01)\r
+ {\r
+ "PSTATE_SAVE"\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x02, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x03, \r
+ 0x31\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_vsync_clk", \r
+ 0x02\r
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+ }\r
+ }\r
+ }, \r
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+ Package (0x03)\r
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+ }\r
+ }, \r
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+ Package (0x03)\r
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+ 0xDE163F80, \r
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+ }\r
+ }\r
+ }, \r
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+ Package (0x03)\r
+ {\r
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+ }, \r
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+ {\r
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+ }, \r
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+ Package (0x03)\r
+ {\r
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+ "BUSARB", \r
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+ {\r
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+ "ICBID_SLAVE_EBI1", \r
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+ }\r
+ }, \r
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+ Package (0x03)\r
+ {\r
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+ }\r
+ }\r
+ }, \r
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+ {\r
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+ }\r
+ }\r
+ }, \r
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+ {\r
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+ 0x7D2B7500, \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
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+ {\r
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+ "ICBID_SLAVE_EBI1", \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ }, \r
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+ {\r
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+ }, \r
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+ Package (0x03)\r
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+ }, \r
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+ {\r
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+ }\r
+ }, \r
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+ Package (0x03)\r
+ {\r
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+ {\r
+ "BUSARB", \r
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+ {\r
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+ "ICBID_SLAVE_EBI1", \r
+ 0x59682F00, \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
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+ {\r
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+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ "BUSARB", \r
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+ {\r
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+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x4D7C6D00, \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x4190AB00, \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
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+ {\r
+ 0x03, \r
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+ "ICBID_SLAVE_EBI1", \r
+ 0x3B9ACA00, \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
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+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x35A4E900, \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x2C, \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x2FAF0800\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x2D, \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x29B92700, \r
+ 0x29B92700\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x2E, \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x23C34600, \r
+ 0x23C34600\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x2F, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x1DCD6500, \r
+ 0x1DCD6500\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x30, \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x17D78400, \r
+ 0x17D78400\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x31, \r
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+ {\r
+ "BUSARB", \r
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+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ Return (GPCC) /* \_SB_.PEP0.G2MD.GPCC */\r
+ }\r
+\r
+ Method (G3MD, 0, NotSerialized)\r
+ {\r
+ Name (GPCC, Package (0x01)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.GPU0", \r
+ Package (0x0C)\r
+ {\r
+ "COMPONENT", \r
+ 0x03, \r
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+ {\r
+ "FSTATE", \r
+ Zero\r
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+\r
+ Package (0x04)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x0C)\r
+ {\r
+ "ENTER", \r
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+ {\r
+ "PSTATE_SAVE"\r
+ }, \r
+\r
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+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x02, \r
+ 0x07\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
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+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_vsync_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_vsync_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_mdp_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rot_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
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+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x0B)\r
+ {\r
+ "EXIT", \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_DISPLAY_CFG", \r
+ 0x047868C0, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_mdp_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_vsync_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_vsync_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rot_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ "PSTATE_RESTORE"\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x02, \r
+ 0x04\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
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+ }\r
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+ }, \r
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+ }\r
+ }\r
+ }, \r
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+ }, \r
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+ }\r
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+ }, \r
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+ 0x000000010DC54780, \r
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+ }\r
+ }\r
+ }, \r
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+ Package (0x03)\r
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+ }\r
+ }, \r
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+ 0xDE163F80, \r
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+ }\r
+ }\r
+ }, \r
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+ Package (0x03)\r
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+ "BUSARB", \r
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+ {\r
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+ "ICBID_SLAVE_EBI1", \r
+ 0xAE673780, \r
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+ }\r
+ }\r
+ }, \r
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+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP1", \r
+ "ICBID_SLAVE_EBI1", \r
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+ }\r
+ }\r
+ }, \r
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+ Package (0x03)\r
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+ }, \r
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+ }\r
+ }\r
+ }, \r
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+ Package (0x03)\r
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+ "BUSARB", \r
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+ }\r
+ }\r
+ }, \r
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+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
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+ 0x7D2B7500, \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ "BUSARB", \r
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+ {\r
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+ "ICBID_SLAVE_EBI1", \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ "BUSARB", \r
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+ }, \r
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+ Package (0x03)\r
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+ "PSTATE", \r
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+ "BUSARB", \r
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+ {\r
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+ "ICBID_SLAVE_EBI1", \r
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+ }, \r
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+ Package (0x03)\r
+ {\r
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+ }, \r
+\r
+ Package (0x03)\r
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+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x5F5E1000, \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x25, \r
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+ {\r
+ "BUSARB", \r
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+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x59682F00, \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
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+ {\r
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+ "ICBID_MASTER_MDP1", \r
+ "ICBID_SLAVE_EBI1", \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
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+ {\r
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+ "ICBID_MASTER_MDP1", \r
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+ 0x4D7C6D00, \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ 0x47868C00, \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
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+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x4190AB00, \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x2A, \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x3B9ACA00, \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
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+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x35A4E900, \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x2C, \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x2FAF0800\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x2D, \r
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+ {\r
+ "BUSARB", \r
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+ {\r
+ 0x03, \r
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+ "ICBID_SLAVE_EBI1", \r
+ 0x29B92700, \r
+ 0x29B92700\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x2E, \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x23C34600, \r
+ 0x23C34600\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x2F, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x1DCD6500, \r
+ 0x1DCD6500\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x30, \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x17D78400, \r
+ 0x17D78400\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x31, \r
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+ {\r
+ "BUSARB", \r
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+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP1", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ Return (GPCC) /* \_SB_.PEP0.G3MD.GPCC */\r
+ }\r
+\r
+ Method (G4MD, 0, NotSerialized)\r
+ {\r
+ Name (GPCC, Package (0x01)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.GPU0", \r
+ Package (0x0C)\r
+ {\r
+ "COMPONENT", \r
+ 0x04, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x09)\r
+ {\r
+ "ENTER", \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec1_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec1_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec0_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec0_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ctl_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ctl_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_video_ahb_clk", \r
+ 0x02\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x09)\r
+ {\r
+ "EXIT", \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_video_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ctl_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ctl_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec0_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec0_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec1_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec1_core_clk", \r
+ One\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "FSTATE", \r
+ 0x02, \r
+ Package (0x13)\r
+ {\r
+ "ENTER", \r
+ Package (0x01)\r
+ {\r
+ "PSTATE_SAVE"\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x02, \r
+ 0x06\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x03, \r
+ 0x6E\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec1_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec1_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec0_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec0_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ctl_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ctl_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "vcodec1_gdsc", \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "vcodec1_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "vcodec0_gdsc", \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "vcodec0_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "venus_gdsc", \r
+ 0x02\r
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+ "ICBID_SLAVE_EBI1", \r
+ 0xA6E49C00, \r
+ 0xA6E49C00\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x61, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x9AF8DA00, \r
+ 0x9AF8DA00\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x62, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x8F0D1800, \r
+ 0x8F0D1800\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x63, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x83215600, \r
+ 0x83215600\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x64, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x77359400, \r
+ 0x77359400\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x65, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x6B49D200, \r
+ 0x6B49D200\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x66, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x5F5E1000, \r
+ 0x5F5E1000\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x67, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x53724E00, \r
+ 0x53724E00\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x68, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x47868C00, \r
+ 0x47868C00\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x69, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x3B9ACA00, \r
+ 0x3B9ACA00\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x6A, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x2FAF0800\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x6B, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x23C34600, \r
+ 0x23C34600\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x6C, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x17D78400, \r
+ 0x17D78400\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x6D, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x0BEBC200, \r
+ 0x0BEBC200\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x6E, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P0", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_PSTATE", \r
+ 0x6C\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PREPARE_PSTATE", \r
+ 0x6C\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_PSTATE", \r
+ 0x6C\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ Return (GPCC) /* \_SB_.PEP0.G4MD.GPCC */\r
+ }\r
+\r
+ Method (G5MD, 0, NotSerialized)\r
+ {\r
+ Name (GPCC, Package (0x01)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.GPU0", \r
+ Package (0x0A)\r
+ {\r
+ "COMPONENT", \r
+ 0x05, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "INIT_FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PREPARE_PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_PSTATE", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "PSTATE_SET", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PREPARE_PSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_PSTATE", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x06)\r
+ {\r
+ "PSTATE_SET", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PREPARE_PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_PSTATE", \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ Return (GPCC) /* \_SB_.PEP0.G5MD.GPCC */\r
+ }\r
+\r
+ Method (G6MD, 0, NotSerialized)\r
+ {\r
+ Name (GPCC, Package (0x01)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.GPU0", \r
+ Package (0x0C)\r
+ {\r
+ "COMPONENT", \r
+ 0x06, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x09)\r
+ {\r
+ "ENTER", \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec1_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec1_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec0_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec0_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ctl_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ctl_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_video_ahb_clk", \r
+ 0x02\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x09)\r
+ {\r
+ "EXIT", \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_video_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ctl_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ctl_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec0_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec0_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec1_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec1_core_clk", \r
+ One\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "FSTATE", \r
+ 0x02, \r
+ Package (0x13)\r
+ {\r
+ "ENTER", \r
+ Package (0x01)\r
+ {\r
+ "PSTATE_SAVE"\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x02, \r
+ 0x06\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x03, \r
+ 0x6E\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec1_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec1_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec0_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec0_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ctl_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ctl_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "vcodec1_gdsc", \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "vcodec1_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "vcodec0_gdsc", \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "vcodec0_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "venus_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_video_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_video_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_video_xo_clk", \r
+ 0x02\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x18)\r
+ {\r
+ "EXIT", \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_video_xo_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_video_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_video_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "venus_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "vcodec0_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "vcodec0_gdsc", \r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "vcodec1_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "vcodec1_gdsc", \r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ctl_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_venus_ctl_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec0_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec0_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec1_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "video_cc_vcodec1_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "video_cc_vcodec0_core_clk", \r
+ 0x09, \r
+ 0x12\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "video_cc_vcodec1_core_clk", \r
+ 0x09, \r
+ 0x12\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "video_cc_venus_ctl_core_clk", \r
+ 0x09, \r
+ 0x12\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "video_cc_vcodec0_core_clk", \r
+ 0x09, \r
+ 0x14\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
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+ }, \r
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+ }, \r
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+ Package (0x03)\r
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+ }, \r
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+ Package (0x03)\r
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+ }, \r
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+ Package (0x03)\r
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+ }, \r
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+ Package (0x03)\r
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+ Package (0x03)\r
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+ }, \r
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+ }, \r
+\r
+ Package (0x03)\r
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+ {\r
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+ "ICBID_MASTER_VIDEO_P1", \r
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+ 0x0000000141DD7600, \r
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+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
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+ "ICBID_MASTER_VIDEO_P1", \r
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+ 0x0000000135F1B400, \r
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+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
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+ {\r
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+ "ICBID_MASTER_VIDEO_P1", \r
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+ 0x000000012A05F200, \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
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+ {\r
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+ "ICBID_MASTER_VIDEO_P1", \r
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+ 0x000000011E1A3000, \r
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+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
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+ "ICBID_MASTER_VIDEO_P1", \r
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+ 0x00000001122E6E00, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
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+ {\r
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+ "ICBID_MASTER_VIDEO_P1", \r
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+ 0x000000010642AC00, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
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+ {\r
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+ }\r
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+ }, \r
+\r
+ Package (0x03)\r
+ {\r
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+ {\r
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+ "ICBID_MASTER_VIDEO_P1", \r
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+ 0xEE6B2800, \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
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+ {\r
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+ "ICBID_MASTER_VIDEO_P1", \r
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+ 0xE27F6600, \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
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+ {\r
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+ "ICBID_MASTER_VIDEO_P1", \r
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+ 0xD693A400, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
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+ "ICBID_MASTER_VIDEO_P1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0xCAA7E200, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0xBEBC2000, \r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0xB2D05E00, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
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+ "ICBID_MASTER_VIDEO_P1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0xA6E49C00, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
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+ {\r
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+ "ICBID_MASTER_VIDEO_P1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x9AF8DA00, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x8F0D1800, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x83215600, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x64, \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x77359400, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x65, \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x6B49D200, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
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+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x5F5E1000, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x53724E00, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x47868C00, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x69, \r
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+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x3B9ACA00, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x6A, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x6B, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x23C34600, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x6C, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x17D78400, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x6D, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x0BEBC200, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x6E, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_VIDEO_P1", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_PSTATE", \r
+ 0x6C\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PREPARE_PSTATE", \r
+ 0x6C\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_PSTATE", \r
+ 0x6C\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ Return (GPCC) /* \_SB_.PEP0.G6MD.GPCC */\r
+ }\r
+\r
+ Method (G7MD, 0, NotSerialized)\r
+ {\r
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+ 0x1DCD6500\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x1DCD6500\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x29, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x17D78400\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x17D78400\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x2A, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_PSTATE", \r
+ 0x1F\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PREPARE_PSTATE", \r
+ 0x1F\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_PSTATE", \r
+ 0x1F\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ Return (GPCC) /* \_SB_.PEP0.G7MD.GPCC */\r
+ }\r
+\r
+ Method (G8MD, 0, NotSerialized)\r
+ {\r
+ Name (GPCC, Package (0x01)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.GPU0", \r
+ Package (0x0B)\r
+ {\r
+ "COMPONENT", \r
+ 0x08, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x18)\r
+ {\r
+ "ENTER", \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x08)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO1_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ "HLOS_DRV", \r
+ "REQUIRED"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x08)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO24_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ "HLOS_DRV", \r
+ "REQUIRED"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x08)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO26_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ "HLOS_DRV", \r
+ "REQUIRED"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_mdp_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_vsync_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_vsync_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_dp_pixel_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_dp_link_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_dp_crypto_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_dp_aux_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_dp_link_intf_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb3_prim_clkref_en", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb_phy_cfg_ahb2phy_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ "PSTATE_SAVE"\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x02, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x03, \r
+ 0x2A\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_DISPLAY_CFG", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "mdss_core_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_xo_clk", \r
+ 0x02\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x16)\r
+ {\r
+ "EXIT", \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_xo_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "mdss_core_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_DISPLAY_CFG", \r
+ 0x047868C0, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb_phy_cfg_ahb2phy_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb3_prim_clkref_en", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_mdp_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_vsync_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_rscc_vsync_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_dp_pixel_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_dp_link_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_dp_crypto_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_dp_aux_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "disp_cc_mdss_dp_link_intf_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x08)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO26_A", \r
+ One, \r
+ 0x00124F80, \r
+ One, \r
+ 0x07, \r
+ Zero, \r
+ "HLOS_DRV", \r
+ "REQUIRED"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x08)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO24_A", \r
+ One, \r
+ 0x002EEBB8, \r
+ One, \r
+ 0x07, \r
+ Zero, \r
+ "HLOS_DRV", \r
+ "REQUIRED"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x08)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO1_A", \r
+ One, \r
+ 0x000D6D80, \r
+ One, \r
+ 0x07, \r
+ Zero, \r
+ "HLOS_DRV", \r
+ "REQUIRED"\r
+ }\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ "PSTATE_RESTORE"\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "INIT_FSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PREPARE_PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_PSTATE", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE_SET", \r
+ One, \r
+ Package (0x05)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_xo_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "mdss_core_gdsc", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "mdss_core_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_disp_xo_clk", \r
+ 0x02\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x12)\r
+ {\r
+ "PSTATE_SET", \r
+ 0x02, \r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "disp_cc_mdss_mdp_clk", \r
+ 0x03, \r
+ 0x19A14780, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_DISPLAY_CFG", \r
+ 0x11C31E80, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "disp_cc_mdss_mdp_clk", \r
+ 0x03, \r
+ 0x18964020, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_DISPLAY_CFG", \r
+ 0x11C31E80, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "disp_cc_mdss_mdp_clk", \r
+ 0x03, \r
+ 0x14810600, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_DISPLAY_CFG", \r
+ 0x08D24D00, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "disp_cc_mdss_mdp_clk", \r
+ 0x03, \r
+ 0x11E1A300, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_DISPLAY_CFG", \r
+ 0x08D24D00, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x04, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "disp_cc_mdss_mdp_clk", \r
+ 0x03, \r
+ 0x10642AC0, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_DISPLAY_CFG", \r
+ 0x08D24D00, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x05, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "disp_cc_mdss_mdp_clk", \r
+ 0x03, \r
+ 0x0BEBC200, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_DISPLAY_CFG", \r
+ 0x08D24D00, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x06, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "disp_cc_mdss_mdp_clk", \r
+ 0x03, \r
+ 0x0A37CADB, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_DISPLAY_CFG", \r
+ 0x047868C0, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x07, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "disp_cc_mdss_mdp_clk", \r
+ 0x03, \r
+ 0x09D5B340, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_DISPLAY_CFG", \r
+ 0x047868C0, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x08, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "disp_cc_mdss_mdp_clk", \r
+ 0x03, \r
+ 0x08F0D180, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
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+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x000000010642AC00\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x17, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000023C346000, \r
+ 0xEE6B2800\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0xEE6B2800\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x18, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000023C346000, \r
+ 0xD693A400\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0xD693A400\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x19, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000023C346000, \r
+ 0xBEBC2000\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0xBEBC2000\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x1A, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x00000001F4ADD400, \r
+ 0xA6E49C00\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0xA6E49C00\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x1B, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x00000001AD274800, \r
+ 0x8F0D1800\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x8F0D1800\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x1C, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x0000000165A0BC00, \r
+ 0x77359400\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x77359400\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x1D, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x5F5E1000\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x5F5E1000\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x1E, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x59682F00\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x59682F00\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x1F, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x53724E00\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x53724E00\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x20, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x4D7C6D00\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x4D7C6D00\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x21, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x47868C00\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x47868C00\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x22, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x4190AB00\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x4190AB00\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x23, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x3B9ACA00\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x3B9ACA00\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x24, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x35A4E900\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x35A4E900\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x25, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x2FAF0800\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x2FAF0800\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x26, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x29B92700\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x29B92700\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x27, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x23C34600\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x23C34600\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x28, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x1DCD6500\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x1DCD6500\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x29, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ 0x000000011E1A3000, \r
+ 0x17D78400\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x2FAF0800, \r
+ 0x17D78400\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x2A, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MDP0", \r
+ "ICBID_SLAVE_MNOC_HF_MEM_NOC", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_MNOC_HF_MEM_NOC", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_PSTATE", \r
+ 0x1F\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PREPARE_PSTATE", \r
+ 0x1F\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_PSTATE", \r
+ 0x1F\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ Return (GPCC) /* \_SB_.PEP0.G8MD.GPCC */\r
+ }\r
+\r
+ Method (G9MD, 0, NotSerialized)\r
+ {\r
+ Name (GPCC, Package (0x01)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.GPU0", \r
+ Package (0x06)\r
+ {\r
+ "COMPONENT", \r
+ 0x09, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "INIT_FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_FSTATE", \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ })\r
+ Return (GPCC) /* \_SB_.PEP0.G9MD.GPCC */\r
+ }\r
+ }\r
+\r
+ // BearSmmu\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ // BearSmmu Resources\r
+ //\r
+ Method (SMMD, 0, NotSerialized)\r
+ {\r
+ Return (SMMC) /* \_SB_.PEP0.SMMC */\r
+ }\r
+\r
+ Name (SMMC, Package (0x02)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.MMU0", \r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x03)\r
+ {\r
+ "FSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_hlos1_vote_mmu_tcu_clk", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_hlos1_vote_mmu_tcu_clk", \r
+ 0x02\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.MMU1", \r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x04)\r
+ {\r
+ "FSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "gcc_hlos1_vote_gpu_smmu_gds", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_hlos1_vote_gpu_smmu_clk", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_hlos1_vote_gpu_smmu_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "gcc_hlos1_vote_gpu_smmu_gds", \r
+ 0x02\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ // resources needed by oem drivers\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ // OEM\r
+ Method (OPMD, 0, NotSerialized)\r
+ {\r
+ Return (OPCC) /* \_SB_.PEP0.OPCC */\r
+ }\r
+\r
+ Name (OPCC, Package (0x04)\r
+ {\r
+ Package (0x04)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.PEN1", \r
+ Package (0x07)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x77, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO18_A", \r
+ One, \r
+ 0x001B7740, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ 0x14\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x15, \r
+ One, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ 0x78\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x06)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x15, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO18_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ 0x14\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x77, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.ACC1", \r
+ Package (0x04)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x0E, \r
+ One, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ 0x0A\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.ALS1", \r
+ Package (0x04)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x0E, \r
+ One, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ 0x0A\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.LED1", \r
+ Package (0x04)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "PMICGPIO", \r
+ Package (0x08)\r
+ {\r
+ "IOCTL_PM_GPIO_CONFIG_DIGITAL_OUTPUT", \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ 0x0A\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x03\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ // resources needed by subsystem drivers\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ // Subsystem Drivers\r
+ Method (SPMD, 0, NotSerialized)\r
+ {\r
+ Return (SPCC) /* \_SB_.PEP0.SPCC */\r
+ }\r
+\r
+ Name (SPCC, Package (0x04)\r
+ {\r
+ Package (0x05)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.AMSS", \r
+ Package (0x06)\r
+ {\r
+ "COMPONENT", \r
+ Zero, // Component 0.\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero // f0 state\r
+ }, \r
+\r
+ Package (0x0D)\r
+ {\r
+ "PSTATE", \r
+ Zero, // P0 state\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_boot_rom_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_mss_cfg_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_mss_q6_memnoc_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_mss_snoc_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_mss_mfab_axis_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_prng_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_mss_axis2_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS2_C", \r
+ 0x02, \r
+ 0x000B7980, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "NPARESOURCE", \r
+ Package (0x03)\r
+ {\r
+ One, \r
+ "/arc/client/rail_cx", \r
+ 0x0180\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "NPARESOURCE", \r
+ Package (0x03)\r
+ {\r
+ One, \r
+ "/arc/client/rail_mx", \r
+ 0x0180\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x06)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_IPA_CORE", \r
+ "ICBID_SLAVE_IPA_CORE", \r
+ 0x9218, \r
+ Zero, \r
+ "HLOS_DRV"\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_prng_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS2_C", \r
+ 0x02, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "NPARESOURCE", \r
+ Package (0x03)\r
+ {\r
+ One, \r
+ "/arc/client/rail_cx", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "NPARESOURCE", \r
+ Package (0x03)\r
+ {\r
+ One, \r
+ "/arc/client/rail_mx", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x06)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_IPA_CORE", \r
+ "ICBID_SLAVE_IPA_CORE", \r
+ Zero, \r
+ Zero, \r
+ "HLOS_DRV"\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_boot_rom_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_prng_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS2_C", \r
+ 0x02, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.ADSP", \r
+ Package (0x05)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.SCSS", \r
+ Package (0x06)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x06)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x0E, \r
+ One, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO27_A", \r
+ One, \r
+ Zero, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO4_A", \r
+ One, \r
+ Zero, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_CLK_CTL", \r
+ One, \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO27_A", \r
+ One, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO4_A", \r
+ One, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_CLK_CTL", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO27_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO4_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_CLK_CTL", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.CDSP", \r
+ Package (0x05)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x03\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ // resources needed by pep drivers\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ Method (PPMD, 0, NotSerialized)\r
+ {\r
+ Return (PPCC) /* \_SB_.PEP0.PPCC */\r
+ }\r
+\r
+ Name (PPCC, Package (0x03)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.PRXY", \r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ // PEP Stats Driver\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.STAT", \r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "DEVICE", \r
+ 0x81, \r
+ "\\_SB.GIO0", \r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ })\r
+#if 0\r
+ // System Default Resources Packages\r
+ Name (SDFR, Package (0x01)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.SDFR", \r
+ Package (0x06)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ 0x03\r
+ }\r
+ }\r
+ }\r
+ })\r
+#endif\r
+ }\r
+//#endif\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ // System Default Resources Packages\r
+ Name (SDFR, Package (0x01)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.SDFR", \r
+ Package (0x06)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ 0x03\r
+ }\r
+ }\r
+ }\r
+ })\r
+#if 0\r
+ Method (BPMD, 0, NotSerialized)\r
+ {\r
+ Return (BPCC) /* \_SB_.PEP0.BPCC */\r
+ }\r
+#endif\r
+\r
+ Method (LPMD, 0, NotSerialized)\r
+ {\r
+ Return (LPCC) /* \_SB_.PEP0.LPCC */\r
+ }\r
+\r
+ // resources needed by core BSP drivers\r
+ Name (BPCC, Package (0x04)\r
+ {\r
+ // Storage\r
+ Package (0x05)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.UFS0", \r
+ Package (0x07)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x05)\r
+ {\r
+ "FSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x02, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x02, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ One, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ Zero, \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "ufs_phy_gdsc", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "ufs_phy_gdsc", \r
+ 0x02\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE_SET", \r
+ One, \r
+ Package (0x0C)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_ufs_phy_axi_clk", \r
+ 0x08, \r
+ 0x0BEBC200, \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_ufs_phy_unipro_core_clk", \r
+ 0x08, \r
+ 0x08F0D180, \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_ufs_phy_ice_core_clk", \r
+ 0x08, \r
+ 0x11E1A300, \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_aggre_ufs_phy_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_ufs_phy_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_ufs_phy_phy_aux_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_ufs_phy_tx_symbol_0_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
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+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_USB3_0", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "NPARESOURCE", \r
+ Package (0x03)\r
+ {\r
+ One, \r
+ "/arc/client/rail_cx", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO24_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO12_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO26_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO1_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_DSTATE", \r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ Package (0x08)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.USB1", \r
+ Package (0x05)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb30_sec_sleep_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb30_sec_sleep_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb30_sec_sleep_clk", \r
+ 0x09, \r
+ 0x0C\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb3_sec_phy_pipe_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x03)\r
+ {\r
+ "gcc_usb3_sec_phy_pipe_clk", \r
+ 0x09, \r
+ 0x08\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PRELOAD_PSTATE", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x11)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO12_A", \r
+ One, \r
+ 0x001B7740, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO24_A", \r
+ One, \r
+ 0x002EEBB8, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO26_A", \r
+ One, \r
+ 0x00124F80, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO1_A", \r
+ One, \r
+ 0x000D6D80, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "usb30_sec_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_aggre_usb3_sec_axi_clk", \r
+ 0x08, \r
+ 0x78, \r
+ 0x09\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_cfg_noc_usb3_sec_axi_clk", \r
+ 0x08, \r
+ 0x78, \r
+ 0x09\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_usb30_sec_master_clk", \r
+ 0x08, \r
+ 0x78, \r
+ 0x09\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_usb30_sec_mock_utmi_clk", \r
+ 0x08, \r
+ 0x4B00, \r
+ 0x07\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_usb3_sec_phy_aux_clk", \r
+ 0x08, \r
+ 0x04B0, \r
+ 0x07\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_USB3_1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x28000000, \r
+ 0x28000000\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "NPARESOURCE", \r
+ Package (0x03)\r
+ {\r
+ One, \r
+ "/arc/client/rail_cx", \r
+ 0x0100\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_USB3_1", \r
+ 0x17D78400, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb_phy_cfg_ahb2phy_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb3_sec_clkref_en", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x11)\r
+ {\r
+ "DSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_usb30_sec_master_clk", \r
+ 0x03, \r
+ 0x2580, \r
+ 0x05\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb30_sec_master_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_cfg_noc_usb3_sec_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_aggre_usb3_sec_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb30_sec_mock_utmi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_USB3_1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb_phy_cfg_ahb2phy_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb3_sec_phy_aux_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb3_sec_clkref_en", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_USB3_1", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "NPARESOURCE", \r
+ Package (0x03)\r
+ {\r
+ One, \r
+ "/arc/client/rail_cx", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO12_A", \r
+ One, \r
+ 0x001B7740, \r
+ One, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO24_A", \r
+ One, \r
+ 0x002EEBB8, \r
+ One, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO26_A", \r
+ One, \r
+ 0x00124F80, \r
+ One, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO1_A", \r
+ One, \r
+ 0x000D6D80, \r
+ One, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x12)\r
+ {\r
+ "DSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_usb30_sec_master_clk", \r
+ 0x03, \r
+ 0x00927C00, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb30_sec_master_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_cfg_noc_usb3_sec_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_aggre_usb3_sec_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb30_sec_mock_utmi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb3_sec_phy_aux_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_USB3_1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb_phy_cfg_ahb2phy_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb3_sec_clkref_en", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "usb30_sec_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_USB3_1", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "NPARESOURCE", \r
+ Package (0x03)\r
+ {\r
+ One, \r
+ "/arc/client/rail_cx", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO12_A", \r
+ One, \r
+ 0x001B7740, \r
+ One, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO24_A", \r
+ One, \r
+ 0x002EEBB8, \r
+ One, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO26_A", \r
+ One, \r
+ 0x00124F80, \r
+ One, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO1_A", \r
+ One, \r
+ 0x000D6D80, \r
+ One, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x12)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_usb30_sec_master_clk", \r
+ 0x03, \r
+ 0x00927C00, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb30_sec_master_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_cfg_noc_usb3_sec_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_aggre_usb3_sec_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb30_sec_mock_utmi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb3_sec_phy_aux_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_USB3_1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb_phy_cfg_ahb2phy_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_usb3_sec_clkref_en", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "usb30_sec_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_USB3_1", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "NPARESOURCE", \r
+ Package (0x03)\r
+ {\r
+ One, \r
+ "/arc/client/rail_cx", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO24_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO12_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO26_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO1_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_DSTATE", \r
+ 0x03\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ // resources needed by ipa driver\r
+ //===========================================================================\r
+ // Implementation of function states for IPA driver.\r
+ // Present implementation has two function states F0 and F1.\r
+ //\r
+ // F0 = Full power mode.\r
+ // F1 = Low power mode.\r
+ //\r
+ // Resource being managed is /clk/ipa\r
+ //===========================================================================\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ Method (IPMD, 0, NotSerialized)\r
+ {\r
+ Return (IPSC) /* \_SB_.PEP0.IPSC */\r
+ }\r
+\r
+ Name (IPSC, Package (0x01)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.IPA", \r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x03)\r
+ {\r
+ "FSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x06)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_IPA_CORE", \r
+ "ICBID_SLAVE_IPA_CORE", \r
+ 0x9218, \r
+ Zero, \r
+ "HLOS_DRV"\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x06)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_IPA_CORE", \r
+ "ICBID_SLAVE_IPA_CORE", \r
+ Zero, \r
+ Zero, \r
+ "HLOS_DRV"\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ Method (EWMD, 0, NotSerialized)\r
+ {\r
+ Return (WBRC) /* \_SB_.PEP0.WBRC */\r
+ }\r
+\r
+ Name (WBRC, Package (0x03)\r
+ {\r
+ Package (0x07)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.AMSS.QWLN", \r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS7_A", \r
+ 0x02, \r
+ 0x000FAFA0, \r
+ One, \r
+ 0x06, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO5_A", \r
+ One, \r
+ 0x000C3500, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO7_A", \r
+ One, \r
+ 0x001B7740, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO17_A", \r
+ One, \r
+ 0x0013E5C0, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO25_A", \r
+ One, \r
+ 0x002F5D00, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO25_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO17_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO7_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO5_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS7_A", \r
+ 0x02, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO25_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO17_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO7_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO5_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS7_A", \r
+ 0x02, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ABANDON_DSTATE", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.COEX", \r
+ Package (0x05)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS7_A", \r
+ 0x02, \r
+ 0x000FAFA0, \r
+ One, \r
+ 0x06, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO5_A", \r
+ One, \r
+ 0x000C3500, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO7_A", \r
+ One, \r
+ 0x001B7740, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO17_A", \r
+ One, \r
+ 0x0013E5C0, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO25_A", \r
+ One, \r
+ 0x002F5D00, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO25_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO17_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO7_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO5_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS7_A", \r
+ 0x02, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.BTH0", \r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS3_A", \r
+ 0x02, \r
+ 0x0014A140, \r
+ One, \r
+ 0x06, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS5_A", \r
+ 0x02, \r
+ 0x001F20C0, \r
+ One, \r
+ 0x06, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO7_A", \r
+ One, \r
+ 0x001B7740, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO17_A", \r
+ One, \r
+ 0x0013E5C0, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO25_A", \r
+ One, \r
+ 0x002F5D00, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO7_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO17_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO25_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS3_A", \r
+ 0x02, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_SMPS5_A", \r
+ 0x02, \r
+ Zero, \r
+ Zero, \r
+ 0x05, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ // power management resources needed by qdss driver\r
+ //===========================================================================\r
+ // Description & Possible use cases for Qdss's p-state implementation\r
+ // Qdss employs pstate-sets to robustly configure clock and tlmm registers\r
+ // pstate-set 0 has pstates for clock frequencies\r
+ // pstate-set 1 has pstates for managing tlmm registers for tpiu operation\r
+ // TPIU related data sourced from meta build's std_trace_msm8994.cmm; it can also\r
+ // be verified through TLMM GPIO assignment in ipcat and TLMM_GPIO_CFGn register\r
+ // bit assignments as documented in SWI. \r
+ // NOTE: elessar V1 and V2 have different TLMM GPIO pin/function assignments, so\r
+ // register values should be updated for V2.\r
+ //========================================================\r
+ // Sinks p-states allowed\r
+ //--------------------------------------------------------\r
+ // non-TPIU P{0,0}\r
+ // P{0,1}\r
+ // P{0,2}\r
+ // P{0,3}\r
+ // TPIU P{0,0} AND (P{1,1} OR P{1,3})\r
+ // P{0,1} AND (P{1,0} OR P{1,2})\r
+ // P{0,2} AND (P{1,0} OR P{1,2})\r
+ // P{0,3} AND (P{1,0} OR P{1,2})\r
+ //\r
+ // Description of pstate-sets and corresponding p-states :\r
+ // pstate-set-0 is the set with allowed qdss clock frequencies\r
+ // under set-0 each p-state holds the following meaning:\r
+ // pstate-0 CLOCK OFF (0 Hz)\r
+ // pstate-1 SVS CLOCK FREQUENCY (depends on the voltage; ranges 150 to 300 MHz)\r
+ // pstate-2 HIGH CLOCK FREQUENCY (300 MHz)\r
+ // pstate-3 LOW CLOCK FREQUENCY (150 MHz)\r
+ //\r
+ // under set-1 each p-state hold the following meaning:\r
+ // pstate-0 sets SET-B TLMM registers to make TPIU operational\r
+ // pstate-1 clears SET-B TLMM registers to make TPIU operational\r
+ // pstate-2 sets SD TLMM registers to make TPIU operational\r
+ // pstate-3 clears SD TLMM registers to make TPIU operational\r
+ //===========================================================================\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ Method (QDMD, 0, NotSerialized)\r
+ {\r
+ Return (QDSC) /* \_SB_.PEP0.QDSC */\r
+ }\r
+\r
+ Name (QDSC, Package (0x01)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.QDSS", \r
+ Package (0x08)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x06)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "NPARESOURCE", \r
+ Package (0x03)\r
+ {\r
+ One, \r
+ "/clk/qdss", \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "NPARESOURCE", \r
+ Package (0x03)\r
+ {\r
+ One, \r
+ "/clk/qdss", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "NPARESOURCE", \r
+ Package (0x03)\r
+ {\r
+ One, \r
+ "/clk/qdss", \r
+ 0x02\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "NPARESOURCE", \r
+ Package (0x03)\r
+ {\r
+ One, \r
+ "/clk/qdss", \r
+ 0x03\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x06)\r
+ {\r
+ "PSTATE_SET", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE", \r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE_SET", \r
+ 0x02, \r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "NPARESOURCE", \r
+ Package (0x03)\r
+ {\r
+ One, \r
+ "/clk/qdss", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "NPARESOURCE", \r
+ Package (0x03)\r
+ {\r
+ One, \r
+ "/clk/qdss", \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE_SET", \r
+ 0x03, \r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "TLMMPORT", \r
+ Package (0x03)\r
+ {\r
+ 0x00033000, \r
+ 0x07FF, \r
+ 0x01C8\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ Method (PEMD, 0, NotSerialized)\r
+ {\r
+ Return (PEMC) /* \_SB_.PEP0.PEMC */\r
+ }\r
+\r
+ Name (PEMC, Package (0x04)\r
+ {\r
+ Package (0x07)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.PCI0", \r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x10)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO26_A", \r
+ One, \r
+ 0x00124F80, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO1_A", \r
+ One, \r
+ 0x000D6D80, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "pcie_0_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_PCIE_0_CFG", \r
+ 0x047868C0, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_PCIE_0", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x17D78400, \r
+ 0x0BEBC200\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_aggre_noc_pcie_tbu_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_phy_refgen_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_phy_aux_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_0_pipe_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_0_slv_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_0_slv_q2a_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_0_mstr_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_0_cfg_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_pcie_0_aux_clk", \r
+ 0x08, \r
+ 0x0124F800, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x10)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_0_pipe_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_0_aux_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_0_slv_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_0_slv_q2a_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_0_mstr_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_0_cfg_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_aggre_noc_pcie_tbu_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_phy_refgen_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_phy_aux_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_PCIE_0_CFG", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_PCIE_0", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "pcie_0_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO26_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO1_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.PCI0.RP1", \r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.PCI1", \r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x10)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO26_A", \r
+ One, \r
+ 0x00124F80, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO1_A", \r
+ One, \r
+ 0x000D6D80, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "pcie_1_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_PCIE_1_CFG", \r
+ 0x047868C0, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_PCIE_1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x17D78400, \r
+ 0x0BEBC200\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_aggre_noc_pcie_tbu_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_phy_refgen_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_phy_aux_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_1_pipe_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_1_slv_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_1_slv_q2a_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_1_mstr_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_1_cfg_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_pcie_1_aux_clk", \r
+ 0x08, \r
+ 0x0124F800, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x10)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_1_pipe_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_1_aux_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_1_slv_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_1_slv_q2a_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_1_mstr_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_1_cfg_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_aggre_noc_pcie_tbu_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_phy_refgen_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_pcie_phy_aux_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_PCIE_1_CFG", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_PCIE_1", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "pcie_1_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO26_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO1_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.PCI1.RP1", \r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x03\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ // resources needed by camera drivers\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ Method (CPMX, 0, NotSerialized)\r
+ {\r
+ Return (CPXC) /* \_SB_.PEP0.CPXC */\r
+ }\r
+\r
+ Name (CPXC, Package (0x04)\r
+ {\r
+ Package (0x05)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.CAMP", \r
+ Package (0x07)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x0D)\r
+ {\r
+ "FSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_xo_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "titan_top_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ One, \r
+ 0x23\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x02, \r
+ 0x23\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_soc_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cpas_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_camnoc_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cci_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x0C)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cci_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_camnoc_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cpas_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_soc_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ 0x02, \r
+ 0x25\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ One, \r
+ 0x25\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "titan_top_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_xo_clk", \r
+ 0x02\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_cci_clk", \r
+ 0x03, \r
+ 0x023C3460, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_cci_clk", \r
+ 0x03, \r
+ 0x0124F800, \r
+ 0x03\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x28)\r
+ {\r
+ "PSTATE_SET", \r
+ One, \r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_CAMNOC_SF_UNCOMP", \r
+ "ICBID_SLAVE_CAMNOC_UNCOMP", \r
+ 0x00000002CB417800, \r
+ 0x00000002CB417800\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_CAMNOC_SF_UNCOMP", \r
+ "ICBID_SLAVE_CAMNOC_UNCOMP", \r
+ 0x00000002AD741300, \r
+ 0x00000002AD741300\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_CAMNOC_SF_UNCOMP", \r
+ "ICBID_SLAVE_CAMNOC_UNCOMP", \r
+ 0x000000028FA6AE00, \r
+ 0x000000028FA6AE00\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_CAMNOC_SF_UNCOMP", \r
+ "ICBID_SLAVE_CAMNOC_UNCOMP", \r
+ 0x0000000271D94900, \r
+ 0x0000000271D94900\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x04, \r
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+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_CAMNOC_SF_UNCOMP", \r
+ "ICBID_SLAVE_CAMNOC_UNCOMP", \r
+ 0x11E1A300, \r
+ 0x11E1A300\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_CAMNOC_SF_UNCOMP", \r
+ "ICBID_SLAVE_CAMNOC_UNCOMP", \r
+ 0x0BEBC200, \r
+ 0x0BEBC200\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x04, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_CAMNOC_SF_UNCOMP", \r
+ "ICBID_SLAVE_CAMNOC_UNCOMP", \r
+ 0x05F5E100, \r
+ 0x05F5E100\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x05, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_CAMNOC_SF_UNCOMP", \r
+ "ICBID_SLAVE_CAMNOC_UNCOMP", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x08)\r
+ {\r
+ "PSTATE_SET", \r
+ 0x03, \r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_CAMNOC_SF", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x4190AB00, \r
+ 0x4190AB00\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_CAMNOC_SF", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x17D78400, \r
+ 0x17D78400\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_CAMNOC_SF", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x11E1A300, \r
+ 0x11E1A300\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_CAMNOC_SF", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x0BEBC200, \r
+ 0x0BEBC200\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x04, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_CAMNOC_SF", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x05F5E100, \r
+ 0x05F5E100\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x05, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_CAMNOC_SF", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.CAMS", \r
+ Package (0x19)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_xo_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "titan_top_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_soc_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cpas_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_camnoc_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO16_A", \r
+ One, \r
+ 0x001B7740, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x5F, \r
+ One, \r
+ Zero, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x5B, \r
+ One, \r
+ Zero, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x04)\r
+ {\r
+ "PPP_RESOURCE_ID_LVS1_A", \r
+ 0x04, \r
+ 0x001B7740, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x11, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x12, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO19_A", \r
+ One, \r
+ 0x002AB980, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x19, \r
+ One, \r
+ Zero, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_mclk0_clk", \r
+ 0x08, \r
+ 0x016E3600, \r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x0D, \r
+ One, \r
+ One, \r
+ One, \r
+ Zero, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x1A)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x0D, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_mclk0_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO19_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x19, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x04)\r
+ {\r
+ "PPP_RESOURCE_ID_LVS1_A", \r
+ 0x04, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x5B, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x12, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x11, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x5F, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO16_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_camnoc_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cpas_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_soc_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "titan_top_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_xo_clk", \r
+ 0x02\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.CAMF", \r
+ Package (0x17)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_xo_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "titan_top_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_soc_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cpas_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_camnoc_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO16_A", \r
+ One, \r
+ 0x001B7740, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x81, \r
+ One, \r
+ Zero, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x7F, \r
+ One, \r
+ Zero, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x13, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x14, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x04)\r
+ {\r
+ "PPP_RESOURCE_ID_LVS2_A", \r
+ 0x04, \r
+ 0x001B7740, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x0C, \r
+ One, \r
+ Zero, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_mclk2_clk", \r
+ 0x08, \r
+ 0x016E3600, \r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x0F, \r
+ One, \r
+ One, \r
+ One, \r
+ Zero, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x18)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x0F, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_mclk2_clk", \r
+ 0x0C, \r
+ Zero, \r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x0C, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x04)\r
+ {\r
+ "PPP_RESOURCE_ID_LVS2_A", \r
+ 0x04, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x7F, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x14, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x13, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x81, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO16_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_camnoc_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cpas_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_soc_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "titan_top_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_xo_clk", \r
+ 0x02\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.CAMI", \r
+ Package (0x15)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_xo_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "titan_top_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_soc_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cpas_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_camnoc_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICGPIO", \r
+ Package (0x08)\r
+ {\r
+ "IOCTL_PM_GPIO_CONFIG_DIGITAL_OUTPUT", \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x04)\r
+ {\r
+ "PPP_RESOURCE_ID_LVS1_A", \r
+ 0x04, \r
+ 0x001B7740, \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO22_A", \r
+ One, \r
+ 0x002AB980, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x17, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x17, \r
+ One, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_mclk2_clk", \r
+ 0x08, \r
+ 0x016E3600, \r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x12)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_mclk2_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x17, \r
+ One, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x17, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO22_A", \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x04)\r
+ {\r
+ "PPP_RESOURCE_ID_LVS1_A", \r
+ 0x04, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PMICGPIO", \r
+ Package (0x08)\r
+ {\r
+ "IOCTL_PM_GPIO_CONFIG_DIGITAL_OUTPUT", \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_camnoc_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cpas_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_soc_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "titan_top_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_xo_clk", \r
+ 0x02\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ // CAMERA\r
+ Method (CPMD, 0, NotSerialized)\r
+ {\r
+ Return (CPCC) /* \_SB_.PEP0.CPCC */\r
+ }\r
+\r
+ Name (CPCC, Package (0x03)\r
+ {\r
+ Package (0x04)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.JPGE", \r
+ Package (0x05)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x0B)\r
+ {\r
+ "FSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_xo_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "titan_top_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_soc_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cpas_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_camnoc_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_jpeg_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ Zero, \r
+ 0x02\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_jpeg_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_camnoc_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cpas_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_soc_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "titan_top_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_xo_clk", \r
+ 0x02\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x06)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_jpeg_clk", \r
+ 0x03, \r
+ 0x23C34600, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_jpeg_clk", \r
+ 0x03, \r
+ 0x23C34600, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_jpeg_clk", \r
+ 0x03, \r
+ 0x18148D00, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_jpeg_clk", \r
+ 0x03, \r
+ 0x0BEBC200, \r
+ 0x03\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "COMPONENT", \r
+ One, \r
+ Package (0x0B)\r
+ {\r
+ "FSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_xo_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "titan_top_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_soc_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cpas_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_camnoc_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_jpeg_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ Zero, \r
+ 0x02\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_jpeg_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_camnoc_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cpas_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_soc_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "titan_top_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_xo_clk", \r
+ 0x02\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_jpeg_clk", \r
+ 0x03, \r
+ 0x23C34600, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_jpeg_clk", \r
+ 0x03, \r
+ 0x23C34600, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_jpeg_clk", \r
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+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_ipe_1_clk", \r
+ 0x03, \r
+ 0x1C9C3800, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_ipe_1_clk", \r
+ 0x03, \r
+ 0x18148D00, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_ipe_1_clk", \r
+ 0x03, \r
+ Zero, \r
+ 0x03\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "COMPONENT", \r
+ 0x05, \r
+ Package (0x10)\r
+ {\r
+ "FSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_xo_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "titan_top_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_soc_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cpas_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_camnoc_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "bps_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_bps_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_bps_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ Zero, \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_bps_areg_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_bps_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "bps_gdsc", \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x10)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "bps_gdsc", \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_bps_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_bps_areg_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ Zero, \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_bps_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_bps_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "bps_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_camnoc_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cpas_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_soc_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "titan_top_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_xo_clk", \r
+ 0x02\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x06)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_bps_clk", \r
+ 0x03, \r
+ 0x23C34600, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_bps_clk", \r
+ 0x03, \r
+ 0x1C9C3800, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_bps_clk", \r
+ 0x03, \r
+ 0x18148D00, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_bps_clk", \r
+ 0x03, \r
+ Zero, \r
+ 0x03\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "COMPONENT", \r
+ 0x06, \r
+ Package (0x0B)\r
+ {\r
+ "FSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_xo_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "titan_top_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_soc_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cpas_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_camnoc_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_lrme_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ Zero, \r
+ 0x02\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x0B)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ Zero, \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_lrme_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_camnoc_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cpas_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_soc_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "titan_top_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_xo_clk", \r
+ 0x02\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x06)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_lrme_clk", \r
+ 0x03, \r
+ 0x17D78400, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_lrme_clk", \r
+ 0x03, \r
+ 0x1312D000, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_lrme_clk", \r
+ 0x03, \r
+ 0x10089D40, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_lrme_clk", \r
+ 0x03, \r
+ Zero, \r
+ 0x03\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "COMPONENT", \r
+ 0x07, \r
+ Package (0x0B)\r
+ {\r
+ "FSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_xo_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "titan_top_gdsc", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_soc_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cpas_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_camnoc_axi_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_fd_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ Zero, \r
+ 0x02\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x0B)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "PSTATE_ADJUST", \r
+ Package (0x02)\r
+ {\r
+ Zero, \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_fd_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_camnoc_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_cpas_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "cam_cc_soc_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_axi_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "FOOTSWITCH", \r
+ Package (0x02)\r
+ {\r
+ "titan_top_gdsc", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_camera_xo_clk", \r
+ 0x02\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x06)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_fd_core_clk", \r
+ 0x03, \r
+ 0x23C34600, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_fd_core_clk", \r
+ 0x03, \r
+ 0x20113A80, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_fd_core_clk", \r
+ 0x03, \r
+ 0x17D78400, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "cam_cc_fd_core_clk", \r
+ 0x03, \r
+ Zero, \r
+ 0x03\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ // resources needed by touch driver\r
+ Scope (\_SB.PEP0)\r
+ {\r
+//#if 0\r
+ Method (LPMX, 0, NotSerialized)\r
+ {\r
+ Return (LPXC) /* \_SB_.PEP0.LPXC */\r
+ }\r
+//#endif\r
+\r
+ Name (LPXC, Package (0x01)\r
+ {\r
+ Package (0x04)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.TSC1", \r
+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ // TSC1 Fajita: enable the 2.8V regulator on LDO28_A\r
+ Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO28_A", \r
+ One, \r
+ 2856000, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ },\r
+ // Delay 10ms\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ 10000\r
+ }\r
+ }, \r
+ // enable the v1p8 GPIO\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 88, \r
+ One, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+ // enable the 2v8 GPIO\r
+ // not actually a thing on fajita\r
+ // no 1v8 i2c regulator either\r
+ \r
+ // sleep 10ms\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ 10000\r
+ }\r
+ }, \r
+\r
+ // reset the device\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 99, \r
+ One, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+ \r
+ // sleep 10ms\r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ 10000\r
+ }\r
+ }, \r
+ \r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 99, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+ \r
+ Package (0x02)\r
+ {\r
+ "DELAY", \r
+ Package (0x01)\r
+ {\r
+ 10000\r
+ }\r
+ }, \r
+ \r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 99, \r
+ One, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ // set reset low\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 99, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }, \r
+ },\r
+ \r
+ // set v1p8 low\r
+ Package (0x02)\r
+ {\r
+ // set reset low\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 88, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero\r
+ }, \r
+ },\r
+ \r
+ // disable the 2.8V regulator\r
+ /*Package (0x02)\r
+ {\r
+ "PMICVREGVOTE", \r
+ Package (0x06)\r
+ {\r
+ "PPP_RESOURCE_ID_LDO28_A", \r
+ One, \r
+ 2856000, \r
+ One, \r
+ 0x07, \r
+ Zero\r
+ }\r
+ },*/\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ // Bus Access Modules (BAM)\r
+ Device (BAM1)\r
+ {\r
+ Name (_HID, "QCOM0213") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x01DC4000, // Address Base\r
+ 0x00024000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000130,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.BAM1._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (BAM5)\r
+ {\r
+ Name (_HID, "QCOM0213") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, 0x05) // _UID: Unique ID\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x17184000, // Address Base\r
+ 0x00032000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000C4,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.BAM5._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (BAM6)\r
+ {\r
+ Name (_HID, "QCOM0213") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, 0x06) // _UID: Unique ID\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x17204000, // Address Base\r
+ 0x00026000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000144,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.BAM6._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (BAM7)\r
+ {\r
+ Name (_HID, "QCOM0213") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, 0x07) // _UID: Unique ID\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x08884000, // Address Base\r
+ 0x00023000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000009A,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.BAM7._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (BAMD)\r
+ {\r
+ Name (_HID, "QCOM0213") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, 0x0D) // _UID: Unique ID\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0A904000, // Address Base\r
+ 0x00017000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000A9,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.BAMD._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (BAME)\r
+ {\r
+ Name (_HID, "QCOM0213") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, 0x0E) // _UID: Unique ID\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x06064000, // Address Base\r
+ 0x00015000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000C7,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.BAME._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (BAMF)\r
+ {\r
+ Name (_HID, "QCOM0213") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, 0x0F) // _UID: Unique ID\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0A704000, // Address Base\r
+ 0x00017000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000A4,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.BAMF._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (UAR7)\r
+ {\r
+ Name (_HID, "QCOM0236") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, 0x07) // _UID: Unique ID\r
+ Name (_DEP, Package (0x01) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x00898000, // Address Base\r
+ 0x00004000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000027F,\r
+ }\r
+ GpioInt (Edge, ActiveLow, Exclusive, PullDown, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0030\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.UAR7._CRS.RBUF */\r
+ }\r
+\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0B)\r
+ }\r
+ }\r
+\r
+ Device (UARD)\r
+ {\r
+ Name (_HID, "QCOM0236") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, 0x0A) // _UID: Unique ID\r
+ Name (_DEP, Package (0x01) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x00A84000, // Address Base\r
+ 0x00004000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000182,\r
+ }\r
+ GpioInt (Edge, ActiveLow, Exclusive, PullDown, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0005\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.UARD._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (I2C1)\r
+ {\r
+ Name (_HID, "QCOM0220") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.QGP0\r
+ })\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x00880000, // Address Base\r
+ 0x00004000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000279,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.I2C1._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (I2C3)\r
+ {\r
+ Name (_HID, "QCOM0220") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, 0x03) // _UID: Unique ID\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.QGP0\r
+ })\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x00888000, // Address Base\r
+ 0x00004000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000027B,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.I2C3._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (I2C4)\r
+ {\r
+ Name (_HID, "QCOM0220") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, 0x04) // _UID: Unique ID\r
+ Name (_DEP, Package (0x01) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0//, \r
+ //\_SB.QGP0\r
+ })\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0088C000, // Address Base\r
+ 0x00004000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000027C,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.I2C4._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (I2C5)\r
+ {\r
+ Name (_HID, "QCOM0220") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, 0x05) // _UID: Unique ID\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.QGP0\r
+ })\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x00890000, // Address Base\r
+ 0x00004000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000027D,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.I2C5._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (I2C8)\r
+ {\r
+ Name (_HID, "QCOM0220") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, 0x08) // _UID: Unique ID\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.QGP0\r
+ })\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0089C000, // Address Base\r
+ 0x00004000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000280,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.I2C8._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (IC11)\r
+ {\r
+ Name (_HID, "QCOM0220") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, 0x0B) // _UID: Unique ID\r
+ Name (_DEP, Package (0x01) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0//, \r
+ //\_SB.QGP0\r
+ })\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x00A88000, // Address Base\r
+ 0x00004000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000183,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.IC11._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (IC12)\r
+ {\r
+ Name (_HID, "QCOM0220") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, 0x0C) // _UID: Unique ID\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.QGP0\r
+ })\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x00A8C000, // Address Base\r
+ 0x00004000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000184,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.IC12._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (IC13)\r
+ {\r
+ Name (_HID, "QCOM0220") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, 0x0D) // _UID: Unique ID\r
+ Name (_DEP, Package (0x01) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x00A90000, // Address Base\r
+ 0x00004000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000185,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.IC13._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (IC15)\r
+ {\r
+ Name (_HID, "QCOM0220") // _HID: Hardware ID\r
+ Name (_UID, 0x0F) // _UID: Unique ID\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.QGP0\r
+ })\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x00A98000, // Address Base\r
+ 0x00004000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000187,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.IC15._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (IC16)\r
+ {\r
+ Name (_HID, "QCOM0220") // _HID: Hardware ID\r
+ Name (_UID, 0x10) // _UID: Unique ID\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.QGP0\r
+ })\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x00A9C000, // Address Base\r
+ 0x00004000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000188,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.IC16._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (SPI9)\r
+ {\r
+ Name (_HID, "QCOM021E") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, 0x09) // _UID: Unique ID\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.QGP1\r
+ })\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x00A80000, // Address Base\r
+ 0x00004000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000181,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.SPI9._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ //\r
+ // PEP resources for buses\r
+ //\r
+ Scope (\_SB.PEP0)\r
+ {\r
+ Method (BSMD, 0, NotSerialized)\r
+ {\r
+ Return (BSRC) /* \_SB_.PEP0.BSRC */\r
+ }\r
+\r
+ Method (PQMD, 0, NotSerialized)\r
+ {\r
+ If ((\_SB.SIDV < 0x00020000))\r
+ {\r
+ Return (DFS1) /* \_SB_.PEP0.DFS1 */\r
+ }\r
+ Else\r
+ {\r
+ Return (DFS2) /* \_SB_.PEP0.DFS2 */\r
+ }\r
+ }\r
+\r
+ Name (BSRC, Package (0x0C)\r
+ {\r
+ Package (0x04)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.UAR7", \r
+ Package (0x12)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x09)\r
+ {\r
+ "FSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x53724E00, \r
+ 0x0682\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_1", \r
+ 0x08D24D00, \r
+ 0x02FAF080\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_m_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_s_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_2x_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_s6_clk", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x09)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_m_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_s_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_s6_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
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+ 0x02\r
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+ {\r
+ "CLOCK", \r
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+ {\r
+ "gcc_qupv3_wrap_0_s_ahb_clk", \r
+ 0x02\r
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+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_s0_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_2x_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_1", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.I2C3", \r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x53724E00, \r
+ 0x0682\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_1", \r
+ 0x08D24D00, \r
+ 0x02FAF080\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_m_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_s_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap0_s2_clk", \r
+ 0x08, \r
+ 0x0124F800, \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_2x_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x1B, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x1C, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_m_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_s_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_s2_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_2x_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_1", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x1B, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x1C, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.I2C4", \r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x53724E00, \r
+ 0x0682\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_1", \r
+ 0x08D24D00, \r
+ 0x02FAF080\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_m_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_s_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap0_s3_clk", \r
+ 0x08, \r
+ 0x0124F800, \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_2x_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x29, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x2A, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_m_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_s_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_s3_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_2x_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_1", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x29, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x2A, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.I2C5", \r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x53724E00, \r
+ 0x0682\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_1", \r
+ 0x00E1D480, \r
+ 0x02FAF080\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_m_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_s_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap0_s4_clk", \r
+ 0x08, \r
+ 0x0124F800, \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_2x_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x59, \r
+ One, \r
+ 0x02, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x5A, \r
+ One, \r
+ 0x03, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_m_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_s_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_s4_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_2x_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_1", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x59, \r
+ Zero, \r
+ 0x02, \r
+ Zero, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x5A, \r
+ Zero, \r
+ 0x03, \r
+ Zero, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.I2C8", \r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_1", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x53724E00, \r
+ 0x0682\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_1", \r
+ 0x08D24D00, \r
+ 0x02FAF080\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_m_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_s_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap0_s7_clk", \r
+ 0x08, \r
+ 0x0124F800, \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_2x_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x5D, \r
+ One, \r
+ 0x03, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x5E, \r
+ One, \r
+ 0x03, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_m_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_0_s_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_s7_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_2x_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap0_core_clk", \r
+ 0x02\r
+ }\r
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+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_1", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
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+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x5D, \r
+ Zero, \r
+ 0x03, \r
+ Zero, \r
+ 0x03, \r
+ Zero\r
+ }\r
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+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x5E, \r
+ Zero, \r
+ 0x03, \r
+ Zero, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.IC11", \r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }\r
+ }, \r
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+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_2", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x53724E00, \r
+ 0x0682\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_2", \r
+ 0x08D24D00, \r
+ 0x02FAF080\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_m_ahb_clk", \r
+ One\r
+ }\r
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+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_s_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s2_clk", \r
+ 0x08, \r
+ 0x0124F800, \r
+ 0x04\r
+ }\r
+ }, \r
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+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_2x_clk", \r
+ One\r
+ }\r
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+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_clk", \r
+ One\r
+ }\r
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+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x37, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }\r
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+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x38, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ Zero\r
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+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ One\r
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+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x02\r
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+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_m_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_s_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_s2_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_2x_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_clk", \r
+ 0x02\r
+ }\r
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+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_2", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
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+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_2", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x37, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0x03, \r
+ Zero\r
+ }\r
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+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x38, \r
+ Zero, \r
+ Zero, \r
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+ 0x03, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.IC12", \r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_2", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x53724E00, \r
+ 0x0682\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_2", \r
+ 0x08D24D00, \r
+ 0x02FAF080\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_m_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_s_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s3_clk", \r
+ 0x08, \r
+ 0x0124F800, \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_2x_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x1F, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }\r
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+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x20, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ Zero\r
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+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ One\r
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+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x02\r
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+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_m_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_s_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_s3_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_2x_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_2", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_2", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x1F, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
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+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x20, \r
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+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.IC13", \r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_2", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x53724E00, \r
+ 0x0682\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_2", \r
+ 0x08D24D00, \r
+ 0x02FAF080\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_m_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_s_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s4_clk", \r
+ 0x08, \r
+ 0x0124F800, \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_2x_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x31, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x32, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_m_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_s_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_s4_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_2x_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_2", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_2", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x31, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x32, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.IC15", \r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_2", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x53724E00, \r
+ 0x0682\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_2", \r
+ 0x08F0D180, \r
+ 0x02FAF080\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_m_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_s_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s6_clk", \r
+ 0x08, \r
+ 0x0124F800, \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_2x_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x21, \r
+ One, \r
+ 0x02, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x22, \r
+ One, \r
+ 0x02, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_m_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_s_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_s6_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_2x_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_2", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_2", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x21, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x22, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.IC16", \r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_2", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x53724E00, \r
+ 0x0682\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_2", \r
+ 0x08D24D00, \r
+ 0x02FAF080\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_m_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_s_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s7_clk", \r
+ 0x08, \r
+ 0x0124F800, \r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_2x_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x51, \r
+ One, \r
+ 0x02, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x52, \r
+ One, \r
+ 0x02, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x0B)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_m_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_s_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_s7_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_2x_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_2", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_2", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x51, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x52, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ Name (DFS1, Package (0x01)\r
+ {\r
+ Package (0x07)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.SPI9", \r
+ Package (0x0A)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s0_clk", \r
+ 0x03, \r
+ 0x0124F800, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s0_clk", \r
+ 0x03, \r
+ 0x01E84800, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s0_clk", \r
+ 0x03, \r
+ 0x0249F000, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s0_clk", \r
+ 0x03, \r
+ 0x02DC6C00, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x04, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s0_clk", \r
+ 0x03, \r
+ 0x03D09000, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x05, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s0_clk", \r
+ 0x03, \r
+ 0x05B8D800, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x06, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s0_clk", \r
+ 0x03, \r
+ 0x05F5E100, \r
+ 0x03\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x0D)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_2", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x53724E00, \r
+ 0x0682\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_2", \r
+ 0x08D24D00, \r
+ 0x02FAF080\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_m_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_s_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_s0_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_2x_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x41, \r
+ One, \r
+ 0x02, \r
+ Zero, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x42, \r
+ One, \r
+ 0x02, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x43, \r
+ One, \r
+ 0x02, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x44, \r
+ One, \r
+ 0x02, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x0D)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_m_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_s_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_s0_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_2x_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_2", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_2", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x41, \r
+ Zero, \r
+ 0x02, \r
+ Zero, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x42, \r
+ Zero, \r
+ 0x02, \r
+ Zero, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x43, \r
+ Zero, \r
+ 0x02, \r
+ Zero, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x44, \r
+ Zero, \r
+ 0x02, \r
+ Zero, \r
+ One, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ Name (DFS2, Package (0x01)\r
+ {\r
+ Package (0x07)\r
+ {\r
+ "DEVICE", \r
+ "\\_SB.SPI9", \r
+ Package (0x0A)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "FSTATE", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s0_clk", \r
+ 0x03, \r
+ 0x0124F800, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s0_clk", \r
+ 0x03, \r
+ 0x01E84800, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s0_clk", \r
+ 0x03, \r
+ 0x02DC6C00, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s0_clk", \r
+ 0x03, \r
+ 0x03D09000, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x04, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s0_clk", \r
+ 0x03, \r
+ 0x05B8D800, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x05, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s0_clk", \r
+ 0x03, \r
+ 0x05F5E100, \r
+ 0x03\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PSTATE", \r
+ 0x06, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x04)\r
+ {\r
+ "gcc_qupv3_wrap1_s0_clk", \r
+ 0x03, \r
+ 0x07270E00, \r
+ 0x03\r
+ }\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x0D)\r
+ {\r
+ "DSTATE", \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_2", \r
+ "ICBID_SLAVE_EBI1", \r
+ 0x53724E00, \r
+ 0x0682\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_2", \r
+ 0x08D24D00, \r
+ 0x02FAF080\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_m_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_s_ahb_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_s0_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_2x_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_clk", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x41, \r
+ One, \r
+ 0x02, \r
+ Zero, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x42, \r
+ One, \r
+ 0x02, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x43, \r
+ One, \r
+ 0x02, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x44, \r
+ One, \r
+ 0x02, \r
+ One, \r
+ One, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DSTATE", \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x0D)\r
+ {\r
+ "DSTATE", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_m_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap_1_s_ahb_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_s0_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_2x_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CLOCK", \r
+ Package (0x02)\r
+ {\r
+ "gcc_qupv3_wrap1_core_clk", \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_BLSP_2", \r
+ "ICBID_SLAVE_EBI1", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BUSARB", \r
+ Package (0x05)\r
+ {\r
+ 0x03, \r
+ "ICBID_MASTER_APPSS_PROC", \r
+ "ICBID_SLAVE_BLSP_2", \r
+ Zero, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x41, \r
+ Zero, \r
+ 0x02, \r
+ Zero, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x42, \r
+ Zero, \r
+ 0x02, \r
+ Zero, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x43, \r
+ Zero, \r
+ 0x02, \r
+ Zero, \r
+ One, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TLMMGPIO", \r
+ Package (0x06)\r
+ {\r
+ 0x44, \r
+ Zero, \r
+ 0x02, \r
+ Zero, \r
+ One, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ // RPE Subsystem Notifier (RPEN) \r
+ Device (RPEN)\r
+ {\r
+ Name (_HID, "QCOM026D") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ }\r
+\r
+ //\r
+ // Peripheral Image Loader (PIL) Driver\r
+ //\r
+ Device (PILC)\r
+ {\r
+ Name (_HID, "QCOM023B") // _HID: Hardware ID\r
+ Method (PILX, 0, NotSerialized)\r
+ {\r
+ Return (PILP) /* \_SB_.PILC.PILP */\r
+ }\r
+\r
+ Name (PILP, Package (0x01)\r
+ {\r
+ // Methods needed for PIL bootup proceedure\r
+ // Drive will parse this list and call each \r
+ // method accordingly\r
+ "OPCA"\r
+ })\r
+ Method(ACPO, 0x0, NotSerialized)\r
+ {\r
+ Name(PKGG, Package(0x1)\r
+ {\r
+ Package(0x3)\r
+ {\r
+ // Represents MBA subsystem\r
+ Zero,\r
+ Zero,\r
+ Buffer(0x10)\r
+ {\r
+ 0x6d, 0x76, 0x58, 0xba, 0xf2, 0xab, 0x02, 0x44, 0x88, 0xd7, 0x90, 0xab,\r
+ 0x24, 0x3f, 0x6c, 0x77\r
+ }\r
+ }\r
+ })\r
+ // Copy ACPI globals for Address for this subsystem into above package for use in driver\r
+ Store(RMTB, Index(DerefOf(Index(PKGG, Zero, )), Zero, ))\r
+ Store(RMTX, Index(DerefOf(Index(PKGG, Zero, )), One, ))\r
+ Return(PKGG)\r
+ }\r
+#if 0\r
+ Method (ACPO, 0, NotSerialized)\r
+ {\r
+ Name (PKGG, Package (0x01)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ // Represents MBA subsystem\r
+ Zero, \r
+ Zero, \r
+ ToUUID ("ba58766d-abf2-4402-88d7-90ab243f6c77")\r
+ }\r
+ })\r
+ // Copy ACPI globals for Address for this subsystem into above package for use in driver\r
+ DerefOf (PKGG [Zero]) [Zero] = RMTB /* \_SB_.RMTB */\r
+ DerefOf (PKGG [Zero]) [One] = RMTX /* \_SB_.RMTX */\r
+ Return (PKGG) /* \_SB_.PILC.ACPO.PKGG */\r
+ }\r
+#endif\r
+ }\r
+\r
+ // \r
+ // RPE Crash Dump Injector (CDI) Driver\r
+ //\r
+ Device (CDI)\r
+ {\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.PILC, \r
+ \_SB.RPEN\r
+ })\r
+ Name (_HID, "QCOM026C") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+ }\r
+\r
+ Device (SCSS)\r
+ {\r
+ Name (_DEP, Package (0x06) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.PILC, \r
+ \_SB.GLNK, \r
+ \_SB.IPC0, \r
+ \_SB.RPEN, \r
+ \_SB.SSDD\r
+ })\r
+ //Name (_HID, "QCOM02BE") // _HID: Hardware ID\r
+ Name (_HID, "MEOW02BE") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000199,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.SCSS._CRS.RBUF */\r
+ }\r
+\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+ }\r
+\r
+\r
+\r
+// comment up to here\r
+\r
+\r
+\r
+ //\r
+ // ADSP Driver: load ADSP image\r
+ //\r
+ Device (ADSP)\r
+ {\r
+ Name (_DEP, Package (0x07) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.PILC, \r
+ \_SB.GLNK, \r
+ \_SB.IPC0, \r
+ \_SB.RPEN, \r
+ \_SB.SSDD, \r
+ \_SB.PDSR\r
+ })\r
+ Name (_HID, "QCOM023D") // _HID: Hardware ID\r
+ //Name (_HID, "MEOW023D") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ //\r
+ // WDIR - Watch Dog Interrupt Registers\r
+ //\r
+ Method (WDIR, 0, NotSerialized)\r
+ {\r
+ Return (Package (0x04)\r
+ {\r
+ 0x02, // Interrupt number - 2nd bit in Eleventh register\r
+ 0x17A0011C, // APCS_GICD_ISENABLERn (n represents Eleventh register), register used to enable WDOG bite interrupt.\r
+ 0x17A0019C, // APCS_GICD_ICENABLERn (n represents Eleventh register), register used to disable WDOG bite interrupt.\r
+ 0x17A0021C // APCS_GICD_ICPENDRn (n represents Eleventh register), register used to clear pending WDOG bite interrupt.\r
+ })\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ // Inbound interrupt from LPASS dog bite\r
+ // See http://ipcatalog.qualcomm.com/irqs/chip/50/map/110\r
+ // q6ss_wdog_exp_irq = 194\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000C2,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.ADSP._CRS.RBUF */\r
+ }\r
+\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Device (SLM1)\r
+ {\r
+ Name (_ADR, Zero) // _ADR: Address\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Name (_SUB, "C153144D") // _SUB: Subsystem ID\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ // SLIMbus register address space\r
+ Memory32Fixed (ReadWrite,\r
+ 0x171C0000, // Address Base\r
+ 0x0002C000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000C3,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.ADSP.SLM1._CRS.RBUF */\r
+ }\r
+\r
+ Method (CHLD, 0, NotSerialized)\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ "SLM1\\QCOM023F"\r
+ })\r
+ }\r
+\r
+ // ADCM Driver Configurations\r
+ Device (ADCM)\r
+ {\r
+ Name (_SUB, "C153144D") // _SUB: Subsystem ID\r
+ // HID values are present in Qualcomm.HID.props under <WDKRoot>MSBuild\Qualcomm\r
+ // Parent of ADCM shall defined this ( Refer mproc.asl or slimbus.asl)\r
+ // AMSS in bear family and Slimbus in Badger family makes below entry\r
+ // HID_ACD = QCOM242D\r
+ // Name (_HID, "HID_ACD")\r
+ \r
+ // Address object for acpi device enumerated device (ADCM) on parent device bus\r
+ // Used to identify multiple child if present\r
+ Name (_ADR, Zero) // _ADR: Address\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.MMU0, \r
+ \_SB.IMM0\r
+ })\r
+ Method (CHLD, 0, NotSerialized)\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ "ADCM\\SAMM0802"\r
+ })\r
+ }\r
+\r
+ Device (AUDD)\r
+ {\r
+ Name (_ADR, Zero) // _ADR: Address\r
+ Name (_SUB, "C153144D") // _SUB: Subsystem ID\r
+ Name (_DEP, Package (0x01) // _DEP: Dependencies\r
+ {\r
+ \_SB.SPI9\r
+ })\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0640, IoRestrictionNone,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0040\r
+ }\r
+ GpioInt (Edge, ActiveHigh, Exclusive, PullDown, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0100\r
+ }\r
+ SpiSerialBusV2 (0x0000, PolarityLow, FourWireMode, 0x08,\r
+ ControllerInitiated, 0x016E3600, ClockPolarityLow,\r
+ ClockPhaseFirst, "\\_SB.SPI9",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ RawDataBuffer (0x07) // Vendor Data\r
+ {\r
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
+ })\r
+ })\r
+ Return (RBUF) /* \_SB_.ADSP.SLM1.ADCM.AUDD._CRS.RBUF */\r
+ }\r
+\r
+ Method (CHLD, 0, NotSerialized)\r
+ {\r
+ Name (CH, Package (0x02)\r
+ {\r
+ "AUDD\\SAMM0803", \r
+ "AUDD\\SAMM0801"\r
+ })\r
+ Return (CH) /* \_SB_.ADSP.SLM1.ADCM.AUDD.CHLD.CH__ */\r
+ }\r
+\r
+ // MBHC Driver Configurations\r
+ Device (MBHC)\r
+ {\r
+ Name (_ADR, Zero) // _ADR: Address\r
+ Name (_SUB, "C153144D") // _SUB: Subsystem ID\r
+ }\r
+\r
+ // Miniport Device Configurations\r
+ Device (QCRT)\r
+ {\r
+ // Address object for acpi device enumerated device (QCRT) on parent device bus\r
+ // Used to identify multiple child if present \r
+ // Since, QCRT is second child of AUDD, we have assigned slot-1\r
+ Name (_ADR, One) // _ADR: Address\r
+ Name (_SUB, "C153144D") // _SUB: Subsystem ID\r
+ }\r
+ }\r
+ }\r
+ }\r
+\r
+ Device (SLM2)\r
+ {\r
+ Name (_ADR, One) // _ADR: Address\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x17240000, // Address Base\r
+ 0x0002C000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000143,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.ADSP.SLM2._CRS.RBUF */\r
+ }\r
+ }\r
+ }\r
+\r
+ //\r
+ // AMSS Driver: Used for loading the modem binaries\r
+ //\r
+ Device (AMSS)\r
+ {\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Name (_DEP, Package (0x09) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.IPA, \r
+ \_SB.GLNK, \r
+ \_SB.IPC0, \r
+ \_SB.PILC, \r
+ \_SB.RFS0, \r
+ \_SB.RPEN, \r
+ \_SB.SSDD, \r
+ \_SB.PDSR\r
+ })\r
+ Name (_HID, "QCOM023E") // _HID: Hardware ID\r
+ Name (WLEN, One)\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ // Inbound interrupt from Q6SW dog bite:\r
+ // q6ss_wdog_exp_irq = 298\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000012A,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.AMSS._CRS.RBUF */\r
+ }\r
+\r
+ //\r
+ // WDIR - Watch Dog Interrupt Registers\r
+ //\r
+ Method (WDIR, 0, NotSerialized)\r
+ {\r
+ Return (Package (0x04)\r
+ {\r
+ Zero, \r
+ 0x17A0013C, \r
+ 0x17A001BC, \r
+ 0x17A002BC\r
+ })\r
+ }\r
+\r
+ Device (QWLN)\r
+ {\r
+ Name (_ADR, Zero) // _ADR: Address\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.MMU0\r
+ })\r
+ Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake\r
+ {\r
+ Zero, \r
+ Zero\r
+ }) // wakeable from S0\r
+ Name (_S0W, 0x02) // S0 should put device in D2 for wake\r
+ Name (_S4W, 0x02) // all other Sx (just in case) should also wake from D2\r
+ Name (_PRR, Package (One) // _PRR: Power Resource for Reset\r
+ {\r
+ \_SB.AMSS.QWLN.WRST\r
+ }) // Power resource reference for device reset and recovery.\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x18800000, // Address Base\r
+ 0x00800000, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0C250000, // Address Base\r
+ 0x00000010, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x8DF00000, // Address Base // fajita\r
+ 0x00100000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001BE,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001BF,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, ExclusiveAndWake, ,, )\r
+ {\r
+ 0x000001C0,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001C1,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001C2,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001C3,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001C4,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001C5,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001C6,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001C7,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001C8,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001C9,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.AMSS.QWLN._CRS.RBUF */\r
+ }\r
+\r
+ Method (WMSA, 0, NotSerialized)\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ 0x00100000\r
+ })\r
+ }\r
+\r
+ OperationRegion (WOPR, 0x80, Zero, 0x10)\r
+ Field (WOPR, DWordAcc, NoLock, Preserve)\r
+ {\r
+ Offset (0x04), \r
+ WTRG, 32\r
+ }\r
+\r
+ PowerResource (WRST, 0x05, 0x0000)\r
+ {\r
+ Method (_ON, 0, NotSerialized) // _ON_: Power On\r
+ {\r
+ }\r
+\r
+ Method (_OFF, 0, NotSerialized) // _OFF: Power Off\r
+ {\r
+ }\r
+\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Method (_RST, 0, NotSerialized) // _RST: Device Reset\r
+ {\r
+ WTRG = 0xABCD\r
+ }\r
+ }\r
+ }\r
+\r
+ Scope (\_SB)\r
+ {\r
+ Device (COEX)\r
+ {\r
+ Name (_HID, "QCOM0295") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ }\r
+\r
+ Device (WSAR)\r
+ {\r
+ Name (_HID, "SAM0609") // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_SUB, "C153144D") // _SUB: Subsystem ID\r
+ Name (_DEP, Package (0x01) // _DEP: Dependencies\r
+ {\r
+ \_SB.AMSS.QWLN\r
+ })\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+ }\r
+ }\r
+ }\r
+\r
+ //\r
+ // QMI Service manager\r
+ //\r
+ Device (QSM)\r
+ {\r
+ Name (_HID, "QCOM02B9") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_DEP, Package (0x04) // _DEP: Dependencies\r
+ {\r
+ \_SB.GLNK, \r
+ \_SB.IPC0, \r
+ \_SB.PILC, \r
+ \_SB.RPEN\r
+ })\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x98F00000, // Address Base\r
+ 0x00600000, // Address Length\r
+ )\r
+ })\r
+ Return (RBUF) /* \_SB_.QSM_._CRS.RBUF */\r
+ }\r
+\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+ }\r
+\r
+ //\r
+ // Subsys Dummy Device\r
+ // Subsys devices that use QCCI should have an dependency on this\r
+ //\r
+ Device (SSDD)\r
+ {\r
+ Name (_HID, "QCOM02D1") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.GLNK, \r
+ \_SB.TFTP\r
+ })\r
+ }\r
+\r
+ Device (PDSR)\r
+ {\r
+ Name (_HID, "QCOM02CE") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_DEP, Package (0x03) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.GLNK, \r
+ \_SB.IPC0\r
+ })\r
+ }\r
+\r
+ Device (CDSP)\r
+ {\r
+ Name (_DEP, Package (0x07) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.PILC, \r
+ \_SB.GLNK, \r
+ \_SB.IPC0, \r
+ \_SB.RPEN, \r
+ \_SB.SSDD, \r
+ \_SB.PDSR\r
+ })\r
+ Name (_HID, "QCOM02F7") // _HID: Hardware ID\r
+ //Name (_HID, "MEOW02F7") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000262,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.CDSP._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (TFTP)\r
+ {\r
+ Name (_HID, "QCOM02F6") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.IPC0\r
+ })\r
+ }\r
+\r
+ Scope (\_SB.PILC)\r
+ {\r
+ Method (_SUB, 0, NotSerialized) // _SUB: Subsystem ID\r
+ {\r
+ If ((\_SB.SOID == 0x0155))\r
+ {\r
+ Return ("CLSA0850")\r
+ }\r
+ Else\r
+ {\r
+ Return (\_SB.PSUB)\r
+ }\r
+ }\r
+ }\r
+\r
+ Scope (\_SB.AMSS)\r
+ {\r
+ Method (_SUB, 0, NotSerialized) // _SUB: Subsystem ID\r
+ {\r
+ If ((\_SB.SOID == 0x0155))\r
+ {\r
+ Return ("CLSA0850")\r
+ }\r
+ Else\r
+ {\r
+ Return (\_SB.PSUB)\r
+ }\r
+ }\r
+ }\r
+\r
+ Device (LLC)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ Name (_HID, "QCOM02F8") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Return (ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x01300000, // Address Base\r
+ 0x00028000, // Address Length\r
+ )\r
+ })\r
+ }\r
+ }\r
+\r
+ Device (MMU0)\r
+ {\r
+ Name (_HID, "QCOM0212") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_DEP, Package (0x01) // _DEP: Dependencies\r
+ {\r
+ \_SB.MMU1\r
+ })\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Return (ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x15000000, // Address Base\r
+ 0x0007FFB8, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x01F46000, // Address Base\r
+ 0x00000004, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000080,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000081,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000082,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000083,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000084,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000085,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000086,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000087,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000088,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000089,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000008A,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000008B,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000008C,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000008D,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000008E,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000008F,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000090,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000091,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000092,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000093,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000094,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000095,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000096,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000D5,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000D6,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000D7,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000D8,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000D9,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000DA,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000DB,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000DC,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000DD,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000DE,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000DF,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000E0,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000015B,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000015C,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000015D,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000015E,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000015F,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000160,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000161,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000162,\r
+ }\r
+ })\r
+ }\r
+ }\r
+\r
+ Device (MMU1)\r
+ {\r
+ Name (_HID, "QCOM0212") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_DEP, Package (0x01) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Return (ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x05040000, // Address Base\r
+ 0x00010000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000018C,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000018D,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000018E,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000018F,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000190,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000191,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000192,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000193,\r
+ }\r
+ })\r
+ }\r
+ }\r
+\r
+ Device (IMM0)\r
+ {\r
+ Name (_HID, "QCOM030B") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ }\r
+\r
+ Device (IMM1)\r
+ {\r
+ Name (_HID, "QCOM030B") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, One) // _UID: Unique ID\r
+ }\r
+\r
+//#if 0\r
+ Device (GPU0)\r
+ {\r
+ Name (_HID, "QCOM027E") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_CID, "ACPIQCOM027E") // _CID: Compatible ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_HRV, 0x7C) // _HRV: Hardware Revision\r
+ // Expose the internal monitor device to allow it to be used in a thermal zone\r
+ // for thermal mitigation.\r
+ //\r
+ Device (MON0)\r
+ {\r
+ Method (_ADR, 0, NotSerialized) // _ADR: Address\r
+ {\r
+ Return (Zero)\r
+ }\r
+ }\r
+\r
+ Name (_DEP, Package (0x0A) // _DEP: Dependencies\r
+ {\r
+ \_SB.MMU0, \r
+ \_SB.MMU1, \r
+ \_SB.IMM0, \r
+ \_SB.IMM1, \r
+ \_SB.PEP0, \r
+ \_SB.PMIC, \r
+ \_SB.PILC, \r
+ \_SB.RPEN, \r
+ \_SB.TREE, \r
+ \_SB.SCM0\r
+ })\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0AE00000, // Address Base\r
+ 0x00140000, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x088E0000, // Address Base\r
+ 0x000F4000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000073,\r
+ }\r
+ Memory32Fixed (ReadWrite,\r
+ 0x05000000, // Address Base\r
+ 0x0003F010, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x05060000, // Address Base\r
+ 0x0003F000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000014C,\r
+ }\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0B280000, // Address Base\r
+ 0x0000FFFF, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0B480000, // Address Base\r
+ 0x00010000, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x05090000, // Address Base\r
+ 0x00009000, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0C200000, // Address Base\r
+ 0x0000FFFF, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0AA00000, // Address Base\r
+ 0x00200000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000CE,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000CF,\r
+ }\r
+ // TLMM GPIO used to reset the DSI panel\r
+ //\r
+ GpioIo (Shared, PullUp, 0x0000, 0x0000, IoRestrictionNone,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0060\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0._CRS.RBUF */\r
+ }\r
+\r
+ //------------------------------------------------------------------------------\r
+ // Resource Auxiliary Info\r
+ // This method is a companion method to the main _CRS resource method. It\r
+ // includes information for each resource, such as the owning component, a\r
+ // string identifier, etc.\r
+ //------------------------------------------------------------------------------\r
+ //\r
+ Method (RESI, 0, NotSerialized)\r
+ {\r
+ Name (RINF, Package (0x10)\r
+ {\r
+ 0x03, // Table Format Major Version\r
+ Zero, // Table Format Minor Version\r
+ Package (0x03)\r
+ {\r
+ "RESOURCE", \r
+ "MDP_REGS", // Resource Name\r
+ "DISPLAY" // Owning Component\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "RESOURCE", \r
+ "DP_PHY_REGS", \r
+ "DISPLAY"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "RESOURCE", \r
+ "VSYNC_INTERRUPT", \r
+ "DISPLAY"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "RESOURCE", \r
+ "GFX_REGS", \r
+ "GRAPHICS"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "RESOURCE", \r
+ "GFX_REG_CONT", \r
+ "GRAPHICS"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "RESOURCE", \r
+ "GFX_INTERRUPT", \r
+ "GRAPHICS"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "RESOURCE", \r
+ "GPU_PDC_SEQ_MEM", \r
+ "GRAPHICS"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "RESOURCE", \r
+ "GPU_PDC_REGS", \r
+ "GRAPHICS"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "RESOURCE", \r
+ "GPU_CC", \r
+ "GRAPHICS"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "RESOURCE", \r
+ "GPU_RPMH_CPRF", \r
+ "GRAPHICS"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "RESOURCE", \r
+ "VIDEO_REGS", \r
+ "VIDEO"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "RESOURCE", \r
+ "VIDC_INTERRUPT", \r
+ "VIDEO"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "RESOURCE", \r
+ "VIDC_WD_INTERRUPT", \r
+ "VIDEO"\r
+ }, \r
+\r
+ // TLMM GPIO used to reset the DSI panel\r
+ //\r
+ Package (0x03)\r
+ {\r
+ "RESOURCE", \r
+ "DSI_PANEL_RESET", \r
+ "DISPLAY"\r
+ }\r
+ })\r
+ Return (RINF) /* \_SB_.GPU0.RESI.RINF */\r
+ }\r
+\r
+ //------------------------------------------------------------------------------\r
+ // Graphics Engines and Display Config\r
+ // This method encapsulates all per-platform configuration data for engines and\r
+ // the display. This method consists of three sub-packages. The first package\r
+ // encapsulates all configuration information for the supported engines. The\r
+ // second package encapsulates all display configuration data. The third\r
+ // package is the list of all page tables used by the SMMUs in the engines and\r
+ // display.\r
+ //------------------------------------------------------------------------------\r
+ //\r
+ Method (ENGS, 0, NotSerialized)\r
+ {\r
+ Name (EBUF, Package (0x06)\r
+ {\r
+ 0x03, // Table Format Major Version\r
+ 0x02, // Table Format Minor Version\r
+ 0x003B0014, // XML Common/Platform Source File Revision\r
+\r
+ //------------------------------------------------------------------------------\r
+ // Graphics Engine List\r
+ // This package enumerates all of the expected engines that should be enumerated\r
+ // on this platform, as well as engine-specific configuration data. This\r
+ // includes resource assignments, power component assignments, MMU IDs,\r
+ // and even chip family information.\r
+ //------------------------------------------------------------------------------\r
+ //\r
+ Package (0x08)\r
+ {\r
+ "ENGINES", \r
+ 0x06, // Number of engines\r
+ Package (0x0A)\r
+ {\r
+ "ENGINE", \r
+ "GRAPHICS", // Engine String Identifier\r
+ "Adreno6X", // Chip Family Identifier\r
+ One, // Index of Primary Power Component\r
+ 0x02, // P-State Set Index of Footswitch override\r
+ Zero, // P-State Set Index of Reset\r
+ Package (0x0B)\r
+ {\r
+ "MMUINFO", \r
+ "Miniport", // SMMU managed by miniport or engine\r
+ "ArmSmmuV2", // SMMU Family \r
+ 0x02, // Number of SMMU stages\r
+ 0x31, // Address bits\r
+ "V8L", // Address format\r
+ "SMMUID", \r
+ ToUUID ("9833c712-3292-4ffb-b0f4-2bd20e1f7f66"), \r
+ "SMMUINTERFACEID", \r
+ Buffer (0x10)\r
+ {\r
+ /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........\r
+ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........\r
+ }, \r
+\r
+ Package (0x0E)\r
+ {\r
+ "PAGETABLEUSAGE", \r
+ 0x04, // Number of page tables\r
+ "GraphicsGlobalPT", \r
+ Zero, \r
+ 0x03030000, \r
+ "GraphicsPerProcessPT", \r
+ Zero, \r
+ 0x03030000, \r
+ "GraphicsSecurePT", \r
+ One, \r
+ 0x030A0000, \r
+ "GraphicsGmuPT", \r
+ 0x03, \r
+ 0x03030002\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PERF_CONTROLS", \r
+ Package (0x01)\r
+ {\r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "LimitForPassiveCooling", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x04, \r
+ Package (0x02)\r
+ {\r
+ "LimitForPassiveCooling", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "THERMAL_DOMAINS", \r
+ "GPU"\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PROPERTIES", \r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "GmemBaseAddr", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "GmemSize", \r
+ 0x00100000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "SMMUCount", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x09)\r
+ {\r
+ "ENGINE", \r
+ "MDPBLT", // Engine String Identifier\r
+ "MDP5.x", // Chip Family Identifier\r
+ 0x02, // Index of Primary Power Component\r
+ One, // P-State Set Index of Footswitch override\r
+ Zero, // P-State Set Index of Reset\r
+ Package (0x02)\r
+ {\r
+ "SHAREDSMMU", \r
+ "ROTATOR"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PERF_CONTROLS", \r
+ Package (0x02)\r
+ {\r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "LimitForPassiveCooling", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "LimitForPassiveCooling", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "THERMAL_DOMAINS", \r
+ "GPU"\r
+ }\r
+ }, \r
+\r
+ Package (0x09)\r
+ {\r
+ "ENGINE", \r
+ "ROTATOR", \r
+ "MDP5.x", \r
+ 0x03, \r
+ One, \r
+ Zero, \r
+ Package (0x0B)\r
+ {\r
+ "MMUINFO", \r
+ "Miniport", \r
+ "ArmSmmuV2", \r
+ 0x02, \r
+ 0x20, \r
+ "V7S", \r
+ "SMMUID", \r
+ ToUUID ("36079ae4-78e8-452d-af50-0cff78b2f1ca"), \r
+ "SMMUINTERFACEID", \r
+ Buffer (0x10)\r
+ {\r
+ /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........\r
+ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PAGETABLEUSAGE", \r
+ 0x02, \r
+ "MdpNonSecurePT", \r
+ "MdpSecurePT"\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PERF_CONTROLS", \r
+ Package (0x02)\r
+ {\r
+ 0x02, \r
+ Package (0x02)\r
+ {\r
+ "LimitForPassiveCooling", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x03, \r
+ Package (0x02)\r
+ {\r
+ "LimitForPassiveCooling", \r
+ One\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "THERMAL_DOMAINS", \r
+ "GPU"\r
+ }\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ "ENGINE", \r
+ "VIDEO", \r
+ "Venus", \r
+ 0x04, \r
+ One, \r
+ Zero, \r
+ Package (0x0B)\r
+ {\r
+ "MMUINFO", \r
+ "Engine", \r
+ "ArmSmmuV2", \r
+ 0x02, \r
+ 0x20, \r
+ "V7S", \r
+ "SMMUID", \r
+ ToUUID ("665e0f8e-add3-49d1-91bc-5540c5f57fba"), \r
+ "SMMUINTERFACEID", \r
+ ToUUID ("1c3fc0e8-0b11-4ee0-be89-3e21420a865f"), \r
+ Package (0x07)\r
+ {\r
+ "PAGETABLEUSAGE", \r
+ 0x05, \r
+ "VideoNonSecurePT", \r
+ "VideoSecurePT1", \r
+ "VideoSecurePT2", \r
+ "VideoSecurePT3", \r
+ "VideoSecurePT4"\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PERF_CONTROLS", \r
+ Package (0x01)\r
+ {\r
+ 0x02\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ "THERMAL_DOMAINS"\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "PROPERTIES", \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "DecMaxFps", \r
+ 0x3C\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x09)\r
+ {\r
+ "ENGINE", \r
+ "CRYPTO", \r
+ "Crypto1.0", \r
+ 0x05, \r
+ One, \r
+ Zero, \r
+ Package (0x0B)\r
+ {\r
+ "MMUINFO", \r
+ "Miniport", \r
+ "ArmSmmuV2", \r
+ 0x02, \r
+ 0x20, \r
+ "V7S", \r
+ "SMMUID", \r
+ ToUUID ("36079ae4-78e8-452d-af50-0cff78b2f1ca"), \r
+ "SMMUINTERFACEID", \r
+ Buffer (0x10)\r
+ {\r
+ /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........\r
+ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PAGETABLEUSAGE", \r
+ 0x02, \r
+ "CryptoNonSecurePT", \r
+ "CryptoSecurePT"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PERF_CONTROLS", \r
+ Package (0x01)\r
+ {\r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ "THERMAL_DOMAINS"\r
+ }\r
+ }, \r
+\r
+ Package (0x08)\r
+ {\r
+ "ENGINE", \r
+ "VIDEO_ENCODER", \r
+ "Venus", \r
+ 0x06, \r
+ One, \r
+ Zero, \r
+ Package (0x03)\r
+ {\r
+ "PERF_CONTROLS", \r
+ Package (0x01)\r
+ {\r
+ 0x02\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ "THERMAL_DOMAINS"\r
+ }\r
+ }\r
+ }, \r
+\r
+ //------------------------------------------------------------------------------\r
+ // Display Info Package\r
+ // This package enumerates all resources assigned to the display. Additionally,\r
+ // this routine includes any display configuration data, such as hotplug\r
+ // support.\r
+ //------------------------------------------------------------------------------\r
+ //\r
+ Package (0x08)\r
+ {\r
+ "DISPLAYS", \r
+ "MDP5.x", // Chip Family Identifier\r
+ 0x03, // Number of displays\r
+ Package (0x07)\r
+ {\r
+ "DISPLAY", \r
+ "INTERNAL1", // Display Name\r
+ Zero, // Index of Display Power Component\r
+ One, // P-State Set Index of Footswitch override\r
+ Zero, // P-State Set Index of reset\r
+ Package (0x04)\r
+ {\r
+ "PERF_CONTROLS", \r
+ Package (0x01)\r
+ {\r
+ 0x02\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ 0x03\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ "THERMAL_DOMAINS"\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DISPLAY", \r
+ "INTERNAL2", \r
+ 0x07, \r
+ One, \r
+ Zero, \r
+ Package (0x04)\r
+ {\r
+ "PERF_CONTROLS", \r
+ Package (0x01)\r
+ {\r
+ 0x02\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ 0x03\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ 0x04\r
+ }\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ "THERMAL_DOMAINS"\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DISPLAY", \r
+ "EXTERNAL1", \r
+ 0x08, \r
+ One, \r
+ Zero, \r
+ Package (0x03)\r
+ {\r
+ "PERF_CONTROLS", \r
+ Package (0x01)\r
+ {\r
+ 0x02\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ Package (0x01)\r
+ {\r
+ "THERMAL_DOMAINS"\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "RESOURCES", \r
+ Package (0x0B)\r
+ {\r
+ "MMUINFO", \r
+ "Miniport", \r
+ "ArmSmmuV2", \r
+ 0x02, \r
+ 0x20, \r
+ "V7S", \r
+ "SMMUID", \r
+ ToUUID ("36079ae4-78e8-452d-af50-0cff78b2f1ca"), \r
+ "SMMUINTERFACEID", \r
+ Buffer (0x10)\r
+ {\r
+ /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........\r
+ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // ........\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PAGETABLEUSAGE", \r
+ 0x02, \r
+ "MdpNonSecurePT", \r
+ "MdpSecurePT"\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x0F)\r
+ {\r
+ "PRIMARY_SOURCE_MODES", \r
+ 0x0D, \r
+ Package (0x02)\r
+ {\r
+ 0x0280, \r
+ 0x01E0\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0320, \r
+ 0x0258\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0500, \r
+ 0x02D0\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0400, \r
+ 0x0300\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0480, \r
+ 0x0300\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0500, \r
+ 0x0300\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0550, \r
+ 0x0300\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0556, \r
+ 0x0300\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0640, \r
+ 0x0384\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0500, \r
+ 0x0400\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0780, \r
+ 0x0438\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0780, \r
+ 0x04B0\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0780, \r
+ 0x0500\r
+ }\r
+ }\r
+ }, \r
+\r
+ //------------------------------------------------------------------------------\r
+ // Page Table List\r
+ // This package enumerates all of the page tables used by any of the displays\r
+ // and engines. Page tables defined here may be referenced by one or more engine\r
+ // or display.\r
+ //------------------------------------------------------------------------------\r
+ //\r
+ Package (0x0F)\r
+ {\r
+ "PAGETABLES", \r
+ 0x0D, // Number of page tables\r
+ Package (0x07)\r
+ {\r
+ "GraphicsGlobalPT", // Name \r
+ One, // Global\r
+ Zero, // Secure\r
+ One, // HighTTBR\r
+ One, // HiddenFromOS\r
+ 0x0000008000000000, // VaStart \r
+ 0x0000000800000000 // VaSizeBytes\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "GraphicsPerProcessPT", \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0x00400000, \r
+ 0x0000007FFFC00000\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "GraphicsSecurePT", \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ One, \r
+ 0x0000008800000000, \r
+ 0xC0000000\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "GraphicsGmuPT", \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0x60000000, \r
+ 0x20000000\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "MdpNonSecurePT", \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0x80100000, \r
+ 0x7FF00000\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "MdpSecurePT", \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ One, \r
+ 0x80000000, \r
+ 0x80000000\r
+ }, \r
+\r
+ Package (0x09)\r
+ {\r
+ "VideoNonSecurePT", // Name\r
+ Zero, // Global\r
+ Zero, // Secure\r
+ Zero, // HighTTBR\r
+ One, // HiddenFromOS\r
+ 0x00100000, // VaStart\r
+ 0xBFF00000, // VaSizeBytes\r
+ 0x1B, // VideoBufferMask\r
+ Zero // VideoCBIndex\r
+ }, \r
+\r
+ Package (0x09)\r
+ {\r
+ "VideoSecurePT1", \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ One, \r
+ 0xC0000000, \r
+ 0x10000000, \r
+ 0x09, \r
+ One\r
+ }, \r
+\r
+ Package (0x09)\r
+ {\r
+ "VideoSecurePT2", \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ One, \r
+ 0xD0000000, \r
+ 0x10000000, \r
+ 0x07, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x09)\r
+ {\r
+ "VideoSecurePT3", \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ One, \r
+ 0xE0000000, \r
+ 0x10000000, \r
+ 0x02, \r
+ 0x03\r
+ }, \r
+\r
+ Package (0x09)\r
+ {\r
+ "VideoSecurePT4", \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ One, \r
+ 0xF0000000, \r
+ 0x10000000, \r
+ 0x2A, \r
+ 0x04\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "CryptoNonSecurePT", \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0x00100000, \r
+ 0x7FF00000\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "CryptoSecurePT", \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ One, \r
+ 0x80000000, \r
+ 0x80000000\r
+ }\r
+ }\r
+ })\r
+ Return (EBUF) /* \_SB_.GPU0.ENGS.EBUF */\r
+ }\r
+\r
+ //------------------------------------------------------------------------------\r
+ // Graphics Thermal Management Details\r
+ //------------------------------------------------------------------------------\r
+ //\r
+ Method (TMDT, 0, NotSerialized)\r
+ {\r
+ Name (RBUF, Package (0x03)\r
+ {\r
+ One, // Table Format Major Version\r
+ Zero, // Table Format Minor Version\r
+ Package (0x03)\r
+ {\r
+ "THERMAL_DOMAINS", \r
+ One, // Num Thermal Domains\r
+ Package (0x03)\r
+ {\r
+ "GPU", \r
+ "GPU0", \r
+ Package (0x03)\r
+ {\r
+ "GRAPHICS", \r
+ "MDPBLT", \r
+ "ROTATOR"\r
+ }\r
+ }\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0.TMDT.RBUF */\r
+ }\r
+\r
+ //------------------------------------------------------------------------------\r
+ // Graphics PEP Component List\r
+ // This method is a companion method to the graphics entries inside PEP's DCFG\r
+ // method. It includes the same components, generated from a single XML source,\r
+ // with any additional information required to be passed to dxgkrnl.\r
+ //------------------------------------------------------------------------------\r
+ //\r
+ Method (PMCL, 0, NotSerialized)\r
+ {\r
+ Name (RBUF, Package (0x0D)\r
+ {\r
+ 0x03, // Table Format Major Version\r
+ One, // Table Format Minor Version\r
+ 0x0A, // Number of power components\r
+\r
+ //----------------------------------------------------------------------------------\r
+ // C0 - Internal Display Power States\r
+ //----------------------------------------------------------------------------------\r
+ //\r
+ Package (0x0F)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ ToUUID ("2c135991-4391-4633-90b1-fa96f2e2cc04"), \r
+ "PRIMDISPLAY_POWER_STATES", \r
+ "HW_BLOCK_MDP", \r
+ Package (0x02)\r
+ {\r
+ "DISPLAY", \r
+ "INTERNAL1"\r
+ }, \r
+\r
+ 0x02, \r
+ 0x05, \r
+ Package (0x06)\r
+ {\r
+ "FSTATE", \r
+ Zero, \r
+ "ALL_ON", \r
+ Zero, \r
+ Zero, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x06)\r
+ {\r
+ "FSTATE", \r
+ One, \r
+ "PWR_OFF", \r
+ One, \r
+ One, \r
+ One\r
+ }, \r
+\r
+ //----------------------------------------------------------------------------------\r
+ // C0.PS0 - Internal Display: MDP Reset Control\r
+ //----------------------------------------------------------------------------------\r
+ //\r
+ Package (0x0A)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ "INTERNAL1_RESET", \r
+ "*", \r
+ "RESET", \r
+ 0x02, \r
+ Zero, \r
+ Zero, \r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ One, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Zero, \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ //----------------------------------------------------------------------------------\r
+ // C0.PS1 - Internal Display: MDP Footswitch override\r
+ //----------------------------------------------------------------------------------\r
+ //\r
+ Package (0x0A)\r
+ {\r
+ "PSTATE_SET", \r
+ One, \r
+ "INTERNAL1_FOOTSWITCH_OVERRIDE", \r
+ "*", \r
+ "FOOTSWITCH_OVERRIDE", \r
+ 0x02, \r
+ 0xFFFFFFFF, \r
+ Zero, \r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ One, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Zero, \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ //----------------------------------------------------------------------------------\r
+ // C0.PS2 - Internal Display: Power states for MDP scan-out HW\r
+ //----------------------------------------------------------------------------------\r
+ //\r
+ Package (0x0D)\r
+ {\r
+ "PSTATE_SET", \r
+ 0x02, \r
+ "INTERNAL1_SCAN_CONTROL", \r
+ "*", \r
+ "DISPLAY_SOURCE_SCAN_CTRL", \r
+ 0x05, \r
+ Zero, \r
+ Zero, \r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x04, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ 0x03, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ 0x02, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x03, \r
+ One, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x04, \r
+ Zero, \r
+ 0x02\r
+ }\r
+ }, \r
+\r
+ //----------------------------------------------------------------------------------\r
+ // C0.PS3 - Internal Display: MDP Core Clock Frequency\r
+ //----------------------------------------------------------------------------------\r
+ //\r
+ Package (0x15)\r
+ {\r
+ "PSTATE_SET", \r
+ 0x03, \r
+ "INTERNAL1_CORE_CLOCK_CONTROL", \r
+ "*", \r
+ "CORE_CLOCK", \r
+ 0x0D, \r
+ 0x04, \r
+ Zero, \r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x19A14780, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ 0x18964020, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ 0x14810600, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x03, \r
+ 0x11E1A300, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x04, \r
+ 0x10642AC0, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x05, \r
+ 0x0BEBC200, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x06, \r
+ 0x0A37CADB, \r
+ 0x03\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x07, \r
+ 0x09D5B340, \r
+ 0x03\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x08, \r
+ 0x08F0D180, \r
+ 0x03\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x09, \r
+ 0x05F5E100, \r
+ 0x03\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x0A, \r
+ 0x051BD4B0, \r
+ 0x03\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x0B, \r
+ 0x0124F800, \r
+ 0x03\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x0C, \r
+ Zero, \r
+ 0x03\r
+ }\r
+ }, \r
+\r
+ //----------------------------------------------------------------------------------\r
+ // C0.PS4 - Internal Display: Display Bandwidth to EBI\r
+ //----------------------------------------------------------------------------------\r
+ //\r
+ Package (0x33)\r
+ {\r
+ "PSTATE_SET", \r
+ 0x04, \r
+ "INTERNAL1_EBI_BANDWIDTH", \r
+ "*", \r
+ "BANDWIDTH", \r
+ 0x2B, \r
+ 0x1F, \r
+ Zero, \r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x000000031A4A9F80, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ 0x0000000302731B80, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ 0x00000002EA9B9780, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x03, \r
+ 0x00000002D2C41380, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x04, \r
+ 0x00000002BAEC8F80, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x05, \r
+ 0x00000002A3150B80, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x06, \r
+ 0x000000028B3D8780, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x07, \r
+ 0x0000000273660380, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x08, \r
+ 0x000000025B8E7F80, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x09, \r
+ 0x000000023C346000, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x0A, \r
+ 0x00000002245CDC00, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x0B, \r
+ 0x000000020C855800, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x0C, \r
+ 0x00000001F4ADD400, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x0D, \r
+ 0x00000001DCD65000, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x0E, \r
+ 0x00000001C4FECC00, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x0F, \r
+ 0x00000001AD274800, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x10, \r
+ 0x00000001954FC400, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x11, \r
+ 0x000000017D784000, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x12, \r
+ 0x0000000165A0BC00, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x13, \r
+ 0x000000014DC93800, \r
+ One\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x14, \r
+ 0x0000000135F1B400, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x15, \r
+ 0x000000011E1A3000, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x16, \r
+ 0x000000010642AC00, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x17, \r
+ 0xEE6B2800, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x18, \r
+ 0xD693A400, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x19, \r
+ 0xBEBC2000, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x1A, \r
+ 0xA6E49C00, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x1B, \r
+ 0x8F0D1800, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x1C, \r
+ 0x77359400, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x1D, \r
+ 0x5F5E1000, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x1E, \r
+ 0x59682F00, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x1F, \r
+ 0x53724E00, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x20, \r
+ 0x4D7C6D00, \r
+ 0x02\r
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+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x21, \r
+ 0x47868C00, \r
+ 0x02\r
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+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x22, \r
+ 0x4190AB00, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x23, \r
+ 0x3B9ACA00, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x24, \r
+ 0x35A4E900, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x25, \r
+ 0x2FAF0800, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x26, \r
+ 0x29B92700, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x27, \r
+ 0x23C34600, \r
+ 0x02\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x28, \r
+ 0x1DCD6500, \r
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+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x29, \r
+ 0x17D78400, \r
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+\r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x2A, \r
+ Zero, \r
+ 0x02\r
+ }\r
+ }\r
+ }, \r
+\r
+ //----------------------------------------------------------------------------------\r
+ // C1 - 3D Graphics Engine Power States\r
+ //----------------------------------------------------------------------------------\r
+ //\r
+ Package (0x10)\r
+ {\r
+ "COMPONENT", \r
+ One, \r
+ ToUUID ("30bdf1b5-28f7-4c0c-ac47-273dd1401e11"), \r
+ "GRAPHICS_POWER_STATES", \r
+ "HW_BLOCK_GRAPHICS", \r
+ Package (0x02)\r
+ {\r
+ "ENGINE", \r
+ "GRAPHICS"\r
+ }, \r
+\r
+ 0x03, \r
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+ {\r
+ "FSTATE", \r
+ Zero, \r
+ "ALL_ON", \r
+ Zero, \r
+ Zero, \r
+ 0x03\r
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+\r
+ Package (0x06)\r
+ {\r
+ "FSTATE", \r
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+ 0x2710, \r
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+ Package (0x06)\r
+ {\r
+ "FSTATE", \r
+ 0x02, \r
+ "PWR_OFF", \r
+ 0x2711, \r
+ 0x0A, \r
+ One\r
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+\r
+ //----------------------------------------------------------------------------------\r
+ // C1.PS0 - 3D Graphics Core P-State Set: Reset\r
+ //----------------------------------------------------------------------------------\r
+ //\r
+ Package (0x0A)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ "GRAPHICS_RESET", \r
+ "*", \r
+ "RESET", \r
+ 0x02, \r
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+ Zero, \r
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+ {\r
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+ Package (0x04)\r
+ {\r
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+ Package (0x0B)\r
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+ "PSTATE_SET", \r
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+ Package (0x04)\r
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+ "PSTATE", \r
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+\r
+ Package (0x04)\r
+ {\r
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+ 0x02\r
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+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ "PSTATE_SET", \r
+ 0x02, \r
+ "GRAPHICS_FOOTSWITCH_OVERRIDE", \r
+ "*", \r
+ "FOOTSWITCH_OVERRIDE", \r
+ 0x02, \r
+ One, \r
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+ {\r
+ "PSTATE", \r
+ Zero, \r
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+\r
+ Package (0x04)\r
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+ "PSTATE", \r
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+ }, \r
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+ Package (0x02)\r
+ {\r
+ "ENGINE_PSTATE_SET", \r
+ 0x03\r
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+\r
+ Package (0x16)\r
+ {\r
+ "ENGINE_PSTATE_SET", \r
+ 0x04, \r
+ "GRAPHICS_BW_CONTROL", \r
+ "BANDWIDTH", \r
+ 0x0D, \r
+ Zero, \r
+ "TRUE", \r
+ 0x04, \r
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+ {\r
+ "PSTATE", \r
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+ 0x00000001AE1B6C00, \r
+ 0x0180, \r
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+ {\r
+ "GPU", \r
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+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ 0x0000000172BDAB00, \r
+ 0x0100, \r
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+ {\r
+ "PSTATE", \r
+ 0x02, \r
+ 0x0000000134FD9000, \r
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+ 0xF278C100, \r
+ 0xC0, \r
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+\r
+ Package (0x05)\r
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+ "PSTATE", \r
+ 0x04, \r
+ 0xB71B0000, \r
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+ {\r
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+ 0xA25CF100, \r
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+ "PSTATE", \r
+ 0x06, \r
+ 0x826A3B00, \r
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+ {\r
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+ Package (0x05)\r
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+ "COMPONENT", \r
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+ Package (0x06)\r
+ {\r
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+ Package (0x0A)\r
+ {\r
+ "PSTATE_SET", \r
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+ "RESET", \r
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+ 0x02, \r
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+ "*", \r
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+ {\r
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+ {\r
+ "PSTATE", \r
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+ {\r
+ "PSTATE", \r
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+ Zero\r
+ }, \r
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+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ 0x08, \r
+ 0x000000025B8E7F80, \r
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+ }, \r
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+ {\r
+ "PSTATE", \r
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+ {\r
+ "PSTATE", \r
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+ {\r
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+ {\r
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+ {\r
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+ {\r
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+ {\r
+ "PSTATE", \r
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+ {\r
+ "PSTATE", \r
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+ {\r
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+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x09)\r
+ {\r
+ "COMPONENT", \r
+ 0x09, \r
+ ToUUID ("8dd40bdf-6fbd-45ed-8538-711d434b6ba1"), \r
+ "ALWAYS_ACTIVE_WP", \r
+ "HW_BLOCK_NONE", \r
+ Package (0x01)\r
+ {\r
+ "UNMANAGED"\r
+ }, \r
+\r
+ One, \r
+ Zero, \r
+ Package (0x06)\r
+ {\r
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+ "ALL_ON", \r
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+ })\r
+ Name (P001, Package (0x12)\r
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+ {\r
+ "GPU", \r
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+ }, \r
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+ {\r
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+ }, \r
+\r
+ Package (0x06)\r
+ {\r
+ "PSTATE", \r
+ 0x06, \r
+ 0x0EB8EBC0, \r
+ 0x06, \r
+ Package (0x02)\r
+ {\r
+ "GPU", \r
+ 0x23\r
+ }, \r
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+ {\r
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+ }\r
+ }, \r
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+ Package (0x06)\r
+ {\r
+ "PSTATE", \r
+ 0x07, \r
+ 0x0ABA9500, \r
+ 0x07, \r
+ Package (0x02)\r
+ {\r
+ "GPU", \r
+ Zero\r
+ }, \r
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+ Package (0x06)\r
+ {\r
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+ {\r
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+ }\r
+ })\r
+ Name (P002, Package (0x0B)\r
+ {\r
+ "ENGINE_PSTATE_SET", \r
+ 0x03, \r
+ "GRAPHICS_FREQ_CONTROL", \r
+ "CORE_CLOCK", \r
+ 0x02, \r
+ One, \r
+ "TRUE", \r
+ Zero, \r
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+ Package (0x06)\r
+ {\r
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+ Zero, \r
+ 0x10B07600, \r
+ Zero, \r
+ Package (0x02)\r
+ {\r
+ "GPU", \r
+ Zero\r
+ }, \r
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+ Package (0x01)\r
+ {\r
+ 0x80\r
+ }\r
+ }, \r
+\r
+ Package (0x06)\r
+ {\r
+ "PSTATE", \r
+ One, \r
+ Zero, \r
+ One, \r
+ Package (0x02)\r
+ {\r
+ "GPU", \r
+ Zero\r
+ }, \r
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+ Package (0x01)\r
+ {\r
+ Zero\r
+ }\r
+ }\r
+ })\r
+ If ((\_SB.SIDV >= 0x00020000))\r
+ {\r
+ DerefOf (RBUF [0x04]) [0x0E] = P001 /* \_SB_.GPU0.PMCL.P001 */\r
+ }\r
+ Else\r
+ {\r
+ DerefOf (RBUF [0x04]) [0x0E] = P002 /* \_SB_.GPU0.PMCL.P002 */\r
+ }\r
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+ Return (RBUF) /* \_SB_.GPU0.PMCL.RBUF */\r
+ }\r
+\r
+ // panel specific ROM data\r
+ Method (_ROM, 3, NotSerialized) // _ROM: Read-Only Memory\r
+ {\r
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+ 0x3C, 0x2F, 0x44, 0x69, 0x73, 0x70, 0x6C, 0x61,\r
+ 0x79, 0x52, 0x65, 0x73, 0x65, 0x74, 0x49, 0x6E,\r
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+ 0x6F, 0x75, 0x70, 0x3E, 0x0A, 0x00\r
+ })\r
+ \r
+ Local2 = PCFG /* \_SB_.GPU0._ROM.PCFG */\r
+ If ((Arg0 >= SizeOf (Local2)))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ Local0 = Arg0\r
+ }\r
+\r
+ If ((Arg1 > 0x1000))\r
+ {\r
+ Local1 = 0x1000\r
+ }\r
+ Else\r
+ {\r
+ Local1 = Arg1\r
+ }\r
+\r
+ If (((Local0 + Local1) > SizeOf (Local2)))\r
+ {\r
+ Local1 = (SizeOf (Local2) - Local0)\r
+ }\r
+\r
+ CreateField (Local2, (0x08 * Local0), (0x08 * Local1), RBUF)\r
+ Return (RBUF) /* \_SB_.GPU0._ROM.RBUF */\r
+ }\r
+\r
+ //\r
+ // IGC method - panel inverse gamma correction table.\r
+ //\r
+ // The buffer contains inverse gamma correction data for 3 color components, each with 256 16-bit integers.\r
+ // The buffer size is 3*256*2 = 1536 bytes.\r
+ // each table entry is represend by a 16-bit integer and data format in the buffer is described below:\r
+ //\r
+ // +--- 16 bits ---+--- 16 bits ---+--- 16 bits ---+---------+--- 16 bits ---+ 0\r
+ // | Red[0] | Red[1] | Red[2] | ... | Red[255] |\r
+ // +---------------+---------------+---------------+---------+---------------+ 512\r
+ // | Green[0] | Green[1] | Green[2] | ... | Green[255] |\r
+ // +---------------+---------------+---------------+---------+---------------+ 1024\r
+ // | Blue[0] | Blue[1] | Blue[2] | ... | Blue[255] |\r
+ // +---------------+---------------+---------------+---------+---------------+ 1536\r
+ //\r
+ Method (PIGC, 2, NotSerialized)\r
+ {\r
+ Name (RBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0.PIGC.RBUF */\r
+ }\r
+\r
+ //\r
+ // PCC method - panel color correction matrix\r
+ //\r
+ // Buffer format for HW which support 3X8 color correction matrix.\r
+ //\r
+ // The buffer contains color correction coefficients for 3 color components, each with 11 64-bit integers.\r
+ // The buffer size is 3*11*8 = 264 bytes.\r
+ // each coefficient in the matrix is represented by a long long integer (64-bit), and data format in the \r
+ // buffer is described below:\r
+ //\r
+ // +--64 bits--+--64 bits--+--------+--64 bits--+--64 bits--+--64 bits--+--64 bits--+ 0\r
+ // | Red[0] | Red[1] | ... | Red[7] | 0 | 0 | 0 |\r
+ // +-----------+-----------+--------+-----------+-----------+-----------+-----------+ 88\r
+ // | Green[0] | Green[1] | ... | Green[7] | 0 | 0 | 0 |\r
+ // +-----------+-----------+--------+-----------+-----------+-----------+-----------+ 176\r
+ // | Blue[0] | Blue[1] | ... | Blue[7] | 0 | 0 | 0 |\r
+ // +-----------+-----------+--------+-----------+-----------+-----------+-----------+ 264\r
+ //\r
+ // Buffer format for HW which support 3X11 color correction matrix.\r
+ //\r
+ // The buffer contains color correction coefficients for 3 color components, each with 11 64-bit integers.\r
+ // The buffer size is 3*11*8 = 264 bytes.\r
+ // each coefficient in the matrix is represented by a long long integer (64-bit), and data format in the \r
+ // buffer is described below:\r
+ //\r
+ // +--- 64 bits ---+--- 64 bits ---+--- 64 bits ---+-----------+--- 64 bits ---+ 0\r
+ // | Red[0] | Red[1] | Red[2] | ... | Red[10] |\r
+ // +---------------+---------------+---------------+-----------+---------------+ 88\r
+ // | Green[0] | Green[1] | Green[2] | ... | Green[10] |\r
+ // +---------------+---------------+---------------+-----------+---------------+ 176\r
+ // | Blue[0] | Blue[1] | Blue[2] | ... | Blue[10] |\r
+ // +---------------+---------------+---------------+-----------+---------------+ 264\r
+ //\r
+ Method (PPCC, 2, NotSerialized)\r
+ {\r
+ Name (RBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0.PPCC.RBUF */\r
+ }\r
+\r
+ //\r
+ // PGC method - panel segment gamma correction table\r
+ //\r
+ // there're thee components and each with 16 gamma correction segments. Each segment is defined\r
+ // as below with parameters, and each parameter is represented by a 32-bit integer (DWORD):\r
+ //\r
+ // +--4 bytes--+--4 bytes--+--4 bytes--+--4 bytes--+\r
+ // | enable | start | gain | offset | one gamma correction segment(16 bytes)\r
+ // +-----------+-----------+-----------+-----------+\r
+ //\r
+ // +--- 16 bytes ---+--- 16 bytes ---+--- 16 bytes ---+-----------+--- 16 bytes ---+ 0\r
+ // | red_seg[0] | red_seg[1] | red_seg[2] | ... | red_seg[15] |\r
+ // +----------------+----------------+----------------+-----------+----------------+ 256\r
+ // | green_seg[0] | green_seg[1] | green_seg[2] | ... | green_seg[15] |\r
+ // +----------------+----------------+----------------+-----------+----------------+ 512\r
+ // | blue_seg[0] | blue_seg[1] | blue_seg[2] | ... | blue_seg[15] |\r
+ // +----------------+----------------+----------------+-----------+----------------+ 768\r
+ //\r
+ Method (PGCT, 2, NotSerialized)\r
+ {\r
+ Name (RBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0.PGCT.RBUF */\r
+ }\r
+\r
+ //\r
+ // PLGC method - panel linear gamma correction table\r
+ //\r
+ // There are three color components, each color component has 1024 entries. each entry is 2 bytes.\r
+ //\r
+ // +--- 2 bytes ---+--- 2 bytes ---+--- 2 bytes ---+-----------+--- 2 bytes ---+ 0\r
+ // | red[0] | red[1] | red[2] | ... | red[1023] |\r
+ // +---------------+---------------+---------------+-----------+---------------+ 2048\r
+ // | green[0] | green[1] | green[2] | ... | green[1023] |\r
+ // +---------------+---------------+---------------+-----------+---------------+ 4096\r
+ // | blue[0] | blue[1] | blue[2] | ... | blue[1023] |\r
+ // +---------------+---------------+---------------+-----------+---------------+ 6144\r
+ //\r
+ Method (PLGC, 3, NotSerialized)\r
+ {\r
+ Name (TBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ If ((Arg1 >= SizeOf (TBUF)))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ Local1 = Arg1\r
+ }\r
+\r
+ If ((Arg2 > 0x1000))\r
+ {\r
+ Local2 = 0x1000\r
+ }\r
+ Else\r
+ {\r
+ Local2 = Arg2\r
+ }\r
+\r
+ If (((Local1 + Local2) > SizeOf (TBUF)))\r
+ {\r
+ Local2 = (SizeOf (TBUF) - Local1)\r
+ }\r
+\r
+ CreateField (TBUF, (0x08 * Local1), (0x08 * Local2), RBUF)\r
+ Return (RBUF) /* \_SB_.GPU0.PLGC.RBUF */\r
+ }\r
+\r
+ //\r
+ // HSIC method - HSIC settings\r
+ //\r
+ // Hue, Saturation, Intensity, Contrast levels, the first parameter enable/disable HSIC control,\r
+ // followed by HSIC level values, each level ranges from -100 to 100, represented by a 32-bit integer:\r
+ //\r
+ // +--4 bytes--+--4 bytes--+--4 bytes--+--4 bytes--+--4 bytes--++\r
+ // | Enable | Hue | Saturation| Intensity | Contrast |\r
+ // +-----------+-----------+-----------+-----------+-----------++\r
+ //\r
+ //\r
+ Method (HSIC, 2, NotSerialized)\r
+ {\r
+ Name (RBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0.HSIC.RBUF */\r
+ }\r
+\r
+ //\r
+ // PGMT - panel gamut mapping table for HW which support 9x9x9 gamut mapping:\r
+ //\r
+ // This method returns the gamut mapping table for a panel.\r
+ //\r
+ // There are three components. Each component has 8 tables and a total of 729 entries. \r
+ // Each value is represented by a 16-bit integer:\r
+ //\r
+ // Table ID Entries \r
+ // 0 125 \r
+ // 1 100\r
+ // 2 80\r
+ // 3 100\r
+ // 4 100\r
+ // 5 80\r
+ // 6 64\r
+ // 7 80 \r
+ //\r
+ // +----- 16 bits -----+----- 16 bits ------+----- 16 bits -----+-----------+----- 16 bits -------+\r
+ // | red_comp[0][0] | red_comp[0][1] | red_comp[0][2] | ... | red_comp[7][79] |\r
+ // +-------------------+--------------------+-------------------+---------------------------------+\r
+ // | green_comp[0][0] | green_comp[0][1] | green_comp[0][2] | ... | green_comp[7][79] |\r
+ // +-------------------+--------------------+-------------------+---------------------------------+\r
+ // | blue_comp[0][0] | blue_comp[0][1] | blue_comp[0][2] | ... | blue_comp[7][79] |\r
+ // +-------------------+--------------------+-------------------+---------------------------------+\r
+ //\r
+ Method (PGMT, 2, NotSerialized)\r
+ {\r
+ Name (TBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ If ((Arg0 >= SizeOf (TBUF)))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ Local0 = Arg0\r
+ }\r
+\r
+ If ((Arg1 > 0x1000))\r
+ {\r
+ Local1 = 0x1000\r
+ }\r
+ Else\r
+ {\r
+ Local1 = Arg1\r
+ }\r
+\r
+ If (((Local0 + Local1) > SizeOf (TBUF)))\r
+ {\r
+ Local1 = (SizeOf (TBUF) - Local0)\r
+ }\r
+\r
+ CreateField (TBUF, (0x08 * Local0), (0x08 * Local1), RBUF)\r
+ Return (RBUF) /* \_SB_.GPU0.PGMT.RBUF */\r
+ }\r
+\r
+ //\r
+ // PWGM - panel gamut mapping data for HW which support 17x17x17 gamut mapping\r
+ // \r
+ // This data's header which has two fields: \r
+ // NumSamplesPerColorComponent: Number samples per color component in gamut mapping table.\r
+ // NumSegmentsPerColor : Number of segments per color component.\r
+ // NumSegmentsPerColor must equal 0 or NumSamplesPerColorComponent -1.\r
+ //\r
+ // This data also can have two tables, one is 3d table, one is segment table.\r
+ // Segment table is only required if NumSegmentsPerColor != 0.\r
+ // \r
+ // 3d table: There are three components. If number samples per component is N = NumSamplesPerColorComponent,\r
+ // total entries are NxNxN per component. Each value is represented by a 16-bit integer:\r
+ // Segment table: There are three components, table entries are uNumSegmentsPerColor per component, \r
+ // each entry is 32 bit value. \r
+ // \r
+ // Table data header:\r
+ // +--------- 32 bits ----------+------- 32 bits -----+\r
+ // | NumSamplesPerColorComponent| NumSegmentsPerColor |\r
+ // +----------------------------+---------------------+ 8 bytes\r
+ //\r
+ // 3d table:\r
+ // +---- 16 bits ----+---- 16 bits ----+---- 16 bits ----+-------------+------- 16 bits -----------+ 8\r
+ // | red_comp[0] | red_comp[1] | red_comp[2] | ... | red_comp[N x N x N - 1 ] |\r
+ // +-----------------+-----------------+-----------------+-------------+---------------------------+ NxNxNx2 + 8\r
+ // | green_comp[0] | green_comp[1] | green_comp[2] | ... | green_comp[N x N x N - 1] |\r
+ // +-----------------+-----------------+-----------------+-------------+---------------------------+ 2xNxNxNx2 + 8\r
+ // | blue_comp[0] | blue_comp[1] | blue_comp[2] | ... | blue_comp[N x N x N - 1] |\r
+ // +-----------------+-----------------+-----------------+-------------+---------------------------+ 3xNxNxNx2 + 8\r
+ //\r
+ // Segment table: ( if NumSegmentsPerColor = 0, there is no segment table).\r
+ // +----- 32 bits ------+----- 32 bits ------+------ 32 bits -----+-------------+-------- 32 bits -------+ 3xNxNxNx2 + 8\r
+ // | sg_red_comp[[0] | sg_red_comp[1] | sg_red_comp[2] | ... | sg_red_comp[N-2] |\r
+ // +--------------------+--------------------+--------------------+-------------+------------------------+ (N-1)x4 + 3xNxNxNx2 + 8\r
+ // | sg_green_comp[0] | sg_ green_comp[1] | sg_ green_comp[2] | ... | sg_green_comp[N-2] |\r
+ // +--------------------+--------------------+--------------------+-------------+------------------------+ 2x(N-1)x4 + 3xNxNxNx2 + 8\r
+ // | sg_ blue_comp[0] | sg_ blue_comp[1] | sg_ blue_comp[2] | ... | sg_ blue_comp[N-2] |\r
+ // +--------------------+--------------------+------------------- +-------------+------------------------+ 3x(N-1)x4 + 3xNxNxNx2 + 8\r
+ //\r
+ // Maximum size = 3 x(17 - 1) x 4 + 3 x 17 x 17 x 17 x 2 + 8 = 29678 bytes.\r
+ //\r
+ Method (PWGM, 2, NotSerialized)\r
+ {\r
+ Name (TBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ If ((Arg0 >= SizeOf (TBUF)))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ Local0 = Arg0\r
+ }\r
+\r
+ If ((Arg1 > 0x1000))\r
+ {\r
+ Local1 = 0x1000\r
+ }\r
+ Else\r
+ {\r
+ Local1 = Arg1\r
+ }\r
+\r
+ If (((Local0 + Local1) > SizeOf (TBUF)))\r
+ {\r
+ Local1 = (SizeOf (TBUF) - Local0)\r
+ }\r
+\r
+ CreateField (TBUF, (0x08 * Local0), (0x08 * Local1), RBUF)\r
+ Return (RBUF) /* \_SB_.GPU0.PWGM.RBUF */\r
+ }\r
+\r
+ //\r
+ // PGRT - panel gamma response table\r
+ //\r
+ // This method returns the Gamma response table for a panel.\r
+ // The table is given in 2 arrays, one representing the x axis or grayscale and other \r
+ // representing the y axis or luminance. \r
+ //\r
+ // The table is given in a 256 entries array, where the first entry value represents\r
+ // the luminance (Y) achieved when displaying black on the screen (shade value is 0\r
+ // for all R, G and B) and the last entry represents the luminance (Y) achieved when \r
+ // displaying white on the screen (shade value is 255 for all R, G and B).\r
+ // \r
+ // The array must be 256 entries.\r
+ //\r
+ // The range of each entry must be from 0 to 0xffff\r
+ //\r
+ // Values are least significant byte first. E.g. {0x01, 0x00} represents 0x1 and\r
+ // {0x02, 0x01} represents 0x0102\r
+ //\r
+ // +--- 2 bytes ---+--- 2 bytes ---+--- 2 bytes ---+-----------+--- 2 bytes ---+ \r
+ // | Y[0] | Y[1] | Y[2] | ... | Y[255] |\r
+ // +---------------+---------------+---------------+-----------+---------------+ \r
+ Method (PGRT, 2, NotSerialized)\r
+ {\r
+ Name (RBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0.PGRT.RBUF */\r
+ }\r
+\r
+ //\r
+ // PBRT - panel backlight response table\r
+ //\r
+ // This method returns the Backlight response table for a panel.\r
+ // The table is given in a 256 entries array, where the first entry value represents\r
+ // the backlight level (BL) to achieve 0 luminance and the last entry represents \r
+ // the highest backlight level to achieve the maximum desired luminance. \r
+ // In other words, this array serves as a map from luminance to backlight levels,\r
+ // where the index is the desired luminance level and the value (or output) is \r
+ // the backlight level to be sent to the hardware (backlight controller).\r
+ // \r
+ // The array must be 256 entries.\r
+ //\r
+ // The range of each entry must be from 0 to 0xffff\r
+ //\r
+ // Values are least significant byte first. E.g. {0x01, 0x00} represents 0x1 and\r
+ // {0x02, 0x01} represents 0x0102\r
+ //\r
+ // +--- 2 bytes ---+--- 2 bytes ---+--- 2 bytes ---+-----------+--- 2 bytes ---+ \r
+ // | BL[0] | BL[1] | BL[2] | ... | BL[255] |\r
+ // +---------------+---------------+---------------+-----------+---------------+ \r
+ Method (PBRT, 2, NotSerialized)\r
+ {\r
+ Name (RBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0.PBRT.RBUF */\r
+ }\r
+\r
+ Method (PBRC, 2, NotSerialized)\r
+ {\r
+ Name (RBUF, Buffer (0x02)\r
+ {\r
+ 0x00, 0x00 // ..\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0.PBRC.RBUF */\r
+ }\r
+\r
+ //\r
+ // DITH method - Dithering settings\r
+ //\r
+ // Dithering matrix could have following two formats:\r
+ //\r
+ // Format 1:\r
+ // +--1 byte--------+--1 byte--------+--1 byte--------+--1 byte--------+\r
+ // | Element[0,0] | Element[0,1] | Element[0,2] | Element[0,3] |\r
+ // | Element[1,0] | Element[1,1] | Element[1,2] | Element[1,3] |\r
+ // | Element[2,0] | Element[2,1] | Element[2,2] | Element[2,3] |\r
+ // | Element[3,0] | Element[3,1] | Element[3,2] | Element[3,3] |\r
+ // | Bit Depth C0 | Bit Depth C1 | Bit Depth C2 | Reserved(0x0) |\r
+ // +----------------+----------------+----------------+----------------+\r
+ // | Dithering mode (4 bytes) (0: not supported, 1:Spatial, 2:Temporal)|\r
+ // +----------------+----------------+----------------+----------------+\r
+ //\r
+ // There is dithering mode in Format 1.\r
+ //\r
+ // Format 2: \r
+ //\r
+ // +--1 byte--------+--1 byte--------+--1 byte--------+--1 byte--------++\r
+ // | Element[0,0] | Element[0,1] | Element[0,2] | Element[0,3] |\r
+ // | Element[1,0] | Element[1,1] | Element[1,2] | Element[1,3] |\r
+ // | Element[2,0] | Element[2,1] | Element[2,2] | Element[2,3] |\r
+ // | Element[3,0] | Element[3,1] | Element[3,2] | Element[3,3] |\r
+ // | Bit Depth C2 | Bit Depth C1 | Bit Depth C0 | Reserved(0x0) |\r
+ // +----------------+----------------+----------------+----------------+\r
+ //\r
+ // There is no dithering mode in Format 2. Default dither mode: spatial.\r
+ //\r
+ Method (DITH, 2, NotSerialized)\r
+ {\r
+ Name (RBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0.DITH.RBUF */\r
+ }\r
+\r
+ ///\r
+ // BLCP Method - Backlight control packet method, returns a \r
+ // command buffer for a specific backlight level\r
+ //\r
+ // Input Parameters\r
+ // Backlight level - Integer from 0% to 100%\r
+ //\r
+ // Output Parameters\r
+ //\r
+ // Packet format:\r
+ // +--32bits--+-----variable (8bit alignment)--+\r
+ // | Header | Packet payload |\r
+ // +----------+--------------------------------+\r
+ //\r
+ // For DSI Command packets, payload data must be in this format\r
+ //\r
+ // +-- 8 bits-+----variable (8bit alignment)----+\r
+ // | Cmd Type | Packet Data |\r
+ // +----------+---------------------------------+\r
+ //\r
+ // For I2C Command packets, payload data must be in this format\r
+ //\r
+ // +-- 16 bits-+----variable (8bit alignment)----+\r
+ // | Address | Command Data |\r
+ // +-----------+---------------------------------+\r
+ //\r
+ // All packets must follow with a DWORD header with 0x0\r
+ //\r
+ Method (BLCP, 1, Serialized)\r
+ {\r
+ Name(RBUF, Buffer(0x100){})\r
+ Store(0x0, LOCAL0)\r
+ \r
+ CreateField(RBUF, Multiply(LOCAL0, 8), 32, PKHR)\r
+ Add(LOCAL0, 4, LOCAL0)\r
+ \r
+ CreateField(RBUF, Multiply(LOCAL0, 8), 8, PKCM)\r
+ Add(LOCAL0, 1, LOCAL0)\r
+ \r
+ CreateField(RBUF, Multiply(LOCAL0, 8), 8, PKDS)\r
+ Add(LOCAL0, 1, LOCAL0)\r
+ \r
+ CreateField(RBUF, Multiply(LOCAL0, 8), 8, PKUB)\r
+ Add(LOCAL0, 1, LOCAL0)\r
+ \r
+ CreateField(RBUF, Multiply(LOCAL0, 8), 8, PKLB)\r
+ Add(LOCAL0, 1, LOCAL0)\r
+ \r
+ // Add additonal ON command\r
+ Name (BON, // Backlight on\r
+ Buffer() {0x39, // Command 39\r
+ 0x53, 0x24}) // Manual backlight control\r
+ // Create the packet header field\r
+ CreateField(RBUF, Multiply(LOCAL0, 8), 32, PKH2) // Create the packet header\r
+ Add(LOCAL0, 4, LOCAL0) // Increment the data pointer\r
+ // Create the packet payload field\r
+ CreateField(RBUF, Multiply(LOCAL0, 8), 32, PKP2) // Create the packet payload\r
+ Store(Sizeof(BON), PKH2) // Store the size of the buffer in the header \r
+ Store(BON, PKP2) // Store the packet payload\r
+ Add(LOCAL0, Sizeof(BON), LOCAL0) // Increment the offset by the packet size\r
+ \r
+ CreateDWordField(RBUF, Multiply(LOCAL0, 8), EOF)\r
+ \r
+ /*LOCAL1 = Arg0 * 10 // to map to 1024\r
+ LOCAL2 = LOCAL1 >> 8\r
+ LOCAL1 &= 0xFF*/\r
+ \r
+ LOCAL1 = Arg0 * 1023\r
+ LOCAL1 /= 0xFF\r
+ \r
+ LOCAL2 = Arg0 * 1023\r
+ LOCAL2 /= 0xFF00\r
+ LOCAL2 &= 3\r
+ \r
+ PKHR = 4\r
+ PKCM = 0x39\r
+ PKDS = 0x51\r
+ //PKUB = 0x00\r
+ //PKLB = 0x10\r
+ PKUB = LOCAL2\r
+ PKLB = LOCAL1\r
+ \r
+ EOF = 0x0\r
+ \r
+ Return(RBUF)\r
+ }\r
+\r
+ Method (ROM2, 3, NotSerialized)\r
+ {\r
+ Name (PCFG, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ While (One)\r
+ {\r
+ If (One)\r
+ {\r
+ Local2 = PCFG /* \_SB_.GPU0.ROM2.PCFG */\r
+ }\r
+\r
+ Break\r
+ }\r
+\r
+ If ((Arg0 >= SizeOf (Local2)))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ Local0 = Arg0\r
+ }\r
+\r
+ If ((Arg1 > 0x1000))\r
+ {\r
+ Local1 = 0x1000\r
+ }\r
+ Else\r
+ {\r
+ Local1 = Arg1\r
+ }\r
+\r
+ If (((Local0 + Local1) > SizeOf (Local2)))\r
+ {\r
+ Local1 = (SizeOf (Local2) - Local0)\r
+ }\r
+\r
+ CreateField (Local2, (0x08 * Local0), (0x08 * Local1), RBUF)\r
+ Return (RBUF) /* \_SB_.GPU0.ROM2.RBUF */\r
+ }\r
+\r
+ Method (IGC2, 2, NotSerialized)\r
+ {\r
+ Name (RBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0.IGC2.RBUF */\r
+ }\r
+\r
+ Method (PCC2, 2, NotSerialized)\r
+ {\r
+ Name (RBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0.PCC2.RBUF */\r
+ }\r
+\r
+ Method (GCT2, 2, NotSerialized)\r
+ {\r
+ Name (RBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0.GCT2.RBUF */\r
+ }\r
+\r
+ Method (LGC2, 3, NotSerialized)\r
+ {\r
+ Name (TBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ If ((Arg1 >= SizeOf (TBUF)))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ Local1 = Arg1\r
+ }\r
+\r
+ If ((Arg2 > 0x1000))\r
+ {\r
+ Local2 = 0x1000\r
+ }\r
+ Else\r
+ {\r
+ Local2 = Arg2\r
+ }\r
+\r
+ If (((Local1 + Local2) > SizeOf (TBUF)))\r
+ {\r
+ Local2 = (SizeOf (TBUF) - Local1)\r
+ }\r
+\r
+ CreateField (TBUF, (0x08 * Local1), (0x08 * Local2), RBUF)\r
+ Return (RBUF) /* \_SB_.GPU0.LGC2.RBUF */\r
+ }\r
+\r
+ Method (HSI2, 2, NotSerialized)\r
+ {\r
+ Name (RBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0.HSI2.RBUF */\r
+ }\r
+\r
+ Method (GMT2, 2, NotSerialized)\r
+ {\r
+ Name (TBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ If ((Arg0 >= SizeOf (TBUF)))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ Local0 = Arg0\r
+ }\r
+\r
+ If ((Arg1 > 0x1000))\r
+ {\r
+ Local1 = 0x1000\r
+ }\r
+ Else\r
+ {\r
+ Local1 = Arg1\r
+ }\r
+\r
+ If (((Local0 + Local1) > SizeOf (TBUF)))\r
+ {\r
+ Local1 = (SizeOf (TBUF) - Local0)\r
+ }\r
+\r
+ CreateField (TBUF, (0x08 * Local0), (0x08 * Local1), RBUF)\r
+ Return (RBUF) /* \_SB_.GPU0.GMT2.RBUF */\r
+ }\r
+\r
+ Method (WGM2, 2, NotSerialized)\r
+ {\r
+ Name (TBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ If ((Arg0 >= SizeOf (TBUF)))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ Local0 = Arg0\r
+ }\r
+\r
+ If ((Arg1 > 0x1000))\r
+ {\r
+ Local1 = 0x1000\r
+ }\r
+ Else\r
+ {\r
+ Local1 = Arg1\r
+ }\r
+\r
+ If (((Local0 + Local1) > SizeOf (TBUF)))\r
+ {\r
+ Local1 = (SizeOf (TBUF) - Local0)\r
+ }\r
+\r
+ CreateField (TBUF, (0x08 * Local0), (0x08 * Local1), RBUF)\r
+ Return (RBUF) /* \_SB_.GPU0.WGM2.RBUF */\r
+ }\r
+\r
+ Method (GRT2, 2, NotSerialized)\r
+ {\r
+ Name (RBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0.GRT2.RBUF */\r
+ }\r
+\r
+ Method (BRT2, 2, NotSerialized)\r
+ {\r
+ Name (RBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0.BRT2.RBUF */\r
+ }\r
+\r
+ Method (DIT2, 2, NotSerialized)\r
+ {\r
+ Name (RBUF, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0.DIT2.RBUF */\r
+ }\r
+\r
+ Method (BLC2, 1, NotSerialized)\r
+ {\r
+ Name (RBUF, Buffer (0x0100){})\r
+ Return (RBUF) /* \_SB_.GPU0.BLC2.RBUF */\r
+ }\r
+\r
+ Method (ROE1, 3, NotSerialized)\r
+ {\r
+ Name (PCFG, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ Local2 = PCFG /* \_SB_.GPU0.ROE1.PCFG */\r
+ If ((Arg0 >= SizeOf (Local2)))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ Local0 = Arg0\r
+ }\r
+\r
+ If ((Arg1 > 0x1000))\r
+ {\r
+ Local1 = 0x1000\r
+ }\r
+ Else\r
+ {\r
+ Local1 = Arg1\r
+ }\r
+\r
+ If (((Local0 + Local1) > SizeOf (Local2)))\r
+ {\r
+ Local1 = (SizeOf (Local2) - Local0)\r
+ }\r
+\r
+ CreateField (Local2, (0x08 * Local0), (0x08 * Local1), RBUF)\r
+ Return (RBUF) /* \_SB_.GPU0.ROE1.RBUF */\r
+ }\r
+\r
+ Name (_DOD, Package (0x01) // _DOD: Display Output Devices\r
+ {\r
+ 0x00024321\r
+ })\r
+\r
+ // Enumeration and device info for the AVStream child driver\r
+ //\r
+ Device (AVS0)\r
+ {\r
+ // The address for this device (Same as in _DOD, above)\r
+ //\r
+ Name (_ADR, 0x00024321) // _ADR: Address\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, Buffer (0x02)\r
+ {\r
+ 0x79, 0x00 // y.\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0.AVS0._CRS.RBUF */\r
+ }\r
+\r
+ Name (_DEP, Package (0x03) // _DEP: Dependencies\r
+ {\r
+ \_SB.MMU0, \r
+ \_SB.IMM0, \r
+ \_SB.VFE0\r
+ })\r
+ }\r
+\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ //------------------------------------------------------------------------------\r
+ // Child Device Info\r
+ // This method includes information for child devices\r
+ //------------------------------------------------------------------------------\r
+ //\r
+ Method (CHDV, 0, NotSerialized)\r
+ {\r
+ Name (CHIF, Package (0x02)\r
+ {\r
+ One, // Number of Child devices\r
+ Package (0x07)\r
+ {\r
+ "CHILDDEV", \r
+ Zero, // Child ID\r
+ 0x00024321, // ACPI UID\r
+ "QCOM_AVStream_850", // Hardware ID\r
+ Zero, // Instance ID\r
+ "Qualcomm Camera AVStream Mini Driver", // Device Text\r
+ Package (0x04)\r
+ {\r
+ "COMPATIBLEIDS", \r
+ 0x02, \r
+ "VEN_QCOM&DEV__AVSTREAM", \r
+ "QCOM_AVSTREAM"\r
+ }\r
+ }\r
+ })\r
+ Return (CHIF) /* \_SB_.GPU0.CHDV.CHIF */\r
+ }\r
+\r
+ Method (DPCC, 2, NotSerialized)\r
+ {\r
+ Return (\_SB.CCST)\r
+ }\r
+\r
+ Method (DPIN, 2, NotSerialized)\r
+ {\r
+ Return (\_SB.PINA)\r
+ }\r
+\r
+ Method (REGR, 0, NotSerialized)\r
+ {\r
+ Name (RBUF, Package (0x1B)\r
+ {\r
+ Package (0x02)\r
+ {\r
+ "ForceMaxPerf", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ForceStablePowerSettings", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ForceActive", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DeferForceActive", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PreventPowerCollapse", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DisableThermalMitigation", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DisableTzMDSSRestore", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "UseLowPTForGfxPerProcess", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DisableCDI", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "GPU64bAddrEnabled", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "MaxPreemptionOffsets", \r
+ 0x80\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "MaxRequiredDmaQueueEntry", \r
+ 0x08\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "SupportsSecureInAperture", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ZeroFlagSupportInPTE", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "SupportsCacheCoherency", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "SupportsSHMBridge", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "SecureCarveoutSize", \r
+ 0x00200000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "UBWCEnable", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "allowDrmAbove1080p", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ZeroPageLowAddr", \r
+ 0x85F00000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "ZeroPageHighAddr", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "KeepUefiBuffer", \r
+ One\r
+ }, \r
+\r
+ Package (0x06)\r
+ {\r
+ "GRAPHICS", \r
+ Package (0x02)\r
+ {\r
+ "ForceActive", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "EnableSystemCache", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "EnableSysCacheForGpuhtw", \r
+ One\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ "DCVS", \r
+ Package (0x02)\r
+ {\r
+ "Enable", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "IncreaseFilterBw", \r
+ 0x00020000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DecreaseFilterBw", \r
+ 0x3333\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TargetBusyPct", \r
+ 0x55\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "SampleRate", \r
+ 0x3C\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "TargetBusyPctOffscreen", \r
+ 0x4B\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "SampleRateOffscreen", \r
+ 0x14\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "GpuResetValue", \r
+ 0x11490C80\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "BusResetValue", \r
+ 0x04B0\r
+ }\r
+ }, \r
+\r
+ Package (0x06)\r
+ {\r
+ "A6x", \r
+ Package (0x02)\r
+ {\r
+ "SleepMode", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DisableICG", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DisableGmuCG", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "EnableFallbackToDisableSecureMode", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DisableCPCrashDump", \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "VIDEO", \r
+ Package (0x02)\r
+ {\r
+ "ForceActive", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PreventPowerCollapse", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "EnableSystemCache", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "CRYPTO", \r
+ Package (0x02)\r
+ {\r
+ "EnableCryptoVA", \r
+ One\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "VIDEO_ENCODER", \r
+ Package (0x02)\r
+ {\r
+ "ForceActive", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "PreventPowerCollapse", \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x07)\r
+ {\r
+ "DISPLAY", \r
+ Package (0x02)\r
+ {\r
+ "DisableMiracast", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "EnableOEMDriverDependency", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "EnableBridgeDriverDependency", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DisableRotator", \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DisableMDPBLT", \r
+ One\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ "DisableExternal", \r
+ Zero\r
+ }\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.GPU0.REGR.RBUF */\r
+ }\r
+ }\r
+//#endif\r
+\r
+ // \r
+ // Secure Channel Manager (SCM) Driver\r
+ //\r
+ Device (SCM0)\r
+ {\r
+ Name (_HID, "QCOM0214") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ }\r
+\r
+ //\r
+ // TrEE Driver\r
+ //\r
+ Device (TREE)\r
+ {\r
+ Name (_HID, "QCOM02BB") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Method (MCGT, 0, NotSerialized)\r
+ {\r
+ Name (TPKG, Package (0x01)\r
+ {\r
+ Package (0x02)\r
+ {\r
+ Zero, \r
+ Zero\r
+ }\r
+ })\r
+ DerefOf (TPKG [Zero]) [Zero] = TCMA /* \_SB_.TCMA */\r
+ DerefOf (TPKG [Zero]) [One] = TCML /* \_SB_.TCML */\r
+ Return (TPKG) /* \_SB_.TREE.MCGT.TPKG */\r
+ }\r
+ }\r
+\r
+ //\r
+ //SPMI driver.\r
+ //\r
+ Device (SPMI)\r
+ {\r
+ Name (_HID, "QCOM0216") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_CID, "PNP0CA2") // _CID: Compatible ID\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0C400000, // Address Base\r
+ 0x02800000, // Address Length\r
+ )\r
+ })\r
+ Return (RBUF) /* \_SB_.SPMI._CRS.RBUF */\r
+ }\r
+\r
+ Method (CONF, 0, NotSerialized)\r
+ {\r
+ Name (XBUF, Buffer (0x1A)\r
+ {\r
+ /* 0000 */ 0x00, 0x01, 0x01, 0x01, 0xFF, 0x00, 0x02, 0x00, // ........\r
+ /* 0008 */ 0x0A, 0x07, 0x04, 0x07, 0x01, 0xFF, 0x10, 0x01, // ........\r
+ /* 0010 */ 0x00, 0x01, 0x0C, 0x40, 0x00, 0x00, 0x02, 0x80, // ...@....\r
+ /* 0018 */ 0x00, 0x00 // ..\r
+ })\r
+ Return (XBUF) /* \_SB_.SPMI.CONF.XBUF */\r
+ }\r
+ }\r
+\r
+ //\r
+ // TLMM controller.\r
+ //\r
+ Device (GIO0)\r
+ {\r
+ Name (_HID, "QCOM0217") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ OperationRegion (GPOR, GeneralPurposeIo, Zero, One)\r
+ Field (\_SB.GIO0.GPOR, ByteAcc, NoLock, Preserve)\r
+ {\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ // TLMM register address space\r
+ Memory32Fixed (ReadWrite,\r
+ 0x03400000, // Address Base\r
+ 0x00C00000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )\r
+ {\r
+ 0x000000F0,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )\r
+ {\r
+ 0x000000F0,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )\r
+ {\r
+ 0x000000F0,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, )\r
+ {\r
+ 0x00000288,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, )\r
+ {\r
+ 0x00000238,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, )\r
+ {\r
+ 0x00000226,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, )\r
+ {\r
+ 0x00000232,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, )\r
+ {\r
+ 0x00000284,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, )\r
+ {\r
+ 0x0000021F,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, )\r
+ {\r
+ 0x00000236,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Shared, ,, )\r
+ {\r
+ 0x0000023D,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.GIO0._CRS.RBUF */\r
+ }\r
+\r
+ // ACPI method to return Num pins\r
+ Method (OFNI, 0, NotSerialized)\r
+ {\r
+ Name (RBUF, Buffer (0x02)\r
+ {\r
+ 0x96, // 0: TOTAL_GPIO_PINS\r
+ 0x00 // 1: TOTAL_GPIO_PINS // ..\r
+ })\r
+ Return (RBUF) /* \_SB_.GIO0.OFNI.RBUF */\r
+ }\r
+\r
+ Name (GABL, Zero)\r
+ Method (_REG, 2, NotSerialized) // _REG: Region Availability\r
+ {\r
+ If ((Arg0 == 0x08))\r
+ {\r
+ GABL = Arg1\r
+ }\r
+ }\r
+\r
+ Name (_AEI, Buffer (0x02) // _AEI: ACPI Event Interrupts\r
+ {\r
+ 0x79, 0x00 // y.\r
+ })\r
+ }\r
+\r
+ //PCIE asl\r
+ OperationRegion (CP00, SystemMemory, 0x13000000, 0x24)\r
+ Field (CP00, DWordAcc, NoLock, Preserve)\r
+ {\r
+ MVIO, 32, \r
+ MV01, 32, \r
+ MV02, 32, \r
+ MV03, 32, \r
+ MV04, 32, \r
+ MV11, 32, \r
+ MV12, 32, \r
+ MV13, 32, \r
+ MV14, 32\r
+ }\r
+\r
+ OperationRegion (CP01, SystemMemory, 0x01C00000, 0x1004)\r
+ Field (CP01, DWordAcc, NoLock, Preserve)\r
+ {\r
+ PSC0, 32, \r
+ Offset (0x20), \r
+ PPC0, 32, \r
+ PPS0, 32, \r
+ Offset (0x1B0), \r
+ PLT0, 32, \r
+ Offset (0x358), \r
+ PSL0, 32, \r
+ Offset (0x360), \r
+ WBL0, 32, \r
+ WBH0, 32, \r
+ WLL0, 32, \r
+ WLH0, 32, \r
+ RBL0, 32, \r
+ RBH0, 32, \r
+ RLL0, 32, \r
+ RLH0, 32, \r
+ PPEB, 32, \r
+ Offset (0x398), \r
+ WBL1, 32, \r
+ WBH1, 32, \r
+ WLL1, 32, \r
+ WLH1, 32, \r
+ RBL1, 32, \r
+ RBH1, 32, \r
+ RLL1, 32, \r
+ RLH1, 32, \r
+ Offset (0x1000), \r
+ PDT0, 32\r
+ }\r
+\r
+ OperationRegion (CP02, SystemMemory, 0x01C06000, 0x0188)\r
+ Field (CP02, DWordAcc, NoLock, Preserve)\r
+ {\r
+ Offset (0x0C), \r
+ QCB1, 32, \r
+ QSEC, 32, \r
+ QAP1, 32, \r
+ QAP2, 32, \r
+ QSP1, 32, \r
+ QSP2, 32, \r
+ QSS1, 32, \r
+ QSS2, 32, \r
+ Offset (0x34), \r
+ QECE, 32, \r
+ QCE1, 32, \r
+ QSCC, 32, \r
+ QSBE, 32, \r
+ Offset (0x48), \r
+ QCPI, 32, \r
+ Offset (0x5C), \r
+ QCED, 32, \r
+ QCP0, 32, \r
+ Offset (0x68), \r
+ QPR0, 32, \r
+ Offset (0x70), \r
+ QPC0, 32, \r
+ Offset (0x80), \r
+ QSES, 32, \r
+ Offset (0x88), \r
+ QCRC, 32, \r
+ Offset (0x90), \r
+ QCLC, 32, \r
+ Offset (0x98), \r
+ QC1M, 32, \r
+ QC2M, 32, \r
+ QC3M, 32, \r
+ Offset (0xB0), \r
+ QSM0, 32, \r
+ Offset (0xB8), \r
+ QS1M, 32, \r
+ QS2M, 32, \r
+ QS3M, 32, \r
+ Offset (0xD8), \r
+ QIG0, 32, \r
+ QIG1, 32, \r
+ Offset (0xF0), \r
+ QCVT, 32, \r
+ QVT1, 32, \r
+ QVT2, 32, \r
+ Offset (0x11C), \r
+ QTT1, 32, \r
+ QTT2, 32, \r
+ Offset (0x138), \r
+ QCCS, 32, \r
+ QCHS, 32, \r
+ Offset (0x148), \r
+ QCD0, 32, \r
+ Offset (0x154), \r
+ QCCN, 32, \r
+ Offset (0x15C), \r
+ QCCC, 32, \r
+ Offset (0x164), \r
+ QMCS, 32, \r
+ Offset (0x184), \r
+ QCCM, 32\r
+ }\r
+\r
+ OperationRegion (CP03, SystemMemory, 0x01C06200, 0xA8)\r
+ Field (CP03, DWordAcc, NoLock, Preserve)\r
+ {\r
+ Offset (0x44), \r
+ QTOT, 32, \r
+ Offset (0x60), \r
+ QTDE, 32, \r
+ Offset (0x8C), \r
+ QTM1, 32, \r
+ Offset (0xA4), \r
+ QTL2, 32\r
+ }\r
+\r
+ OperationRegion (CP04, SystemMemory, 0x01C06400, 0x016C)\r
+ Field (CP04, DWordAcc, NoLock, Preserve)\r
+ {\r
+ Offset (0x0C), \r
+ QRSH, 32, \r
+ Offset (0x14), \r
+ QRSG, 32, \r
+ Offset (0x34), \r
+ QRUS, 32, \r
+ Offset (0x3C), \r
+ QRFL, 32, \r
+ Offset (0x44), \r
+ QRPC, 32, \r
+ Offset (0xD4), \r
+ QRC2, 32, \r
+ QRC3, 32, \r
+ QRC4, 32, \r
+ Offset (0xF8), \r
+ QRA1, 32, \r
+ QRA2, 32, \r
+ QRSE, 32, \r
+ QRSC, 32, \r
+ Offset (0x10C), \r
+ QRDC, 32, \r
+ Offset (0x11C), \r
+ QRIM, 32, \r
+ Offset (0x164), \r
+ QRM0, 32, \r
+ QRM1, 32\r
+ }\r
+\r
+ OperationRegion (CP05, SystemMemory, 0x01C06600, 0x70)\r
+ Field (CP05, DWordAcc, NoLock, Preserve)\r
+ {\r
+ Offset (0x2C), \r
+ PMDC, 32, \r
+ Offset (0x44), \r
+ PAC1, 32, \r
+ Offset (0x54), \r
+ PMC2, 32, \r
+ PMC3, 32, \r
+ PMC4, 32, \r
+ PMC5, 32\r
+ }\r
+\r
+ OperationRegion (CP06, SystemMemory, 0x01C06800, 0x0210)\r
+ Field (CP06, DWordAcc, NoLock, Preserve)\r
+ {\r
+ PPSR, 32, \r
+ PPDC, 32, \r
+ PCST, 32, \r
+ Offset (0x54), \r
+ PERD, 32, \r
+ Offset (0x6C), \r
+ PSC4, 32, \r
+ Offset (0xA0), \r
+ PDTA, 32, \r
+ PLTA, 32, \r
+ PLCD, 32, \r
+ Offset (0xC4), \r
+ PFC1, 32, \r
+ PFC2, 32, \r
+ PFVL, 32, \r
+ PFVH, 32, \r
+ PFMC, 32, \r
+ Offset (0x174), \r
+ PPPS, 32, \r
+ Offset (0x1A8), \r
+ PSDM, 32, \r
+ PODA, 32, \r
+ PPSC, 32, \r
+ Offset (0x1D8), \r
+ PRSL, 32, \r
+ PDAL, 32, \r
+ PDAM, 32, \r
+ Offset (0x20C), \r
+ PRC1, 32\r
+ }\r
+\r
+ OperationRegion (CP07, SystemMemory, 0x60000000, 0x1000)\r
+ Field (CP07, DWordAcc, NoLock, Preserve)\r
+ {\r
+ Offset (0x04), \r
+ SCR0, 32, \r
+ CRI0, 32, \r
+ Offset (0x10), \r
+ R0B0, 32, \r
+ R0B1, 32, \r
+ BNR0, 32, \r
+ Offset (0x7C), \r
+ LCA0, 32, \r
+ LCS0, 32, \r
+ Offset (0x88), \r
+ SLC0, 32, \r
+ Offset (0xA0), \r
+ LC20, 32, \r
+ Offset (0x8BC), \r
+ CSW0, 32, \r
+ Offset (0x900), \r
+ IAV0, 32, \r
+ CR10, 32, \r
+ CR20, 32, \r
+ ILB0, 32, \r
+ IUB0, 32, \r
+ ILR0, 32, \r
+ ILT0, 32, \r
+ IUT0, 32, \r
+ Offset (0xF24), \r
+ ESC0, 32, \r
+ EST0, 32, \r
+ Offset (0xFC4), \r
+ ECS0, 32\r
+ }\r
+\r
+ Method (PPU0, 0, Serialized)\r
+ {\r
+ Name (TOUT, Zero)\r
+ PDT0 = 0x04\r
+ PPDC = One\r
+ QECE = 0x14\r
+ QCPI = 0x07\r
+ QCLC = One\r
+ QCRC = 0x20\r
+ QCVT = Zero\r
+ QVT2 = One\r
+ QVT1 = 0xC9\r
+ QTT1 = 0xFF\r
+ QTT2 = 0x3F\r
+ QMCS = One\r
+ QCCN = Zero\r
+ QCD0 = 0x0A\r
+ QCED = 0x19\r
+ QCE1 = 0x90\r
+ QSM0 = 0x82\r
+ QS3M = 0x02\r
+ QS2M = 0xEA\r
+ QS1M = 0xAB\r
+ QC3M = Zero\r
+ QC2M = 0x0D\r
+ QC1M = 0x04\r
+ QCHS = Zero\r
+ QCP0 = 0x06\r
+ QPR0 = 0x16\r
+ QPC0 = 0x36\r
+ QCCM = One\r
+ QCCC = 0x16\r
+ QCCS = 0x33\r
+ QSCC = 0x02\r
+ QSBE = 0x07\r
+ QSES = 0x04\r
+ QIG1 = Zero\r
+ QIG0 = 0x3F\r
+ QCB1 = 0x09\r
+ QSEC = One\r
+ QSP1 = 0x40\r
+ QSP2 = One\r
+ QAP1 = 0x02\r
+ QAP2 = Zero\r
+ QSS1 = 0x7E\r
+ QSS2 = 0x15\r
+ QTOT = 0x02\r
+ QTL2 = 0x12\r
+ QTDE = 0x10\r
+ QTM1 = 0x06\r
+ QRSC = 0x03\r
+ QRSE = 0x1C\r
+ QRDC = 0x14\r
+ QRC2 = 0x0E\r
+ QRC3 = 0x04\r
+ QRC4 = 0x1A\r
+ QRUS = 0x4B\r
+ QRSG = 0x04\r
+ QRSH = 0x04\r
+ QRA1 = 0x71\r
+ QRM0 = 0x59\r
+ QRM1 = 0x59\r
+ QRA2 = 0x80\r
+ QRIM = 0x40\r
+ QRPC = 0x71\r
+ QRFL = 0x40\r
+ PERD = 0x04\r
+ PMDC = 0x52\r
+ PMC2 = 0x50\r
+ PMC4 = 0x1A\r
+ PMC5 = 0x06\r
+ PFC2 = 0x83\r
+ PFVL = 0x09\r
+ PFVH = 0xA2\r
+ PFMC = 0x40\r
+ PFC1 = 0x02\r
+ PODA = Zero\r
+ PDTA = One\r
+ PDAM = Zero\r
+ PDAL = 0x20\r
+ PSDM = Zero\r
+ PLTA = One\r
+ PLCD = 0x73\r
+ PRSL = 0xAA\r
+ PPSC = 0x03\r
+ PRC1 = 0x0D\r
+ PSC4 = Zero\r
+ PAC1 = Zero\r
+ If ((\_SB.SIDV >= 0x00020000)){}\r
+ PPDC = 0x03\r
+ PPSR = Zero\r
+ PCST = 0x03\r
+ Local0 = PPPS /* \_SB_.PPPS */\r
+ While ((Local0 & 0x40))\r
+ {\r
+ Sleep (One)\r
+ TOUT++\r
+ If ((TOUT == 0x0F))\r
+ {\r
+ Break\r
+ }\r
+\r
+ Local0 = PPPS /* \_SB_.PPPS */\r
+ }\r
+\r
+ If ((TOUT == 0x0F))\r
+ {\r
+ Return (One)\r
+ }\r
+ Else\r
+ {\r
+ Return (Zero)\r
+ }\r
+ }\r
+\r
+ Method (LTS0, 0, Serialized)\r
+ {\r
+ Name (TOUT, Zero)\r
+ Local0 = LC20 /* \_SB_.LC20 */\r
+ Local0 |= 0x40\r
+ LC20 = Local0\r
+ PLT0 = 0x0100\r
+ Local0 = EST0 /* \_SB_.EST0 */\r
+ While (((Local0 & 0x0400) != 0x0400))\r
+ {\r
+ Sleep (One)\r
+ TOUT++\r
+ If ((TOUT == 0x96))\r
+ {\r
+ Break\r
+ }\r
+\r
+ Local0 = EST0 /* \_SB_.EST0 */\r
+ }\r
+\r
+ If ((TOUT == 0x96))\r
+ {\r
+ Return (One)\r
+ }\r
+ Else\r
+ {\r
+ Return (Zero)\r
+ }\r
+ }\r
+\r
+ Method (IAT0, 0, Serialized)\r
+ {\r
+ IAV0 = One\r
+ ILB0 = 0x60100000\r
+ IUB0 = Zero\r
+ ILR0 = 0x601FFFFF\r
+ ILT0 = 0x01000000\r
+ IUT0 = Zero\r
+ CR10 = 0x04\r
+ CR20 = 0x80000000\r
+ BNR0 = 0x00010100\r
+ }\r
+\r
+ Method (REB0, 2, Serialized)\r
+ {\r
+ Local0 = PSC0 /* \_SB_.PSC0 */\r
+ Local0 &= 0xFBFFFFFF\r
+ PSC0 = Local0\r
+ WBL0 = Arg0\r
+ WBH0 = Zero\r
+ WLL0 = Arg1\r
+ WLH0 = Zero\r
+ RBL0 = Arg0\r
+ RBH0 = Zero\r
+ RLL0 = Arg1\r
+ RLH0 = Zero\r
+ Local0 = PSC0 /* \_SB_.PSC0 */\r
+ Local0 |= 0x04000000\r
+ PSC0 = Local0\r
+ }\r
+\r
+ Method (EEB0, 2, Serialized)\r
+ {\r
+ Local0 = PSC0 /* \_SB_.PSC0 */\r
+ Local0 &= 0xBFFFFFFF\r
+ PSC0 = Local0\r
+ WBL1 = Arg0\r
+ WBH1 = Zero\r
+ WLL1 = Arg1\r
+ WLH1 = Zero\r
+ RBL1 = Arg0\r
+ RBH1 = Zero\r
+ RLL1 = Arg1\r
+ RLH1 = Zero\r
+ Local0 = PSC0 /* \_SB_.PSC0 */\r
+ Local0 |= 0x40000000\r
+ PSC0 = Local0\r
+ }\r
+\r
+ Name (E0LT, 0x600FFFFF)\r
+ Method (MSC0, 0, Serialized)\r
+ {\r
+ Local0 = SCR0 /* \_SB_.SCR0 */\r
+ Local0 |= 0x02\r
+ SCR0 = Local0\r
+ PSL0 = 0x01000000\r
+ Local0 = PPC0 /* \_SB_.PPC0 */\r
+ Local0 &= 0xFFFFFFDF\r
+ PPC0 = Local0\r
+ CSW0 = One\r
+ Local0 = LCA0 /* \_SB_.LCA0 */\r
+ Local0 |= 0x00400000\r
+ Local0 &= 0xFFFFFBFF\r
+ Local0 |= 0x0800\r
+ LCA0 = Local0\r
+ Local0 = CRI0 /* \_SB_.CRI0 */\r
+ Local0 &= 0xFFFF\r
+ Local0 |= 0x06040000\r
+ CRI0 = Local0\r
+ ECS0 = One\r
+ R0B0 = Zero\r
+ R0B1 = Zero\r
+ ECS0 = Zero\r
+ CSW0 = Zero\r
+ PPEB = 0x60000000\r
+ REB0 (0x60001000, \_SB.E0LT)\r
+ EEB0 (0x60101000, 0x601FFFFF)\r
+ }\r
+\r
+ Name (G0D3, Zero)\r
+ PowerResource (P0ON, 0x05, 0x0000)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.GIO0\r
+ })\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (_ON, 0, NotSerialized) // _ON_: Power On\r
+ {\r
+ If (G0D3)\r
+ {\r
+ GP0B = One\r
+ Sleep (One)\r
+ GP0B = Zero\r
+ If ((\_SB.GIO0.GABL == One))\r
+ {\r
+ \_SB.PCI0.MOD1 = One\r
+ Sleep (0x05)\r
+ \_SB.PCI0.MOD2 = Zero\r
+ }\r
+\r
+ G0D3 = Zero\r
+ If (\_SB.PPU0 ())\r
+ {\r
+ Debug = "PHY Init failed for Port 0"\r
+ While (One){}\r
+ }\r
+\r
+ Sleep (0x05)\r
+ If ((\_SB.GIO0.GABL == One))\r
+ {\r
+ \_SB.PCI0.MOD2 = One\r
+ }\r
+\r
+ If (\_SB.LTS0 ())\r
+ {\r
+ \_SB.E0LT = 0x601FFFFF\r
+ }\r
+ Else\r
+ {\r
+ \_SB.E0LT = 0x600FFFFF\r
+ }\r
+\r
+ \_SB.IAT0 ()\r
+ \_SB.MSC0 ()\r
+ }\r
+ }\r
+\r
+ Method (_OFF, 0, NotSerialized) // _OFF: Power Off\r
+ {\r
+ If ((G0D3 == Zero))\r
+ {\r
+ BreakPoint\r
+ Name (PTO0, Zero)\r
+ G0D3 = One\r
+ Local0 = PSC0 /* \_SB_.PSC0 */\r
+ Local0 |= 0x10\r
+ PSC0 = Local0\r
+ Local0 = ESC0 /* \_SB_.ESC0 */\r
+ Local0 |= 0x10\r
+ ESC0 = Local0\r
+ Local0 = PPS0 /* \_SB_.PPS0 */\r
+ While ((Local0 &= 0x20 != 0x20))\r
+ {\r
+ Sleep (0x0A)\r
+ PTO0 += One\r
+ If ((PTO0 == 0x0A))\r
+ {\r
+ Break\r
+ }\r
+\r
+ Local0 = PPS0 /* \_SB_.PPS0 */\r
+ }\r
+\r
+ If ((\_SB.GIO0.GABL == One))\r
+ {\r
+ \_SB.PCI0.MOD2 = Zero\r
+ }\r
+\r
+ PPDC = Zero\r
+ PCST = Zero\r
+ }\r
+ }\r
+ }\r
+\r
+ PowerResource (P0OF, 0x05, 0x0000)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.GIO0\r
+ })\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (_ON, 0, NotSerialized) // _ON_: Power On\r
+ {\r
+ }\r
+\r
+ Method (_OFF, 0, NotSerialized) // _OFF: Power Off\r
+ {\r
+ }\r
+\r
+ Method (_RST, 0, NotSerialized) // _RST: Device Reset\r
+ {\r
+ GP0B = One\r
+ Sleep (One)\r
+ GP0B = Zero\r
+ If ((\_SB.GIO0.GABL == One))\r
+ {\r
+ \_SB.PCI0.MOD1 = Zero\r
+ Sleep (One)\r
+ \_SB.PCI0.MOD1 = One\r
+ Sleep (0x05)\r
+ \_SB.PCI0.MOD2 = Zero\r
+ }\r
+\r
+ G0D3 = Zero\r
+ If (\_SB.PPU0 ())\r
+ {\r
+ Debug = "PHY Init failed for Port 0"\r
+ While (One){}\r
+ }\r
+\r
+ Sleep (0x05)\r
+ If ((\_SB.GIO0.GABL == One))\r
+ {\r
+ \_SB.PCI0.MOD2 = One\r
+ }\r
+\r
+ If (\_SB.LTS0 ())\r
+ {\r
+ \_SB.E0LT = 0x601FFFFF\r
+ }\r
+ Else\r
+ {\r
+ \_SB.E0LT = 0x600FFFFF\r
+ }\r
+\r
+ \_SB.IAT0 ()\r
+ \_SB.MSC0 ()\r
+ }\r
+ }\r
+\r
+ Device (PCI0)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_SEG, Zero) // _SEG: PCI Segment\r
+ Name (_BBN, Zero) // _BBN: BIOS Bus Number\r
+ Name (_PRT, Package (0x04) // _PRT: PCI Routing Table\r
+ {\r
+ Package (0x04)\r
+ {\r
+ 0xFFFF, \r
+ Zero, \r
+ Zero, \r
+ 0xB5\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ 0xFFFF, \r
+ One, \r
+ Zero, \r
+ 0xB6\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ 0xFFFF, \r
+ 0x02, \r
+ Zero, \r
+ 0xB7\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ 0xFFFF, \r
+ 0x03, \r
+ Zero, \r
+ 0xB8\r
+ }\r
+ })\r
+ Method (_CCA, 0, NotSerialized) // _CCA: Cache Coherency Attribute\r
+ {\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (_PSC, 0, NotSerialized) // _PSC: Power State Current\r
+ {\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x60200000, // Address Base\r
+ 0x00DF0000, // Address Length\r
+ )\r
+ WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,\r
+ 0x0000, // Granularity\r
+ 0x0000, // Range Minimum\r
+ 0x0001, // Range Maximum\r
+ 0x0000, // Translation Offset\r
+ 0x0002, // Length\r
+ ,, )\r
+ })\r
+ Return (RBUF) /* \_SB_.PCI0._CRS.RBUF */\r
+ }\r
+\r
+ Name (SUPP, Zero)\r
+ Name (CTRL, Zero)\r
+ Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake\r
+ {\r
+ }\r
+\r
+ Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities\r
+ {\r
+ If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */))\r
+ {\r
+ CreateDWordField (Arg3, Zero, CDW1)\r
+ CreateDWordField (Arg3, 0x04, CDW2)\r
+ CreateDWordField (Arg3, 0x08, CDW3)\r
+ SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */\r
+ CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */\r
+ If (((SUPP & 0x16) != 0x16))\r
+ {\r
+ CTRL &= 0x1E\r
+ }\r
+\r
+ CTRL &= 0x15\r
+ If ((Arg1 != One))\r
+ {\r
+ CDW1 |= 0x08\r
+ }\r
+\r
+ If ((CDW3 != CTRL))\r
+ {\r
+ CDW1 |= 0x10\r
+ }\r
+\r
+ CDW3 = CTRL /* \_SB_.PCI0.CTRL */\r
+ Return (Arg3)\r
+ }\r
+ Else\r
+ {\r
+ CDW1 |= 0x04\r
+ Return (Arg3)\r
+ }\r
+ }\r
+\r
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method\r
+ {\r
+ If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_0, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_0 = ToInteger (Arg2)\r
+ If ((_T_0 == Zero))\r
+ {\r
+ Return (Buffer (0x02)\r
+ {\r
+ 0xFF, 0x03 // ..\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == One))\r
+ {\r
+ Return (Package (0x02)\r
+ {\r
+ Package (One)\r
+ {\r
+ One\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ Zero, \r
+ One, \r
+ One\r
+ }\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x02))\r
+ {\r
+ Return (Package (One)\r
+ {\r
+ Package (0x04)\r
+ {\r
+ One, \r
+ 0x03, \r
+ Zero, \r
+ 0x07\r
+ }\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x03))\r
+ {\r
+ Return (Package (One)\r
+ {\r
+ Zero\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x04))\r
+ {\r
+ Return (Package (0x02)\r
+ {\r
+ Package (One)\r
+ {\r
+ Zero\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ One, \r
+ 0x03, \r
+ Zero, \r
+ 0x07\r
+ }\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x05))\r
+ {\r
+ Return (Package (One)\r
+ {\r
+ One\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x06))\r
+ {\r
+ Return (Package (0x04)\r
+ {\r
+ Package (One)\r
+ {\r
+ Zero\r
+ }, \r
+\r
+ Package (One)\r
+ {\r
+ Zero\r
+ }, \r
+\r
+ Package (One)\r
+ {\r
+ Zero\r
+ }, \r
+\r
+ Package (One)\r
+ {\r
+ Zero\r
+ }\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x07))\r
+ {\r
+ Return (Package (One)\r
+ {\r
+ One\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x08))\r
+ {\r
+ Return (Package (One)\r
+ {\r
+ One\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x09))\r
+ {\r
+ Return (Package (0x05)\r
+ {\r
+ 0xFFFFFFFF, \r
+ 0xFFFFFFFF, \r
+ 0xFFFFFFFF, \r
+ Zero, \r
+ 0xFFFFFFFF\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ }\r
+\r
+ Name (_S0W, 0x04) // _S0W: S0 Device Wake State\r
+ Name (GWLE, ResourceTemplate ()\r
+ {\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0027\r
+ }\r
+ })\r
+ Name (GWLP, ResourceTemplate ()\r
+ {\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0023\r
+ }\r
+ })\r
+ Scope (\_SB.GIO0)\r
+ {\r
+ OperationRegion (WLEN, GeneralPurposeIo, Zero, One)\r
+ OperationRegion (WLPR, GeneralPurposeIo, Zero, One)\r
+ }\r
+\r
+ Field (\_SB.GIO0.WLEN, ByteAcc, NoLock, Preserve)\r
+ {\r
+ Connection (\_SB.PCI0.GWLE), \r
+ MOD1, 1\r
+ }\r
+\r
+ Field (\_SB.GIO0.WLPR, ByteAcc, NoLock, Preserve)\r
+ {\r
+ Connection (\_SB.PCI0.GWLP), \r
+ MOD2, 1\r
+ }\r
+\r
+ Name (_PR0, Package (0x01) // _PR0: Power Resources for D0\r
+ {\r
+ \_SB.P0ON\r
+ })\r
+ Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot\r
+ {\r
+ \_SB.P0ON\r
+ })\r
+ Device (RP1)\r
+ {\r
+ Name (_ADR, Zero) // _ADR: Address\r
+ Name (_PR0, Package (0x01) // _PR0: Power Resources for D0\r
+ {\r
+ \_SB.P0OF\r
+ })\r
+ Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot\r
+ {\r
+ \_SB.P0OF\r
+ })\r
+ Name (_PRR, Package (0x01) // _PRR: Power Resource for Reset\r
+ {\r
+ \_SB.P0OF\r
+ })\r
+ Name (_S0W, 0x04) // _S0W: S0 Device Wake State\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullUp, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0025\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.PCI0.RP1_._CRS.RBUF */\r
+ }\r
+\r
+ Name (_DSD, Package (0x02) // _DSD: Device-Specific Data\r
+ {\r
+ ToUUID ("6211e2c0-58a3-4af3-90e1-927a4e0c55a4"), \r
+ Package (0x01)\r
+ {\r
+ Package (0x02)\r
+ {\r
+ "HotPlugSupportInD3", \r
+ One\r
+ }\r
+ }\r
+ })\r
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method\r
+ {\r
+ If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_0, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_0 = ToInteger (Arg2)\r
+ If ((_T_0 == Zero))\r
+ {\r
+ Return (Buffer (0x02)\r
+ {\r
+ 0x01, 0x03 // ..\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x08))\r
+ {\r
+ Return (Package (One)\r
+ {\r
+ One\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x09))\r
+ {\r
+ Return (Package (0x05)\r
+ {\r
+ 0xFFFFFFFF, \r
+ 0xFFFFFFFF, \r
+ 0xFFFFFFFF, \r
+ Zero, \r
+ 0xFFFFFFFF\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }\r
+\r
+ OperationRegion (CP08, SystemMemory, 0x01C08000, 0x1004)\r
+ Field (CP08, DWordAcc, NoLock, Preserve)\r
+ {\r
+ PSC1, 32, \r
+ Offset (0x20), \r
+ PPC1, 32, \r
+ PPS1, 32, \r
+ Offset (0x1B0), \r
+ PLT1, 32, \r
+ Offset (0x358), \r
+ PSL1, 32, \r
+ Offset (0x360), \r
+ LBW0, 32, \r
+ HBW0, 32, \r
+ LLW0, 32, \r
+ HLW0, 32, \r
+ LBR0, 32, \r
+ HBR0, 32, \r
+ LLR0, 32, \r
+ HLR0, 32, \r
+ PEB1, 32, \r
+ Offset (0x398), \r
+ LBW1, 32, \r
+ HBW1, 32, \r
+ LLW1, 32, \r
+ HLW1, 32, \r
+ LBR1, 32, \r
+ HBR1, 32, \r
+ LLR1, 32, \r
+ HLR1, 32, \r
+ Offset (0x1000), \r
+ PDT1, 32\r
+ }\r
+\r
+ OperationRegion (CP09, SystemMemory, 0x01C0A000, 0x026C)\r
+ Field (CP09, DWordAcc, NoLock, Preserve)\r
+ {\r
+ Offset (0x14), \r
+ HSEC, 32, \r
+ HAP1, 32, \r
+ HAP2, 32, \r
+ HSP1, 32, \r
+ HSP2, 32, \r
+ HSS1, 32, \r
+ HSS2, 32, \r
+ Offset (0x34), \r
+ HSM1, 32, \r
+ HSM2, 32, \r
+ Offset (0x54), \r
+ HECE, 32, \r
+ HCE1, 32, \r
+ HSCC, 32, \r
+ HSBE, 32, \r
+ HPLE, 32, \r
+ HCPI, 32, \r
+ C1M0, 32, \r
+ C2M0, 32, \r
+ C3M0, 32, \r
+ C1M1, 32, \r
+ C2M1, 32, \r
+ C3M1, 32, \r
+ Offset (0xB4), \r
+ HCM0, 32, \r
+ HCM1, 32, \r
+ Offset (0xC0), \r
+ HPR0, 32, \r
+ HPR1, 32, \r
+ HPR2, 32, \r
+ HPC0, 32, \r
+ HPC1, 32, \r
+ HPC2, 32, \r
+ Offset (0xDC), \r
+ HSES, 32, \r
+ Offset (0xF0), \r
+ HRC2, 32, \r
+ Offset (0xF8), \r
+ HCLC, 32, \r
+ Offset (0x100), \r
+ HRM0, 32, \r
+ Offset (0x108), \r
+ HRM1, 32, \r
+ Offset (0x11C), \r
+ S1M0, 32, \r
+ S2M0, 32, \r
+ S3M0, 32, \r
+ S1M1, 32, \r
+ S2M1, 32, \r
+ S3M1, 32, \r
+ Offset (0x150), \r
+ G0M0, 32, \r
+ Offset (0x158), \r
+ G0M1, 32, \r
+ Offset (0x178), \r
+ HCVT, 32, \r
+ Offset (0x1CC), \r
+ HCCS, 32, \r
+ HCHS, 32, \r
+ Offset (0x1E0), \r
+ HCDV, 32, \r
+ Offset (0x1E8), \r
+ HCCE, 32, \r
+ Offset (0x1F0), \r
+ HCCC, 32, \r
+ Offset (0x1FC), \r
+ HMCS, 32, \r
+ Offset (0x21C), \r
+ HDM1, 32, \r
+ Offset (0x224), \r
+ HCCM, 32, \r
+ HVD1, 32, \r
+ HVD2, 32\r
+ }\r
+\r
+ OperationRegion (CP10, SystemMemory, 0x01C0A800, 0x02F0)\r
+ Field (CP10, DWordAcc, NoLock, Preserve)\r
+ {\r
+ Offset (0x0C), \r
+ L0C0, 32, \r
+ L0C1, 32, \r
+ L0C2, 32, \r
+ L0TE, 32, \r
+ Offset (0x60), \r
+ L0BM, 32, \r
+ L0LM, 32, \r
+ Offset (0x7C), \r
+ L0PR, 32, \r
+ Offset (0xC0), \r
+ L0L0, 32, \r
+ L0L1, 32, \r
+ L0L2, 32, \r
+ Offset (0xD0), \r
+ L0R1, 32, \r
+ L0R2, 32, \r
+ L0M0, 32, \r
+ L0M1, 32, \r
+ L0M2, 32, \r
+ Offset (0xFC), \r
+ L0CD, 32, \r
+ L0VD, 32, \r
+ Offset (0x108), \r
+ L0X0, 32, \r
+ Offset (0x114), \r
+ L0TT, 32, \r
+ L0OT, 32, \r
+ L0RT, 32, \r
+ L0ET, 32, \r
+ L0VG, 32, \r
+ L0DG, 32, \r
+ Offset (0x130), \r
+ L0EG, 32, \r
+ L0OG, 32, \r
+ L0PG, 32, \r
+ L0IN, 32, \r
+ Offset (0x154), \r
+ L0EI, 32, \r
+ Offset (0x160), \r
+ L0DI, 32, \r
+ Offset (0x168), \r
+ L0B0, 32, \r
+ L0B1, 32, \r
+ Offset (0x178), \r
+ L0T1, 32, \r
+ Offset (0x180), \r
+ L0RC, 32, \r
+ L0F0, 32, \r
+ L0F1, 32, \r
+ L0F2, 32, \r
+ L0S0, 32, \r
+ L0S1, 32, \r
+ L0S2, 32, \r
+ L0SC, 32, \r
+ Offset (0x1A4), \r
+ L0RB, 32, \r
+ Offset (0x1C0), \r
+ L0P0, 32, \r
+ L0P1, 32, \r
+ L0P2, 32, \r
+ Offset (0x230), \r
+ L0SE, 32, \r
+ L0SN, 32, \r
+ L0SD, 32, \r
+ Offset (0x2A4), \r
+ L0DC, 32, \r
+ L0ST, 32, \r
+ L0RE, 32, \r
+ L0PC, 32, \r
+ Offset (0x2B8), \r
+ L0N0, 32, \r
+ Offset (0x2C0), \r
+ L0ER, 32, \r
+ L0HI, 32, \r
+ Offset (0x2CC), \r
+ L0RR, 32\r
+ }\r
+\r
+ OperationRegion (CP11, SystemMemory, 0x01C0B000, 0x02F0)\r
+ Field (CP11, DWordAcc, NoLock, Preserve)\r
+ {\r
+ Offset (0x0C), \r
+ L1C0, 32, \r
+ L1C1, 32, \r
+ L1C2, 32, \r
+ L1TE, 32, \r
+ Offset (0x60), \r
+ L1BM, 32, \r
+ L1LM, 32, \r
+ Offset (0x7C), \r
+ L1PR, 32, \r
+ Offset (0xC0), \r
+ L1L0, 32, \r
+ L1L1, 32, \r
+ L1L2, 32, \r
+ Offset (0xD0), \r
+ L1R1, 32, \r
+ L1R2, 32, \r
+ L1M0, 32, \r
+ L1M1, 32, \r
+ L1M2, 32, \r
+ Offset (0xFC), \r
+ L1CD, 32, \r
+ L1VD, 32, \r
+ Offset (0x108), \r
+ L1X0, 32, \r
+ Offset (0x114), \r
+ L1TT, 32, \r
+ L1OT, 32, \r
+ L1RT, 32, \r
+ L1ET, 32, \r
+ L1VG, 32, \r
+ L1DG, 32, \r
+ Offset (0x130), \r
+ L1EG, 32, \r
+ L1OG, 32, \r
+ L1PG, 32, \r
+ L1IN, 32, \r
+ Offset (0x154), \r
+ L1EI, 32, \r
+ Offset (0x160), \r
+ L1DI, 32, \r
+ Offset (0x168), \r
+ L1B0, 32, \r
+ L1B1, 32, \r
+ Offset (0x178), \r
+ L1T1, 32, \r
+ Offset (0x180), \r
+ L1RC, 32, \r
+ L1F0, 32, \r
+ L1F1, 32, \r
+ L1F2, 32, \r
+ L1S0, 32, \r
+ L1S1, 32, \r
+ L1S2, 32, \r
+ L1SC, 32, \r
+ Offset (0x1A4), \r
+ L1RB, 32, \r
+ Offset (0x1C0), \r
+ L1P0, 32, \r
+ L1P1, 32, \r
+ L1P2, 32, \r
+ Offset (0x230), \r
+ L1SE, 32, \r
+ L1SN, 32, \r
+ L1SD, 32, \r
+ Offset (0x2A4), \r
+ L1DC, 32, \r
+ L1ST, 32, \r
+ L1RE, 32, \r
+ L1PC, 32, \r
+ Offset (0x2B8), \r
+ L1N0, 32, \r
+ Offset (0x2C0), \r
+ L1ER, 32, \r
+ L1HI, 32, \r
+ Offset (0x2CC), \r
+ L1RR, 32\r
+ }\r
+\r
+ OperationRegion (CP12, SystemMemory, 0x01C0B800, 0x02DC)\r
+ Field (CP12, DWordAcc, NoLock, Preserve)\r
+ {\r
+ HPSR, 32, \r
+ HPDC, 32, \r
+ HSTC, 32, \r
+ Offset (0x2C), \r
+ HTM3, 32, \r
+ Offset (0x40), \r
+ HTP3, 32, \r
+ Offset (0x54), \r
+ HTM6, 32, \r
+ Offset (0x68), \r
+ HTP6, 32, \r
+ Offset (0x15C), \r
+ HPSG, 32, \r
+ Offset (0x174), \r
+ HTRC, 32, \r
+ Offset (0x2AC), \r
+ HPST, 32\r
+ }\r
+\r
+ OperationRegion (CP13, SystemMemory, 0x40000000, 0x1000)\r
+ Field (CP13, DWordAcc, NoLock, Preserve)\r
+ {\r
+ Offset (0x04), \r
+ SCR1, 32, \r
+ CRI1, 32, \r
+ Offset (0x10), \r
+ R1B0, 32, \r
+ R1B1, 32, \r
+ BNR1, 32, \r
+ Offset (0x7C), \r
+ LCA1, 32, \r
+ LCS1, 32, \r
+ SCA1, 32, \r
+ SLC1, 32, \r
+ Offset (0xA0), \r
+ LC21, 32, \r
+ Offset (0x154), \r
+ P1PR, 32, \r
+ Offset (0x710), \r
+ GPLC, 32, \r
+ Offset (0x80C), \r
+ G32C, 32, \r
+ Offset (0x8A8), \r
+ GEQC, 32, \r
+ GMDC, 32, \r
+ Offset (0x8BC), \r
+ CSW1, 32, \r
+ Offset (0x900), \r
+ IAV1, 32, \r
+ CR11, 32, \r
+ CR21, 32, \r
+ ILB1, 32, \r
+ IUB1, 32, \r
+ ILR1, 32, \r
+ ILT1, 32, \r
+ IUT1, 32, \r
+ Offset (0xF24), \r
+ ESC1, 32, \r
+ EST1, 32, \r
+ Offset (0xFC4), \r
+ ECS1, 32\r
+ }\r
+\r
+ OperationRegion (CP14, SystemMemory, 0x03971000, 0x10)\r
+ Field (CP14, DWordAcc, NoLock, Preserve)\r
+ {\r
+ C113, 32, \r
+ I113, 32, \r
+ N113, 32, \r
+ S113, 32\r
+ }\r
+\r
+ OperationRegion (CP15, SystemMemory, 0x0016B000, 0x1020)\r
+ Field (CP15, DWordAcc, NoLock, Preserve)\r
+ {\r
+ GP0B, 32, \r
+ Offset (0x101C), \r
+ G0PB, 32\r
+ }\r
+\r
+ OperationRegion (CP16, SystemMemory, 0x0018D000, 0x1030)\r
+ Field (CP16, DWordAcc, NoLock, Preserve)\r
+ {\r
+ GP1B, 32, \r
+ Offset (0x1014), \r
+ G1LB, 32, \r
+ Offset (0x101C), \r
+ G1PB, 32, \r
+ G1NB, 32\r
+ }\r
+\r
+ Method (PPU1, 0, Serialized)\r
+ {\r
+ Name (TOUT, Zero)\r
+ PDT1 = 0x04\r
+ HPDC = 0x03\r
+ HSES = 0x27\r
+ HSEC = One\r
+ HSP1 = 0x31\r
+ HSP2 = One\r
+ HSS1 = 0xDE\r
+ HSS2 = 0x07\r
+ HSM1 = 0x4C\r
+ HSM2 = 0x06\r
+ HECE = 0x18\r
+ HCE1 = 0xB0\r
+ C1M0 = 0x8C\r
+ C2M0 = 0x20\r
+ C1M1 = 0x14\r
+ C2M1 = 0x34\r
+ HCM0 = 0x06\r
+ HCM1 = 0x06\r
+ HPR0 = 0x16\r
+ HPR1 = 0x16\r
+ HPC0 = 0x36\r
+ HPC1 = 0x36\r
+ HRC2 = 0x05\r
+ HCLC = 0x42\r
+ HRM0 = 0x82\r
+ HRM1 = 0x68\r
+ S1M0 = 0x55\r
+ S2M0 = 0x55\r
+ S3M0 = 0x03\r
+ S1M1 = 0xAB\r
+ S2M1 = 0xAA\r
+ S3M1 = 0x02\r
+ G0M0 = 0x3F\r
+ G0M1 = 0x3F\r
+ HCVT = 0x10\r
+ HCCS = Zero\r
+ HCHS = 0x30\r
+ HCDV = 0x04\r
+ HCCE = 0x73\r
+ HCCC = 0x1C\r
+ HMCS = 0x15\r
+ HDM1 = 0x04\r
+ HCCM = One\r
+ HVD1 = 0x22\r
+ HVD2 = Zero\r
+ L0C0 = Zero\r
+ L0TE = 0x0D\r
+ L0BM = One\r
+ L0LM = 0x3A\r
+ L0PR = 0x2F\r
+ L0L0 = 0x09\r
+ L0L1 = 0x09\r
+ L0L2 = 0x1A\r
+ L0R1 = One\r
+ L0R2 = 0x07\r
+ L0M0 = 0x31\r
+ L0M1 = 0x31\r
+ L0M2 = 0x03\r
+ L0CD = 0x02\r
+ L0VD = One\r
+ L0X0 = 0x12\r
+ L0TT = 0x25\r
+ L0OT = Zero\r
+ L0RT = 0x05\r
+ L0ET = One\r
+ L0VG = 0x26\r
+ L0DG = 0x12\r
+ L0EG = 0x04\r
+ L0OG = 0x04\r
+ L0PG = 0x09\r
+ L0EI = 0x15\r
+ L0DI = 0x32\r
+ L0B0 = 0x7F\r
+ L0B1 = 0x07\r
+ L0T1 = 0x04\r
+ L0RC = 0x70\r
+ L0F0 = 0x08\r
+ L0F1 = 0x08\r
+ L0F2 = 0x09\r
+ L0S0 = 0x04\r
+ L0S1 = 0x04\r
+ L0S2 = 0x02\r
+ L0SC = 0x0C\r
+ L0RB = 0x02\r
+ L0P0 = 0x5C\r
+ L0P1 = 0x3E\r
+ L0P2 = 0x3F\r
+ L0SE = 0x21\r
+ L0SN = 0xA0\r
+ L0SD = 0x08\r
+ L0DC = One\r
+ L0RE = 0xC3\r
+ L0PC = Zero\r
+ L0N0 = 0x8C\r
+ L0ER = 0x7F\r
+ L0HI = 0x2A\r
+ L0C1 = 0x0C\r
+ L0C2 = Zero\r
+ L0RR = 0x02\r
+ L0IN = 0x20\r
+ L1C0 = Zero\r
+ L1TE = 0x0D\r
+ L1BM = One\r
+ L1LM = 0x3A\r
+ L1PR = 0x2F\r
+ L1L0 = 0x09\r
+ L1L1 = 0x09\r
+ L1L2 = 0x1A\r
+ L1R1 = One\r
+ L1R2 = 0x07\r
+ L1M0 = 0x31\r
+ L1M1 = 0x31\r
+ L1M2 = 0x03\r
+ L1CD = 0x02\r
+ L1VD = One\r
+ L1X0 = 0x12\r
+ L1TT = 0x25\r
+ L1OT = Zero\r
+ L1RT = 0x05\r
+ L1ET = One\r
+ L1VG = 0x26\r
+ L1DG = 0x12\r
+ L1EG = 0x04\r
+ L1OG = 0x04\r
+ L1PG = 0x09\r
+ L1EI = 0x15\r
+ L1DI = 0x32\r
+ L1B0 = 0x7F\r
+ L1B1 = 0x07\r
+ L1T1 = 0x04\r
+ L1RC = 0x70\r
+ L1F0 = 0x08\r
+ L1F1 = 0x08\r
+ L1F2 = 0x09\r
+ L1S0 = 0x04\r
+ L1S1 = 0x04\r
+ L1S2 = 0x02\r
+ L1SC = 0x0C\r
+ L1RB = 0x02\r
+ L1P0 = 0x5C\r
+ L1P1 = 0x3E\r
+ L1P2 = 0x3F\r
+ L1SE = 0x21\r
+ L1SN = 0xA0\r
+ L1SD = 0x08\r
+ L1DC = One\r
+ L1RE = 0xC3\r
+ L1PC = Zero\r
+ L1N0 = 0x8C\r
+ L1ER = 0x7F\r
+ L1HI = 0x2A\r
+ L1C1 = 0x0C\r
+ L1C2 = Zero\r
+ L1RR = 0x02\r
+ L1IN = 0x20\r
+ HPSG = 0x3F\r
+ HTRC = 0x58\r
+ HTM3 = 0x19\r
+ HTP3 = 0x07\r
+ HTM6 = 0x17\r
+ HTP6 = 0x09\r
+ If ((\_SB.SIDV >= 0x00020000)){}\r
+ HPSR = Zero\r
+ L0ST = One\r
+ L1ST = One\r
+ HSTC = One\r
+ Local0 = HPST /* \_SB_.HPST */\r
+ While ((Local0 & 0x40))\r
+ {\r
+ Sleep (One)\r
+ TOUT++\r
+ If ((TOUT == 0x0F))\r
+ {\r
+ Break\r
+ }\r
+\r
+ Local0 = HPST /* \_SB_.HPST */\r
+ }\r
+\r
+ If ((TOUT == 0x0F))\r
+ {\r
+ Return (One)\r
+ }\r
+ Else\r
+ {\r
+ Return (Zero)\r
+ }\r
+ }\r
+\r
+ Method (LTS1, 0, Serialized)\r
+ {\r
+ Name (TOUT, Zero)\r
+ Local0 = G32C /* \_SB_.G32C */\r
+ Local0 &= 0xFFFFE0FF\r
+ Local0 |= 0x0100\r
+ G32C = Local0\r
+ GMDC = 0x000155A0\r
+ Local0 = GEQC /* \_SB_.GEQC */\r
+ Local0 &= 0xFFFFFFEF\r
+ GEQC = Local0\r
+ CSW1 = One\r
+ P1PR = 0x77777777\r
+ CSW1 = Zero\r
+ Local0 = GPLC /* \_SB_.GPLC */\r
+ Local0 &= 0xFFC0F0FF\r
+ Local0 |= 0x00030300\r
+ GPLC = Local0\r
+ PLT1 = 0x0100\r
+ Local0 = EST1 /* \_SB_.EST1 */\r
+ While (((Local0 & 0x0400) != 0x0400))\r
+ {\r
+ Sleep (One)\r
+ TOUT++\r
+ If ((TOUT == 0x96))\r
+ {\r
+ Break\r
+ }\r
+\r
+ Local0 = EST1 /* \_SB_.EST1 */\r
+ }\r
+\r
+ If ((TOUT == 0x96))\r
+ {\r
+ Return (One)\r
+ }\r
+ Else\r
+ {\r
+ Return (Zero)\r
+ }\r
+ }\r
+\r
+ Method (IAT1, 0, Serialized)\r
+ {\r
+ IAV1 = One\r
+ ILB1 = 0x40100000\r
+ IUB1 = Zero\r
+ ILR1 = 0x401FFFFF\r
+ ILT1 = 0x01000000\r
+ IUT1 = Zero\r
+ CR11 = 0x04\r
+ CR21 = 0x80000000\r
+ BNR1 = 0x00010100\r
+ }\r
+\r
+ Method (REB1, 2, Serialized)\r
+ {\r
+ Local0 = PSC1 /* \_SB_.PSC1 */\r
+ Local0 &= 0xFBFFFFFF\r
+ PSC1 = Local0\r
+ LBW0 = Arg0\r
+ HBW0 = Zero\r
+ LLW0 = Arg1\r
+ HLW0 = Zero\r
+ LBR0 = Arg0\r
+ HBR0 = Zero\r
+ LLR0 = Arg1\r
+ HLR0 = Zero\r
+ Local0 = PSC1 /* \_SB_.PSC1 */\r
+ Local0 |= 0x04000000\r
+ PSC1 = Local0\r
+ }\r
+\r
+ Method (EEB1, 2, Serialized)\r
+ {\r
+ Local0 = PSC1 /* \_SB_.PSC1 */\r
+ Local0 &= 0xBFFFFFFF\r
+ PSC1 = Local0\r
+ LBW1 = Arg0\r
+ HBW1 = Zero\r
+ LLW1 = Arg1\r
+ HLW1 = Zero\r
+ LBR1 = Arg0\r
+ HBR1 = Zero\r
+ LLR1 = Arg1\r
+ HLR1 = Zero\r
+ Local0 = PSC1 /* \_SB_.PSC1 */\r
+ Local0 |= 0x40000000\r
+ PSC1 = Local0\r
+ }\r
+\r
+ Name (E1LT, 0x400FFFFF)\r
+ Method (MSC1, 0, Serialized)\r
+ {\r
+ Local0 = SCR1 /* \_SB_.SCR1 */\r
+ Local0 |= 0x02\r
+ SCR1 = Local0\r
+ PSL1 = 0x20000000\r
+ Local0 = PPC1 /* \_SB_.PPC1 */\r
+ Local0 &= 0xFFFFFFDF\r
+ PPC1 = Local0\r
+ CSW1 = One\r
+ Local0 = LCA1 /* \_SB_.LCA1 */\r
+ Local0 |= 0x00400000\r
+ Local0 |= 0x0C00\r
+ LCA1 = Local0\r
+ Local0 = CRI1 /* \_SB_.CRI1 */\r
+ Local0 &= 0xFFFF\r
+ Local0 |= 0x06040000\r
+ CRI1 = Local0\r
+ Local0 = SCA1 /* \_SB_.SCA1 */\r
+ Local0 &= 0xFFFFFFBF\r
+ SCA1 = Local0\r
+ CSW1 = Zero\r
+ ECS1 = One\r
+ R1B0 = Zero\r
+ R1B1 = Zero\r
+ ECS1 = Zero\r
+ PEB1 = 0x40000000\r
+ REB1 (0x40001000, \_SB.E1LT)\r
+ EEB1 (0x40101000, 0x401FFFFF)\r
+ }\r
+\r
+ Name (G1D3, Zero)\r
+ PowerResource (P1ON, 0x05, 0x0000)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.GIO0\r
+ })\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (_ON, 0, NotSerialized) // _ON_: Power On\r
+ {\r
+ If (G1D3)\r
+ {\r
+ G1D3 = Zero\r
+ GP1B = One\r
+ Sleep (One)\r
+ GP1B = Zero\r
+ G1PB = One\r
+ Sleep (One)\r
+ G1PB = Zero\r
+ If (\_SB.PPU1 ())\r
+ {\r
+ Debug = "PHY Init Failed for Port 1"\r
+ While (One){}\r
+ }\r
+\r
+ If ((\_SB.GIO0.GABL == One))\r
+ {\r
+ \_SB.PCI1.MOD2 = Zero\r
+ }\r
+\r
+ Sleep (0x0A)\r
+ If ((\_SB.GIO0.GABL == One))\r
+ {\r
+ \_SB.PCI1.MOD2 = One\r
+ }\r
+\r
+ If (\_SB.LTS1 ())\r
+ {\r
+ \_SB.E1LT = 0x401FFFFF\r
+ }\r
+ Else\r
+ {\r
+ \_SB.E1LT = 0x400FFFFF\r
+ }\r
+\r
+ \_SB.IAT1 ()\r
+ \_SB.MSC1 ()\r
+ }\r
+ }\r
+\r
+ Method (_OFF, 0, NotSerialized) // _OFF: Power Off\r
+ {\r
+ If ((G1D3 == Zero))\r
+ {\r
+ BreakPoint\r
+ Name (PTO0, Zero)\r
+ G1D3 = One\r
+ Local0 = PSC1 /* \_SB_.PSC1 */\r
+ Local0 |= 0x10\r
+ PSC1 = Local0\r
+ Local0 = ESC1 /* \_SB_.ESC1 */\r
+ Local0 |= 0x10\r
+ ESC1 = Local0\r
+ Local0 = PPS1 /* \_SB_.PPS1 */\r
+ While ((Local0 &= 0x20 != 0x20))\r
+ {\r
+ Sleep (0x0A)\r
+ PTO0 += One\r
+ If ((PTO0 == 0x0A))\r
+ {\r
+ Break\r
+ }\r
+\r
+ Local0 = PPS1 /* \_SB_.PPS1 */\r
+ }\r
+\r
+ If ((\_SB.GIO0.GABL == One))\r
+ {\r
+ \_SB.PCI1.MOD2 = Zero\r
+ }\r
+\r
+ HPSR = Zero\r
+ L0ST = Zero\r
+ L1ST = Zero\r
+ HSTC = Zero\r
+ }\r
+ }\r
+ }\r
+\r
+ PowerResource (P1OF, 0x05, 0x0000)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.GIO0\r
+ })\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (_ON, 0, NotSerialized) // _ON_: Power On\r
+ {\r
+ }\r
+\r
+ Method (_OFF, 0, NotSerialized) // _OFF: Power Off\r
+ {\r
+ }\r
+\r
+ Method (_RST, 0, Serialized) // _RST: Device Reset\r
+ {\r
+ GP1B = One\r
+ Sleep (One)\r
+ GP1B = Zero\r
+ G1PB = One\r
+ Sleep (One)\r
+ G1PB = Zero\r
+ If (\_SB.PPU1 ())\r
+ {\r
+ Debug = "PHY Init Failed for Port 1"\r
+ While (One){}\r
+ }\r
+\r
+ If ((\_SB.GIO0.GABL == One))\r
+ {\r
+ \_SB.PCI1.MOD2 = Zero\r
+ }\r
+\r
+ Sleep (0x0A)\r
+ If ((\_SB.GIO0.GABL == One))\r
+ {\r
+ \_SB.PCI1.MOD2 = One\r
+ }\r
+\r
+ If (\_SB.LTS1 ())\r
+ {\r
+ \_SB.E1LT = 0x401FFFFF\r
+ }\r
+ Else\r
+ {\r
+ \_SB.E1LT = 0x400FFFFF\r
+ }\r
+\r
+ \_SB.IAT1 ()\r
+ \_SB.MSC1 ()\r
+ }\r
+ }\r
+\r
+ Device (PCI1)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_SEG, One) // _SEG: PCI Segment\r
+ Name (_BBN, Zero) // _BBN: BIOS Bus Number\r
+ Name (_PRT, Package (0x04) // _PRT: PCI Routing Table\r
+ {\r
+ Package (0x04)\r
+ {\r
+ 0xFFFF, \r
+ Zero, \r
+ Zero, \r
+ 0x01D2\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ 0xFFFF, \r
+ One, \r
+ Zero, \r
+ 0x01D3\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ 0xFFFF, \r
+ 0x02, \r
+ Zero, \r
+ 0x01D6\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ 0xFFFF, \r
+ 0x03, \r
+ Zero, \r
+ 0x01D7\r
+ }\r
+ })\r
+ Method (_CCA, 0, NotSerialized) // _CCA: Cache Coherency Attribute\r
+ {\r
+ Return (One)\r
+ }\r
+\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (_PSC, 0, NotSerialized) // _PSC: Power State Current\r
+ {\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x40200000, // Address Base\r
+ 0x01FDF000, // Address Length\r
+ )\r
+ WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,\r
+ 0x0000, // Granularity\r
+ 0x0000, // Range Minimum\r
+ 0x0001, // Range Maximum\r
+ 0x0000, // Translation Offset\r
+ 0x0002, // Length\r
+ ,, )\r
+ })\r
+ Return (RBUF) /* \_SB_.PCI1._CRS.RBUF */\r
+ }\r
+\r
+ Name (SUPP, Zero)\r
+ Name (CTRL, Zero)\r
+ Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake\r
+ {\r
+ }\r
+\r
+ Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities\r
+ {\r
+ If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */))\r
+ {\r
+ CreateDWordField (Arg3, Zero, CDW1)\r
+ CreateDWordField (Arg3, 0x04, CDW2)\r
+ CreateDWordField (Arg3, 0x08, CDW3)\r
+ SUPP = CDW2 /* \_SB_.PCI1._OSC.CDW2 */\r
+ CTRL = CDW3 /* \_SB_.PCI1._OSC.CDW3 */\r
+ If (((SUPP & 0x16) != 0x16))\r
+ {\r
+ CTRL &= 0x1E\r
+ }\r
+\r
+ CTRL &= 0x15\r
+ If ((Arg1 != One))\r
+ {\r
+ CDW1 |= 0x08\r
+ }\r
+\r
+ If ((CDW3 != CTRL))\r
+ {\r
+ CDW1 |= 0x10\r
+ }\r
+\r
+ CDW3 = CTRL /* \_SB_.PCI1.CTRL */\r
+ Return (Arg3)\r
+ }\r
+ Else\r
+ {\r
+ CDW1 |= 0x04\r
+ Return (Arg3)\r
+ }\r
+ }\r
+\r
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method\r
+ {\r
+ If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_0, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_0 = ToInteger (Arg2)\r
+ If ((_T_0 == Zero))\r
+ {\r
+ Return (Buffer (0x02)\r
+ {\r
+ 0xFF, 0x03 // ..\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == One))\r
+ {\r
+ Return (Package (0x02)\r
+ {\r
+ Package (One)\r
+ {\r
+ One\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ Zero, \r
+ One, \r
+ One\r
+ }\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x02))\r
+ {\r
+ Return (Package (One)\r
+ {\r
+ Package (0x04)\r
+ {\r
+ One, \r
+ 0x03, \r
+ Zero, \r
+ 0x07\r
+ }\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x03))\r
+ {\r
+ Return (Package (One)\r
+ {\r
+ Zero\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x04))\r
+ {\r
+ Return (Package (0x02)\r
+ {\r
+ Package (One)\r
+ {\r
+ Zero\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ One, \r
+ 0x03, \r
+ Zero, \r
+ 0x07\r
+ }\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x05))\r
+ {\r
+ Return (Package (One)\r
+ {\r
+ One\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x06))\r
+ {\r
+ Return (Package (0x04)\r
+ {\r
+ Package (One)\r
+ {\r
+ Zero\r
+ }, \r
+\r
+ Package (One)\r
+ {\r
+ Zero\r
+ }, \r
+\r
+ Package (One)\r
+ {\r
+ Zero\r
+ }, \r
+\r
+ Package (One)\r
+ {\r
+ Zero\r
+ }\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x07))\r
+ {\r
+ Return (Package (One)\r
+ {\r
+ 0x02\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x08))\r
+ {\r
+ Return (Package (One)\r
+ {\r
+ One\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x09))\r
+ {\r
+ Return (Package (0x05)\r
+ {\r
+ 0xFFFFFFFF, \r
+ 0xFFFFFFFF, \r
+ 0xFFFFFFFF, \r
+ Zero, \r
+ 0xFFFFFFFF\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ }\r
+\r
+ Name (_S0W, 0x04) // _S0W: S0 Device Wake State\r
+ Name (RST1, ResourceTemplate ()\r
+ {\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0066\r
+ }\r
+ })\r
+ Scope (\_SB.GIO0)\r
+ {\r
+ OperationRegion (P1PR, GeneralPurposeIo, Zero, One)\r
+ }\r
+\r
+ Field (\_SB.GIO0.P1PR, ByteAcc, NoLock, Preserve)\r
+ {\r
+ Connection (\_SB.PCI1.RST1), \r
+ MOD2, 1\r
+ }\r
+\r
+ Name (_PR0, Package (0x01) // _PR0: Power Resources for D0\r
+ {\r
+ \_SB.P1ON\r
+ })\r
+ Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot\r
+ {\r
+ \_SB.P1ON\r
+ })\r
+ Device (RP1)\r
+ {\r
+ Name (_ADR, Zero) // _ADR: Address\r
+ Name (_PR0, Package (0x01) // _PR0: Power Resources for D0\r
+ {\r
+ \_SB.P1OF\r
+ })\r
+ Name (_PR3, Package (0x01) // _PR3: Power Resources for D3hot\r
+ {\r
+ \_SB.P1OF\r
+ })\r
+ Name (_PRR, Package (0x01) // _PRR: Power Resource for Reset\r
+ {\r
+ \_SB.P1OF\r
+ })\r
+ Name (_DSD, Package (0x02) // _DSD: Device-Specific Data\r
+ {\r
+ ToUUID ("6211e2c0-58a3-4af3-90e1-927a4e0c55a4"), \r
+ Package (0x01)\r
+ {\r
+ Package (0x02)\r
+ {\r
+ "HotPlugSupportInD3", \r
+ One\r
+ }\r
+ }\r
+ })\r
+ Name (_S0W, 0x04) // _S0W: S0 Device Wake State\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullUp, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0068\r
+ }\r
+ GpioInt (Edge, ActiveBoth, ExclusiveAndWake, PullUp, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0071\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.PCI1.RP1_._CRS.RBUF */\r
+ }\r
+\r
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method\r
+ {\r
+ If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_0, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_0 = ToInteger (Arg2)\r
+ If ((_T_0 == Zero))\r
+ {\r
+ Return (Buffer (0x02)\r
+ {\r
+ 0x01, 0x03 // ..\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x08))\r
+ {\r
+ Return (Package (One)\r
+ {\r
+ One\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x09))\r
+ {\r
+ Return (Package (0x05)\r
+ {\r
+ 0xFFFFFFFF, \r
+ 0xFFFFFFFF, \r
+ 0xFFFFFFFF, \r
+ Zero, \r
+ 0xFFFFFFFF\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }\r
+\r
+\r
+ //\r
+ // IPC Router\r
+ //\r
+ Device (IPC0)\r
+ {\r
+//#if 0\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.GLNK\r
+ })\r
+//#endif\r
+ Name (_HID, "QCOM021C") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ }\r
+\r
+ Device (GLNK)\r
+ {\r
+//#if 0\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.RPEN\r
+ })\r
+//#endif\r
+ Name (_HID, "QCOM02F9") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001E3,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000BE,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000CC,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000260,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001E1,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000BC,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000000CA,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000025E,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.GLNK._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ // ADSP RPC Driver\r
+ //\r
+ Device (ARPC)\r
+ {\r
+ Name (_DEP, Package (0x03) // _DEP: Dependencies\r
+ {\r
+ \_SB.MMU0, \r
+ \_SB.GLNK, \r
+ \_SB.SCM0\r
+ })\r
+ Name (_HID, "QCOM0297") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ }\r
+\r
+ Device (ARPD)\r
+ {\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.ADSP, \r
+ \_SB.ARPC\r
+ })\r
+ Name (_HID, "QCOM02F3") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ }\r
+\r
+ //\r
+ // RemoteFS\r
+ // \r
+ Device(RFS0)\r
+ {\r
+ Name(_DEP, Package(0x2)\r
+ {\r
+ IPC0,\r
+ UFS0\r
+ })\r
+ Name(_HID, "QCOM0235")\r
+ Alias(PSUB, _SUB)\r
+ Method(_CRS, 0x0, NotSerialized)\r
+ {\r
+ Name(RBUF, Buffer(0x26)\r
+ {\r
+ 0x86, 0x09, 0x00, 0x01, 0x88, 0x88, 0x88, 0x88, 0x99, 0x99, 0x99, 0x99,\r
+ 0x86, 0x09, 0x00, 0x01, 0x11, 0x11, 0x11, 0x11, 0x22, 0x22, 0x22, 0x22,\r
+ 0x86, 0x09, 0x00, 0x01, 0x33, 0x33, 0x33, 0x33, 0x44, 0x44, 0x44, 0x44,\r
+ 0x79, 0x00\r
+ })\r
+ CreateDWordField(RBUF, 0x4, RMTA)\r
+ CreateDWordField(RBUF, 0x8, RMTL)\r
+ CreateDWordField(RBUF, 0x10, RFMA)\r
+ CreateDWordField(RBUF, 0x14, RFML)\r
+ CreateDWordField(RBUF, 0x1c, RFAA)\r
+ CreateDWordField(RBUF, 0x20, RFAL)\r
+ Store(RMTB, RMTA)\r
+ Store(RMTX, RMTL)\r
+ Store(RFMB, RFMA)\r
+ Store(RFMS, RFML)\r
+ Store(RFAB, RFAA)\r
+ Store(RFAS, RFAL)\r
+ Return(RBUF)\r
+ }\r
+ Method(_STA, 0x0, NotSerialized)\r
+ {\r
+ Return(0xb)\r
+ }\r
+ }\r
+\r
+#if 0\r
+ Device (RFS0)\r
+ {\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.IPC0, \r
+ \_SB.UFS0\r
+ })\r
+ Name (_HID, "QCOM0235") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x88888888, // Address Base\r
+ 0x99999999, // Address Length\r
+ _Y00)\r
+ Memory32Fixed (ReadWrite,\r
+ 0x11111111, // Address Base\r
+ 0x22222222, // Address Length\r
+ _Y01)\r
+ Memory32Fixed (ReadWrite,\r
+ 0x33333333, // Address Base\r
+ 0x44444444, // Address Length\r
+ _Y02)\r
+ })\r
+ CreateDWordField (RBUF, \_SB.RFS0._CRS._Y00._BAS, RMTA) // _BAS: Base Address\r
+ CreateDWordField (RBUF, \_SB.RFS0._CRS._Y00._LEN, RMTL) // _LEN: Length\r
+ CreateDWordField (RBUF, \_SB.RFS0._CRS._Y01._BAS, RFMA) // _BAS: Base Address\r
+ CreateDWordField (RBUF, \_SB.RFS0._CRS._Y01._LEN, RFML) // _LEN: Length\r
+ CreateDWordField (RBUF, \_SB.RFS0._CRS._Y02._BAS, RFAA) // _BAS: Base Address\r
+ CreateDWordField (RBUF, \_SB.RFS0._CRS._Y02._LEN, RFAL) // _LEN: Length\r
+ RMTA = \_SB.RMTB\r
+ RMTL = \_SB.RMTX\r
+ RFMA = \_SB.RFMB\r
+ RFML = \_SB.RFMS\r
+ RFAA = \_SB.RFAB\r
+ RFAL = \_SB.RFAS\r
+ Return (RBUF) /* \_SB_.RFS0._CRS.RBUF */\r
+ }\r
+\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0B)\r
+ }\r
+ }\r
+#endif\r
+\r
+ Device (IPA)\r
+ {\r
+ Name (_DEP, Package (0x06) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.RPEN, \r
+ \_SB.PILC, \r
+ \_SB.MMU0, \r
+ \_SB.GSI, \r
+ \_SB.GLNK\r
+ })\r
+ Name (_HID, "QCOM02B3") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Return (ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x01E40000, // Address Base\r
+ 0x0001FFFF, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000157,\r
+ }\r
+ })\r
+ }\r
+ }\r
+\r
+ Device (GSI)\r
+ {\r
+ Name (_DEP, Package (0x01) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ Name (_HID, "QCOM02E7") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x01E00000, // Address Base\r
+ 0x00030000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001D0,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.GSI_._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ //\r
+ //Qualcomm DIAG Service\r
+ //\r
+ Device (QDIG)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.GLNK\r
+ })\r
+ Name (_HID, "QCOM0225") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ }\r
+\r
+ //\r
+ // Qualcomm DIAG Bridge\r
+ //\r
+ Device (QCDB)\r
+ {\r
+ Name (_HID, "QCOM0298") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ }\r
+\r
+ Device (SYSM)\r
+ {\r
+ Name (_HID, "MEOW0010" /* Processor Container Device */) // _HID: Hardware ID\r
+ Name (_UID, 0x00100000) // _UID: Unique ID\r
+ Name (_LPI, Package (0x05) // _LPI: Low Power Idle States\r
+ {\r
+ Zero, \r
+ 0x01000000, \r
+ 0x02, \r
+ Package (0x0A)\r
+ {\r
+ 0x251C, \r
+ 0x1770, \r
+ Zero, \r
+ 0x20, \r
+ Zero, \r
+ Zero, \r
+ 0x3300, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "platform.F1"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x2710, \r
+ 0x19C8, \r
+ One, \r
+ 0x20, \r
+ Zero, \r
+ Zero, \r
+ 0xC300, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "platform.F2"\r
+ }\r
+ })\r
+ Device (CLUS)\r
+ {\r
+ Name (_HID, "MEOW0010" /* Processor Container Device */) // _HID: Hardware ID\r
+ Name (_UID, 0x10) // _UID: Unique ID\r
+ Name (_LPI, Package (0x05) // _LPI: Low Power Idle States\r
+ {\r
+ Zero, \r
+ 0x01000000, \r
+ 0x02, \r
+ Package (0x0A)\r
+ {\r
+ 0x170C, \r
+ 0x0BB8, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0x20, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "L3Cluster.D2"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x1770, \r
+ 0x0CE4, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ 0x02, \r
+ 0x40, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "L3Cluster.D4"\r
+ }\r
+ })\r
+ Device (CPU0)\r
+ {\r
+ Name (_HID, "MEOW0007" /* Processor Device */) // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Name (_LPI, Package (0x07) // _LPI: Low Power Idle States\r
+ {\r
+ Zero, \r
+ Zero, \r
+ 0x04, \r
+ Package (0x0A)\r
+ {\r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x00000000FFFFFFFF, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoSilver0.C1"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x0190, \r
+ 0x64, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000002, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoSilver0.C2"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x1388, \r
+ 0x01F4, \r
+ One, \r
+ One, \r
+ Zero, \r
+ One, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000040000003, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoSilver0.C3"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x13EC, \r
+ 0x0226, \r
+ One, \r
+ One, \r
+ Zero, \r
+ 0x02, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000040000004, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoSilver0.C4"\r
+ }\r
+ })\r
+ }\r
+\r
+ Device (CPU1)\r
+ {\r
+ Name (_HID, "MEOW0007" /* Processor Device */) // _HID: Hardware ID\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Name (_LPI, Package (0x07) // _LPI: Low Power Idle States\r
+ {\r
+ Zero, \r
+ Zero, \r
+ 0x04, \r
+ Package (0x0A)\r
+ {\r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x00000000FFFFFFFF, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoSilver1.C1"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x0190, \r
+ 0x64, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000002, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoSilver1.C2"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x1388, \r
+ 0x01F4, \r
+ One, \r
+ One, \r
+ Zero, \r
+ One, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000040000003, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoSilver1.C3"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x13EC, \r
+ 0x0226, \r
+ One, \r
+ One, \r
+ Zero, \r
+ 0x02, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000040000004, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoSilver1.C4"\r
+ }\r
+ })\r
+ }\r
+\r
+ Device (CPU2)\r
+ {\r
+ Name (_HID, "MEOW0007" /* Processor Device */) // _HID: Hardware ID\r
+ Name (_UID, 0x02) // _UID: Unique ID\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Name (_LPI, Package (0x07) // _LPI: Low Power Idle States\r
+ {\r
+ Zero, \r
+ Zero, \r
+ 0x04, \r
+ Package (0x0A)\r
+ {\r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x00000000FFFFFFFF, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoSilver2.C1"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x0190, \r
+ 0x64, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000002, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoSilver2.C2"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x1388, \r
+ 0x01F4, \r
+ One, \r
+ One, \r
+ Zero, \r
+ One, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000040000003, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoSilver2.C3"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x13EC, \r
+ 0x0226, \r
+ One, \r
+ One, \r
+ Zero, \r
+ 0x02, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000040000004, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoSilver2.C4"\r
+ }\r
+ })\r
+ }\r
+\r
+ Device (CPU3)\r
+ {\r
+ Name (_HID, "MEOW0007" /* Processor Device */) // _HID: Hardware ID\r
+ Name (_UID, 0x03) // _UID: Unique ID\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Name (_LPI, Package (0x07) // _LPI: Low Power Idle States\r
+ {\r
+ Zero, \r
+ Zero, \r
+ 0x04, \r
+ Package (0x0A)\r
+ {\r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x00000000FFFFFFFF, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoSilver3.C1"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x0190, \r
+ 0x64, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000002, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoSilver3.C2"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x1388, \r
+ 0x01F4, \r
+ One, \r
+ One, \r
+ Zero, \r
+ One, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000040000003, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoSilver3.C3"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x13EC, \r
+ 0x0226, \r
+ One, \r
+ One, \r
+ Zero, \r
+ 0x02, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000040000004, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoSilver3.C4"\r
+ }\r
+ })\r
+ }\r
+\r
+ Device (CPU4)\r
+ {\r
+ Name (_HID, "MEOW0007" /* Processor Device */) // _HID: Hardware ID\r
+ Name (_UID, 0x04) // _UID: Unique ID\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Name (_LPI, Package (0x07) // _LPI: Low Power Idle States\r
+ {\r
+ Zero, \r
+ Zero, \r
+ 0x04, \r
+ Package (0x0A)\r
+ {\r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x00000000FFFFFFFF, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoGold0.C1"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x0190, \r
+ 0x64, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000002, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoGold0.C2"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x03E8, \r
+ 0x028A, \r
+ One, \r
+ One, \r
+ Zero, \r
+ One, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000040000003, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoGold0.C3"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x05DC, \r
+ 0x044C, \r
+ One, \r
+ One, \r
+ Zero, \r
+ 0x02, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000040000004, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoGold0.C4"\r
+ }\r
+ })\r
+ }\r
+\r
+ Device (CPU5)\r
+ {\r
+ Name (_HID, "MEOW0007" /* Processor Device */) // _HID: Hardware ID\r
+ Name (_UID, 0x05) // _UID: Unique ID\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Name (_LPI, Package (0x07) // _LPI: Low Power Idle States\r
+ {\r
+ Zero, \r
+ Zero, \r
+ 0x04, \r
+ Package (0x0A)\r
+ {\r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x00000000FFFFFFFF, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoGold1.C1"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x0190, \r
+ 0x64, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000002, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoGold1.C2"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x03E8, \r
+ 0x028A, \r
+ One, \r
+ One, \r
+ Zero, \r
+ One, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000040000003, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoGold1.C3"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x05DC, \r
+ 0x044C, \r
+ One, \r
+ One, \r
+ Zero, \r
+ 0x02, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000040000004, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoGold1.C4"\r
+ }\r
+ })\r
+ }\r
+\r
+ Device (CPU6)\r
+ {\r
+ Name (_HID, "MEOW0007" /* Processor Device */) // _HID: Hardware ID\r
+ Name (_UID, 0x06) // _UID: Unique ID\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Name (_LPI, Package (0x07) // _LPI: Low Power Idle States\r
+ {\r
+ Zero, \r
+ Zero, \r
+ 0x04, \r
+ Package (0x0A)\r
+ {\r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x00000000FFFFFFFF, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoGold2.C1"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x0190, \r
+ 0x64, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000002, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoGold2.C2"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x03E8, \r
+ 0x028A, \r
+ One, \r
+ One, \r
+ Zero, \r
+ One, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000040000003, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoGold2.C3"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x05DC, \r
+ 0x044C, \r
+ One, \r
+ One, \r
+ Zero, \r
+ 0x02, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000040000004, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoGold2.C4"\r
+ }\r
+ })\r
+ }\r
+\r
+ Device (CPU7)\r
+ {\r
+ Name (_HID, "MEOW0007" /* Processor Device */) // _HID: Hardware ID\r
+ Name (_UID, 0x07) // _UID: Unique ID\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Name (_LPI, Package (0x07) // _LPI: Low Power Idle States\r
+ {\r
+ Zero, \r
+ Zero, \r
+ 0x04, \r
+ Package (0x0A)\r
+ {\r
+ Zero, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x00000000FFFFFFFF, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoGold3.C1"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x0190, \r
+ 0x64, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000002, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoGold3.C2"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x03E8, \r
+ 0x028A, \r
+ One, \r
+ One, \r
+ Zero, \r
+ One, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000040000003, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoGold3.C3"\r
+ }, \r
+\r
+ Package (0x0A)\r
+ {\r
+ 0x05DC, \r
+ 0x044C, \r
+ One, \r
+ One, \r
+ Zero, \r
+ 0x02, \r
+ ResourceTemplate ()\r
+ {\r
+ Register (FFixedHW, \r
+ 0x20, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000040000004, // Address\r
+ 0x03, // Access Size\r
+ )\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ ResourceTemplate ()\r
+ {\r
+ Register (SystemMemory, \r
+ 0x00, // Bit Width\r
+ 0x00, // Bit Offset\r
+ 0x0000000000000000, // Address\r
+ ,)\r
+ }, \r
+\r
+ "KryoGold3.C4"\r
+ }\r
+ })\r
+ }\r
+ }\r
+ }\r
+\r
+ Device (QRNG)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ Name (_HID, "QCOM02FE") // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x00793000, // Address Base\r
+ 0x00001000, // Address Length\r
+ )\r
+ })\r
+ Return (RBUF) /* \_SB_.QRNG._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ //\r
+ // Qualcomm GPS driver\r
+ //\r
+ Device (GPS)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.GLNK\r
+ })\r
+ Name (_HID, "QCOM02B6") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_CID, "ACPIQCOM24B4") // _CID: Compatible ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ }\r
+\r
+ Device (QGP0)\r
+ {\r
+ Name (_HID, "NOPE02F4") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x00804000, // Address Base\r
+ 0x00050000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000119,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000011B,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.QGP0._CRS.RBUF */\r
+ }\r
+\r
+ Method (GPII, 0, Serialized)\r
+ {\r
+ Return (Package (0x02)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ Zero, \r
+ 0x05, \r
+ 0x0119\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ Zero, \r
+ 0x07, \r
+ 0x011B\r
+ }\r
+ })\r
+ }\r
+ }\r
+\r
+ Device (QGP1)\r
+ {\r
+ Name (_HID, "NOPE02F4") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r
+ Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x00A04000, // Address Base\r
+ 0x00050000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x00000138,\r
+ }\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x0000013A,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.QGP1._CRS.RBUF */\r
+ }\r
+\r
+ Method (GPII, 0, Serialized)\r
+ {\r
+ Return (Package (0x02)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ One, \r
+ One, \r
+ 0x0138\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ One, \r
+ 0x03, \r
+ 0x013A\r
+ }\r
+ })\r
+ }\r
+ }\r
+ \r
+ Scope (\_SB)\r
+ {\r
+ OperationRegion (XACA, SystemMemory, 0x146BFA94, 0x64)\r
+ Field (XACA, AnyAcc, Lock, Preserve)\r
+ {\r
+ HBID, 8, \r
+ BWDS, 8, \r
+ PRP1, 8, \r
+ PVCS, 8, \r
+ BATP, 8, \r
+ VMXC, 8, \r
+ VMXN, 8, \r
+ VMXD, 8\r
+ }\r
+ }\r
+\r
+ Device (SARM)\r
+ {\r
+ Name (_HID, "QCOM0301") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ }\r
+\r
+ Scope (\_SB)\r
+ {\r
+ Device (WBDI)\r
+ {\r
+ Name (_HID, "SAM0909") // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_SUB, "C153144D") // _SUB: Subsystem ID\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.GIO0, \r
+ \_SB.SCM0\r
+ })\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x003E\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x003B\r
+ }\r
+ GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x003C\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.WBDI._CRS.RBUF */\r
+ }\r
+ }\r
+ }\r
+\r
+ //\r
+ //CAMERA PLATFORM\r
+ //\r
+ Device (CAMP)\r
+ {\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.PMIC\r
+ })\r
+ Name (_HID, "QCOM026F") // _HID: Hardware ID\r
+ Name (_UID, 0x1B) // _UID: Unique ID\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0AC40000, // Address Base\r
+ 0x0000006C, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0AC42000, // Address Base\r
+ 0x00004E8C, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0AC4A000, // Address Base\r
+ 0x00000C1C, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001EC,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.CAMP._CRS.RBUF */\r
+ }\r
+\r
+ Name (PLED, Zero)\r
+ Method (PPUT, 1, NotSerialized)\r
+ {\r
+ PLED = Arg0\r
+ If ((PLED == Zero))\r
+ {\r
+ \_SB.LED1.RLED (0x0100, Zero)\r
+ }\r
+\r
+ If ((PLED == One))\r
+ {\r
+ \_SB.LED1.RLED (0x0100, One)\r
+ }\r
+\r
+ Return (PLED) /* \_SB_.CAMP.PLED */\r
+ }\r
+\r
+ Method (PGET, 0, NotSerialized)\r
+ {\r
+ Return (PLED) /* \_SB_.CAMP.PLED */\r
+ }\r
+\r
+ Method (PCFG, 0, Serialized)\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ Package (0x09)\r
+ {\r
+ 0x03, \r
+ Zero, \r
+ 0x00210010, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+ })\r
+ }\r
+\r
+ Method (PERF, 0, NotSerialized)\r
+ {\r
+ Name (EBUF, Package (0x02)\r
+ {\r
+ Package (0x05)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Zero, \r
+ "CAMP_CLK", \r
+ Package (0x04)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x023C3460, \r
+ 0x0124F800\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ One, \r
+ One, \r
+ "NRT_UNCOMP_BANDWIDTH", \r
+ Package (0x28)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x00000002CB417800, \r
+ 0x00000002AD741300, \r
+ 0x000000028FA6AE00, \r
+ 0x0000000271D94900, \r
+ 0x00000002540BE400, \r
+ 0x00000002363E7F00, \r
+ 0x0000000218711A00, \r
+ 0x00000001FAA3B500, \r
+ 0x00000001DCD65000, \r
+ 0x00000001BF08EB00, \r
+ 0x00000001A13B8600, \r
+ 0x00000001836E2100, \r
+ 0x0000000165A0BC00, \r
+ 0x0000000147D35700, \r
+ 0x000000012A05F200, \r
+ 0x000000010C388D00, \r
+ 0xEE6B2800, \r
+ 0xD09DC300, \r
+ 0xC4B20100, \r
+ 0xB8C63F00, \r
+ 0xACDA7D00, \r
+ 0xA0EEBB00, \r
+ 0x9502F900, \r
+ 0x89173700, \r
+ 0x7D2B7500, \r
+ 0x713FB300, \r
+ 0x6553F100, \r
+ 0x59682F00, \r
+ 0x4D7C6D00, \r
+ 0x4190AB00, \r
+ 0x35A4E900, \r
+ 0x29B92700, \r
+ 0x1DCD6500, \r
+ 0x17D78400, \r
+ 0x11E1A300, \r
+ 0x0BEBC200, \r
+ 0x05F5E100, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ 0x02, \r
+ One, \r
+ "NRT_BANDWIDTH", \r
+ Package (0x28)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x00000002CB417800, \r
+ 0x00000002AD741300, \r
+ 0x000000028FA6AE00, \r
+ 0x0000000271D94900, \r
+ 0x00000002540BE400, \r
+ 0x00000002363E7F00, \r
+ 0x0000000218711A00, \r
+ 0x00000001FAA3B500, \r
+ 0x00000001DCD65000, \r
+ 0x00000001BF08EB00, \r
+ 0x00000001A13B8600, \r
+ 0x00000001836E2100, \r
+ 0x0000000165A0BC00, \r
+ 0x0000000147D35700, \r
+ 0x000000012A05F200, \r
+ 0x000000010C388D00, \r
+ 0xEE6B2800, \r
+ 0xD09DC300, \r
+ 0xC4B20100, \r
+ 0xB8C63F00, \r
+ 0xACDA7D00, \r
+ 0xA0EEBB00, \r
+ 0x9502F900, \r
+ 0x89173700, \r
+ 0x7D2B7500, \r
+ 0x713FB300, \r
+ 0x6553F100, \r
+ 0x59682F00, \r
+ 0x4D7C6D00, \r
+ 0x4190AB00, \r
+ 0x35A4E900, \r
+ 0x29B92700, \r
+ 0x1DCD6500, \r
+ 0x17D78400, \r
+ 0x11E1A300, \r
+ 0x0BEBC200, \r
+ 0x05F5E100, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x06)\r
+ {\r
+ "COMPONENT", \r
+ One, \r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ One, \r
+ "HF0_UNCOMP_BANDWIDTH", \r
+ Package (0x08)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x4190AB00, \r
+ 0x17D78400, \r
+ 0x11E1A300, \r
+ 0x0BEBC200, \r
+ 0x05F5E100, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ One, \r
+ One, \r
+ "HF0_BANDWIDTH", \r
+ Package (0x08)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x4190AB00, \r
+ 0x17D78400, \r
+ 0x11E1A300, \r
+ 0x0BEBC200, \r
+ 0x05F5E100, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ 0x02, \r
+ One, \r
+ "NRT_UNCOMP_BANDWIDTH", \r
+ Package (0x08)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x4190AB00, \r
+ 0x17D78400, \r
+ 0x11E1A300, \r
+ 0x0BEBC200, \r
+ 0x05F5E100, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ 0x03, \r
+ One, \r
+ "NRT_BANDWIDTH", \r
+ Package (0x08)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x4190AB00, \r
+ 0x17D78400, \r
+ 0x11E1A300, \r
+ 0x0BEBC200, \r
+ 0x05F5E100, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ })\r
+ Return (EBUF) /* \_SB_.CAMP.PERF.EBUF */\r
+ }\r
+ }\r
+\r
+ //\r
+ // CAMERA SENSOR\r
+ //\r
+ Device (CAMS)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.MPCS\r
+ })\r
+ Name (_HID, "QCOM0245") // _HID: Hardware ID\r
+ Name (_UID, 0x15) // _UID: Unique ID\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Method (SCFG, 0, Serialized)\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ Package (0x05)\r
+ {\r
+ "com.qti.sensormodule.powerlogics_s5k4h5yc.bin", \r
+ "com.qti.tuned.powerlogics_s5k4h5yc.bin", \r
+ 0x0015006E, \r
+ 0x485B0000, \r
+ Zero\r
+ }\r
+ })\r
+ }\r
+\r
+ Name (PGID, Buffer (0x0A)\r
+ {\r
+ "\\_SB.CAMS"\r
+ })\r
+ Name (DBUF, Buffer (DBFL){})\r
+ CreateByteField (DBUF, Zero, STAT)\r
+ CreateByteField (DBUF, 0x02, DVAL)\r
+ CreateField (DBUF, 0x18, 0xA0, DEID)\r
+ Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State\r
+ {\r
+ Return (0x03)\r
+ }\r
+\r
+ Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State\r
+ {\r
+ Return (0x03)\r
+ }\r
+\r
+ Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State\r
+ {\r
+ Return (0x03)\r
+ }\r
+\r
+ Method (_PS0, 0, NotSerialized) // _PS0: Power State 0\r
+ {\r
+ DEID = Buffer (ESNL){}\r
+ DVAL = Zero\r
+ DEID = PGID /* \_SB_.CAMS.PGID */\r
+ If (\_SB.ABD.AVBL)\r
+ {\r
+ \_SB.PEP0.FLD0 = DBUF /* \_SB_.CAMS.DBUF */\r
+ }\r
+ }\r
+\r
+ Method (_PS3, 0, NotSerialized) // _PS3: Power State 3\r
+ {\r
+ DEID = Buffer (ESNL){}\r
+ DVAL = 0x03\r
+ DEID = PGID /* \_SB_.CAMS.PGID */\r
+ If (\_SB.ABD.AVBL)\r
+ {\r
+ \_SB.PEP0.FLD0 = DBUF /* \_SB_.CAMS.DBUF */\r
+ }\r
+ }\r
+ }\r
+\r
+ Device (CAMF)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.MPCS\r
+ })\r
+ Name (_HID, "QCOM024A") // _HID: Hardware ID\r
+ Name (_UID, 0x1A) // _UID: Unique ID\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Method (SCFG, 0, Serialized)\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ Package (0x05)\r
+ {\r
+ "com.qti.sensormodule.hnt_s5k5e3yx.bin", \r
+ "com.qti.tuned.hnt_s5k5e3yx.bin", \r
+ 0x00150020, \r
+ 0x5E300000, \r
+ Zero\r
+ }\r
+ })\r
+ }\r
+\r
+ Name (PGID, Buffer (0x0A)\r
+ {\r
+ "\\_SB.CAMF"\r
+ })\r
+ Name (DBUF, Buffer (DBFL){})\r
+ CreateByteField (DBUF, Zero, STAT)\r
+ CreateByteField (DBUF, 0x02, DVAL)\r
+ CreateField (DBUF, 0x18, 0xA0, DEID)\r
+ Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State\r
+ {\r
+ Return (0x03)\r
+ }\r
+\r
+ Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State\r
+ {\r
+ Return (0x03)\r
+ }\r
+\r
+ Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State\r
+ {\r
+ Return (0x03)\r
+ }\r
+\r
+ Method (_PS0, 0, NotSerialized) // _PS0: Power State 0\r
+ {\r
+ DEID = Buffer (ESNL){}\r
+ DVAL = Zero\r
+ DEID = PGID /* \_SB_.CAMF.PGID */\r
+ If (\_SB.ABD.AVBL)\r
+ {\r
+ \_SB.PEP0.FLD0 = DBUF /* \_SB_.CAMF.DBUF */\r
+ }\r
+ }\r
+\r
+ Method (_PS3, 0, NotSerialized) // _PS3: Power State 3\r
+ {\r
+ DEID = Buffer (ESNL){}\r
+ DVAL = 0x03\r
+ DEID = PGID /* \_SB_.CAMF.PGID */\r
+ If (\_SB.ABD.AVBL)\r
+ {\r
+ \_SB.PEP0.FLD0 = DBUF /* \_SB_.CAMF.DBUF */\r
+ }\r
+ }\r
+ }\r
+\r
+ Device (CAMI)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.MPCS\r
+ })\r
+ Name (_HID, "QCOM0247") // _HID: Hardware ID\r
+ Name (_UID, 0x1C) // _UID: Unique ID\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (SCFG, 0, Serialized)\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ Package (0x05)\r
+ {\r
+ "com.qti.sensormodule.tfc_ov7251.bin", \r
+ "com.qti.tuned.liteon_ov7251.bin", \r
+ 0x001500C0, \r
+ 0x7750300A, \r
+ Zero\r
+ }\r
+ })\r
+ }\r
+\r
+ Name (PGID, Buffer (0x0A)\r
+ {\r
+ "\\_SB.CAMI"\r
+ })\r
+ Name (DBUF, Buffer (DBFL){})\r
+ CreateByteField (DBUF, Zero, STAT)\r
+ CreateByteField (DBUF, 0x02, DVAL)\r
+ CreateField (DBUF, 0x18, 0xA0, DEID)\r
+ Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State\r
+ {\r
+ Return (0x03)\r
+ }\r
+\r
+ Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State\r
+ {\r
+ Return (0x03)\r
+ }\r
+\r
+ Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State\r
+ {\r
+ Return (0x03)\r
+ }\r
+\r
+ Method (_PS0, 0, NotSerialized) // _PS0: Power State 0\r
+ {\r
+ DEID = Buffer (ESNL){}\r
+ DVAL = Zero\r
+ DEID = PGID /* \_SB_.CAMI.PGID */\r
+ If (\_SB.ABD.AVBL)\r
+ {\r
+ \_SB.PEP0.FLD0 = DBUF /* \_SB_.CAMI.DBUF */\r
+ }\r
+ }\r
+\r
+ Method (_PS3, 0, NotSerialized) // _PS3: Power State 3\r
+ {\r
+ DEID = Buffer (ESNL){}\r
+ DVAL = 0x03\r
+ DEID = PGID /* \_SB_.CAMI.PGID */\r
+ If (\_SB.ABD.AVBL)\r
+ {\r
+ \_SB.PEP0.FLD0 = DBUF /* \_SB_.CAMI.DBUF */\r
+ }\r
+ }\r
+ }\r
+\r
+ Device (FLSH)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.CAMP\r
+ })\r
+ Name (_HID, "QCOM025C") // _HID: Hardware ID\r
+ Name (_UID, 0x19) // _UID: Unique ID\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, Buffer (0x02)\r
+ {\r
+ 0x79, 0x00 // y.\r
+ })\r
+ Return (RBUF) /* \_SB_.FLSH._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ Device (MPCS)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.CAMP\r
+ })\r
+ Name (_HID, "QCOM02E8") // _HID: Hardware ID\r
+ Name (_UID, 0x18) // _UID: Unique ID\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0AC65000, // Address Base\r
+ 0x00000900, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0AC66000, // Address Base\r
+ 0x00000900, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0AC67000, // Address Base\r
+ 0x00000900, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001FD,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001FE,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001FF,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.MPCS._CRS.RBUF */\r
+ }\r
+ }\r
+\r
+ //\r
+ // Hardware JPEG Encoder\r
+ //\r
+ Device (JPGE)\r
+ {\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.CAMP, \r
+ \_SB.MMU0\r
+ })\r
+ Name (_HID, "QCOM0276") // _HID: Hardware ID\r
+ Name (_UID, 0x17) // _UID: Unique ID\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0AC4E000, // Address Base\r
+ 0x00000340, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0AC52000, // Address Base\r
+ 0x000001B4, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001FA,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001FB,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.JPGE._CRS.RBUF */\r
+ }\r
+\r
+ Method (PERF, 0, NotSerialized)\r
+ {\r
+ Name (EBUF, Package (0x02)\r
+ {\r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Zero, \r
+ "JPEG0_CLK", \r
+ Package (0x06)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x23C34600, \r
+ 0x23C34600, \r
+ 0x18148D00, \r
+ 0x0BEBC200\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ One, \r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Zero, \r
+ "DMA_CLK", \r
+ Package (0x05)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x23C34600, \r
+ 0x23C34600, \r
+ 0x0BEBC200\r
+ }\r
+ }\r
+ }\r
+ })\r
+ Return (EBUF) /* \_SB_.JPGE.PERF.EBUF */\r
+ }\r
+ }\r
+\r
+ Device (VFE0)\r
+ {\r
+ Name (_DEP, Package (0x03) // _DEP: Dependencies\r
+ {\r
+ \_SB.MMU0, \r
+ \_SB.PEP0, \r
+ \_SB.CAMP\r
+ })\r
+ Name (_HID, "QCOM0243") // _HID: Hardware ID\r
+ Name (_UID, 0x16) // _UID: Unique ID\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0AC00000, // Address Base\r
+ 0x00020000, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0AC48000, // Address Base\r
+ 0x00001000, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0AC5A000, // Address Base\r
+ 0x00004000, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0AC6B000, // Address Base\r
+ 0x00001000, // Address Length\r
+ )\r
+ Memory32Fixed (ReadOnly,\r
+ 0x0AC6F000, // Address Base\r
+ 0x00008000, // Address Length\r
+ )\r
+ Memory32Fixed (ReadOnly,\r
+ 0x0AC87000, // Address Base\r
+ 0x0000A000, // Address Length\r
+ )\r
+ Memory32Fixed (ReadOnly,\r
+ 0x0AC91000, // Address Base\r
+ 0x0000A000, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0ACAF000, // Address Base\r
+ 0x00005000, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0ACB6000, // Address Base\r
+ 0x00005000, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x0ACC4000, // Address Base\r
+ 0x00005000, // Address Length\r
+ )\r
+ Memory32Fixed (ReadWrite,\r
+ 0x8BF00000, // Address Base\r
+ 0x00500000, // Address Length\r
+ )\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001ED,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001EF,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001F1,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001F3,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001F5,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001EE,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001F0,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001F2,\r
+ }\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )\r
+ {\r
+ 0x000001F4,\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.VFE0._CRS.RBUF */\r
+ }\r
+\r
+ Method (PERF, 0, NotSerialized)\r
+ {\r
+ Name (EBUF, Package (0x08)\r
+ {\r
+ Package (0x05)\r
+ {\r
+ "COMPONENT", \r
+ Zero, \r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Zero, \r
+ "IFE0_CLK", \r
+ Package (0x06)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x23C34600, \r
+ 0x1C9C3800, \r
+ 0x18148D00, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ One, \r
+ One, \r
+ "HF0_UNCOMP_BANDWIDTH", \r
+ Package (0x20)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x00000008D8F9FC00, \r
+ 0x0000000826299E00, \r
+ 0x0000000684EE1800, \r
+ 0x000000055AE82600, \r
+ 0x00000004A817C800, \r
+ 0x00000003B9ACA000, \r
+ 0x0000000342770C00, \r
+ 0x00000002CB417800, \r
+ 0xEE6B2800, \r
+ 0xD09DC300, \r
+ 0xC4B20100, \r
+ 0xB8C63F00, \r
+ 0xACDA7D00, \r
+ 0xA0EEBB00, \r
+ 0x9502F900, \r
+ 0x89173700, \r
+ 0x7D2B7500, \r
+ 0x713FB300, \r
+ 0x6553F100, \r
+ 0x59682F00, \r
+ 0x4D7C6D00, \r
+ 0x4190AB00, \r
+ 0x35A4E900, \r
+ 0x29B92700, \r
+ 0x1DCD6500, \r
+ 0x17D78400, \r
+ 0x11E1A300, \r
+ 0x0BEBC200, \r
+ 0x05F5E100, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ 0x02, \r
+ One, \r
+ "HF0_BANDWIDTH", \r
+ Package (0x20)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x00000008D8F9FC00, \r
+ 0x0000000826299E00, \r
+ 0x0000000684EE1800, \r
+ 0x000000055AE82600, \r
+ 0x00000004A817C800, \r
+ 0x00000003B9ACA000, \r
+ 0x0000000342770C00, \r
+ 0x00000002CB417800, \r
+ 0xEE6B2800, \r
+ 0xD09DC300, \r
+ 0xC4B20100, \r
+ 0xB8C63F00, \r
+ 0xACDA7D00, \r
+ 0xA0EEBB00, \r
+ 0x9502F900, \r
+ 0x89173700, \r
+ 0x7D2B7500, \r
+ 0x713FB300, \r
+ 0x6553F100, \r
+ 0x59682F00, \r
+ 0x4D7C6D00, \r
+ 0x4190AB00, \r
+ 0x35A4E900, \r
+ 0x29B92700, \r
+ 0x1DCD6500, \r
+ 0x17D78400, \r
+ 0x11E1A300, \r
+ 0x0BEBC200, \r
+ 0x05F5E100, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "COMPONENT", \r
+ One, \r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Zero, \r
+ "IFE1_CLK", \r
+ Package (0x06)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x23C34600, \r
+ 0x1C9C3800, \r
+ 0x18148D00, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ One, \r
+ One, \r
+ "HF1_UNCOMP_BANDWIDTH", \r
+ Package (0x20)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x00000008D8F9FC00, \r
+ 0x0000000826299E00, \r
+ 0x0000000684EE1800, \r
+ 0x000000055AE82600, \r
+ 0x00000004A817C800, \r
+ 0x00000003B9ACA000, \r
+ 0x0000000342770C00, \r
+ 0x00000002CB417800, \r
+ 0xEE6B2800, \r
+ 0xD09DC300, \r
+ 0xC4B20100, \r
+ 0xB8C63F00, \r
+ 0xACDA7D00, \r
+ 0xA0EEBB00, \r
+ 0x9502F900, \r
+ 0x89173700, \r
+ 0x7D2B7500, \r
+ 0x713FB300, \r
+ 0x6553F100, \r
+ 0x59682F00, \r
+ 0x4D7C6D00, \r
+ 0x4190AB00, \r
+ 0x35A4E900, \r
+ 0x29B92700, \r
+ 0x1DCD6500, \r
+ 0x17D78400, \r
+ 0x11E1A300, \r
+ 0x0BEBC200, \r
+ 0x05F5E100, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ 0x02, \r
+ One, \r
+ "HF1_BANDWIDTH", \r
+ Package (0x20)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x00000008D8F9FC00, \r
+ 0x0000000826299E00, \r
+ 0x0000000684EE1800, \r
+ 0x000000055AE82600, \r
+ 0x00000004A817C800, \r
+ 0x00000003B9ACA000, \r
+ 0x0000000342770C00, \r
+ 0x00000002CB417800, \r
+ 0xEE6B2800, \r
+ 0xD09DC300, \r
+ 0xC4B20100, \r
+ 0xB8C63F00, \r
+ 0xACDA7D00, \r
+ 0xA0EEBB00, \r
+ 0x9502F900, \r
+ 0x89173700, \r
+ 0x7D2B7500, \r
+ 0x713FB300, \r
+ 0x6553F100, \r
+ 0x59682F00, \r
+ 0x4D7C6D00, \r
+ 0x4190AB00, \r
+ 0x35A4E900, \r
+ 0x29B92700, \r
+ 0x1DCD6500, \r
+ 0x17D78400, \r
+ 0x11E1A300, \r
+ 0x0BEBC200, \r
+ 0x05F5E100, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ 0x02, \r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Zero, \r
+ "IFE_LITE_CLK", \r
+ Package (0x06)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x23C34600, \r
+ 0x1C9C3800, \r
+ 0x18148D00, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ 0x03, \r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Zero, \r
+ "ICP_CLK", \r
+ Package (0x05)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x23C34600, \r
+ 0x17D78400, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x04)\r
+ {\r
+ "COMPONENT", \r
+ 0x04, \r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Zero, \r
+ "IPE0_CLK", \r
+ Package (0x06)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x23C34600, \r
+ 0x1C9C3800, \r
+ 0x18148D00, \r
+ Zero\r
+ }\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ One, \r
+ Zero, \r
+ "IPE1_CLK", \r
+ Package (0x06)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x23C34600, \r
+ 0x1C9C3800, \r
+ 0x18148D00, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ 0x05, \r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Zero, \r
+ "BPS_CLK", \r
+ Package (0x06)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x23C34600, \r
+ 0x1C9C3800, \r
+ 0x18148D00, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ 0x06, \r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Zero, \r
+ "LRME_CLK", \r
+ Package (0x06)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x17D78400, \r
+ 0x1312D000, \r
+ 0x10089D40, \r
+ Zero\r
+ }\r
+ }\r
+ }, \r
+\r
+ Package (0x03)\r
+ {\r
+ "COMPONENT", \r
+ 0x07, \r
+ Package (0x05)\r
+ {\r
+ "PSTATE_SET", \r
+ Zero, \r
+ Zero, \r
+ "FD_CLK", \r
+ Package (0x06)\r
+ {\r
+ "PSTATE", \r
+ Zero, \r
+ 0x23C34600, \r
+ 0x20113A80, \r
+ 0x17D78400, \r
+ Zero\r
+ }\r
+ }\r
+ }\r
+ })\r
+ Return (EBUF) /* \_SB_.VFE0.PERF.EBUF */\r
+ }\r
+ }\r
+\r
+ Scope (\_SB)\r
+ {\r
+ Name (GRST, Zero)\r
+ }\r
+\r
+ // Qualcomm Sensor Collection\r
+ Device (SEN2)\r
+ {\r
+ Name (_DEP, Package (0x03) // _DEP: Dependencies\r
+ {\r
+ \_SB.IPC0, \r
+ \_SB.SCSS, \r
+ \_SB.ARPC\r
+ })\r
+ Name (_HID, "QCOM0308") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_CID, "QCOM02A2") // _CID: Compatible ID\r
+ }\r
+\r
+ Device (ALS1)\r
+ {\r
+ Name (_ADR, Zero) // _ADR: Address\r
+ Name (_HID, "SAM0204") // _HID: Hardware ID\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_DEP, Package (0x01) // _DEP: Dependencies\r
+ {\r
+ \_SB.I2C3\r
+ })\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ I2cSerialBusV2 (0x0029, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.I2C3",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ })\r
+ Return (RBUF) /* \_SB_.ALS1._CRS.RBUF */\r
+ }\r
+\r
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method\r
+ {\r
+ If ((Arg0 == ToUUID ("518808e9-2eb8-42d3-b5e3-b135f94343c9")))\r
+ {\r
+ If ((Arg2 == Zero))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x03 // .\r
+ })\r
+ }\r
+\r
+ If ((Arg2 == One))\r
+ {\r
+ Return (Buffer (0xEC)\r
+ {\r
+ /* 0000 */ 0x80, 0x13, 0x81, 0xDA, 0x82, 0x00, 0x83, 0x00, // ........\r
+ /* 0008 */ 0x84, 0x00, 0x85, 0x00, 0x86, 0x00, 0x87, 0x02, // ........\r
+ /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF, 0x05, 0x00, 0x00, 0x00, // ........\r
+ /* 0018 */ 0x01, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, // ........\r
+ /* 0020 */ 0x03, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, // .... ...\r
+ /* 0028 */ 0x06, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, // ....(...\r
+ /* 0030 */ 0x0A, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x00, // ....2...\r
+ /* 0038 */ 0x13, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, // ....<...\r
+ /* 0040 */ 0x25, 0x00, 0x00, 0x00, 0x46, 0x00, 0x00, 0x00, // %...F...\r
+ /* 0048 */ 0x47, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, // G...P...\r
+ /* 0050 */ 0x88, 0x00, 0x00, 0x00, 0x5A, 0x00, 0x00, 0x00, // ....Z...\r
+ /* 0058 */ 0x04, 0x01, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, // ....d...\r
+ /* 0060 */ 0xF4, 0x01, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, // ........\r
+ /* 0068 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........\r
+ /* 0070 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFC, 0xA9, 0xF1, 0x3E, // .......>\r
+ /* 0078 */ 0x7B, 0x14, 0xA2, 0x40, 0x52, 0xB8, 0x02, 0x41, // {..@R..A\r
+ /* 0080 */ 0x52, 0xB8, 0x3E, 0x3F, 0x17, 0xD9, 0x16, 0x40, // R.>?...@\r
+ /* 0088 */ 0x1F, 0x85, 0x1B, 0x40, 0x21, 0xB0, 0x82, 0x3F, // ...@!..?\r
+ /* 0090 */ 0xB0, 0x72, 0xB8, 0x3F, 0x5E, 0xBA, 0x99, 0x3F, // .r.?^..?\r
+ /* 0098 */ 0x00, 0x00, 0x60, 0x40, 0x08, 0xAC, 0x9C, 0x3E, // ..`@...>\r
+ /* 00A0 */ 0x0E, 0x2D, 0xB2, 0x3D, 0xFF, 0xFF, 0xFF, 0xFF, // .-.=....\r
+ /* 00A8 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........\r
+ /* 00B0 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........\r
+ /* 00B8 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........\r
+ /* 00C0 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........\r
+ /* 00C8 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........\r
+ /* 00D0 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........\r
+ /* 00D8 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........\r
+ /* 00E0 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........\r
+ /* 00E8 */ 0xFF, 0xFF, 0xFF, 0xFF // ....\r
+ })\r
+ }\r
+ }\r
+ Else\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ }\r
+ }\r
+\r
+ Device (SAR1)\r
+ {\r
+ Name (_ADR, Zero) // _ADR: Address\r
+ Name (_HID, "SAM0207") // _HID: Hardware ID\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_DEP, Package (0x01) // _DEP: Dependencies\r
+ {\r
+ \_SB.I2C5\r
+ })\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ I2cSerialBusV2 (0x002C, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.I2C5",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0054\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.SAR1._CRS.RBUF */\r
+ }\r
+\r
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method\r
+ {\r
+ If ((Arg0 == ToUUID ("37305404-87d8-4117-b665-c877ec1ce7db")))\r
+ {\r
+ If ((Arg2 == Zero))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x3F // ?\r
+ })\r
+ }\r
+\r
+ If ((Arg2 == One))\r
+ {\r
+ Return (Buffer (0x40)\r
+ {\r
+ /* 0000 */ 0x10, 0x0F, 0x05, 0x60, 0x11, 0x28, 0x27, 0x07, // ...`.('.\r
+ /* 0008 */ 0x28, 0x00, 0x29, 0x00, 0x2A, 0x00, 0x2B, 0x04, // (.).*.+.\r
+ /* 0010 */ 0x31, 0x09, 0x33, 0x20, 0x35, 0x14, 0x36, 0x08, // 1.3 5.6.\r
+ /* 0018 */ 0x37, 0x1A, 0x4A, 0x40, 0x4D, 0x04, 0x06, 0x00, // 7.J@M...\r
+ /* 0020 */ 0x07, 0x80, 0x2D, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, // ..-.....\r
+ /* 0028 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........\r
+ /* 0030 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........\r
+ /* 0038 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF // ........\r
+ })\r
+ }\r
+\r
+ If ((Arg2 == 0x02))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x01 // .\r
+ })\r
+ }\r
+\r
+ If ((Arg2 == 0x03))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_0, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_0 = ToInteger (\_SB.GRST)\r
+ If ((_T_0 == Zero))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == One))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x01 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x02))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x02 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x03))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x03 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x04))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x04 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x05))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x05 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x06))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x06 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x07))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x07 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x08))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x08 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x09))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x09 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0A))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0A // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0B))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0B // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0C))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0C // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0D))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0D // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0E))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0E // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0F))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0F // .\r
+ })\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+\r
+ If ((Arg2 == 0x04))\r
+ {\r
+ ADBG ("Grip1 WORKING!")\r
+ \_SB.GRST |= One\r
+ While (One)\r
+ {\r
+ Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_1 = ToInteger (\_SB.GRST)\r
+ If ((_T_1 == Zero))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == One))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x01 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x02))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x02 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x03))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x03 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x04))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x04 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x05))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x05 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x06))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x06 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x07))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x07 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x08))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x08 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x09))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x09 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0A))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0A // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0B))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0B // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0C))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0C // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0D))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0D // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0E))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0E // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0F))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0F // .\r
+ })\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+\r
+ If ((Arg2 == 0x05))\r
+ {\r
+ ADBG ("Grip1 RELEASE!")\r
+ \_SB.GRST &= ~One\r
+ While (One)\r
+ {\r
+ Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_2 = ToInteger (\_SB.GRST)\r
+ If ((_T_2 == Zero))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == One))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x01 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x02))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x02 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x03))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x03 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x04))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x04 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x05))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x05 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x06))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x06 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x07))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x07 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x08))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x08 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x09))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x09 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0A))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0A // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0B))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0B // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0C))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0C // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0D))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0D // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0E))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0E // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0F))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0F // .\r
+ })\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+\r
+ If ((Arg2 == 0x06))\r
+ {\r
+ ADBG ("Disp ON by Grip1")\r
+ ADBG (Concatenate ("GRST: ", ToHexString (\_SB.GRST)))\r
+ If ((\_SB.GRST == Zero))\r
+ {\r
+ ADBG ("GRST is Already 0")\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ \_SB.GRST = Zero\r
+ ADBG ("Set GRST to 0")\r
+ ADBG (Concatenate ("GRST: ", ToHexString (\_SB.GRST)))\r
+ ADBG ("LID Close noti")\r
+ \_SB.LID0.LIDB = Zero\r
+ Notify (\_SB.LID0, 0x80) // Status Change\r
+ ADBG ("Grip1 Sleep 500")\r
+ Sleep (0x01F4)\r
+ ADBG ("LID Open noti")\r
+ \_SB.LID0.LIDB = One\r
+ Notify (\_SB.LID0, 0x80) // Status Change\r
+ Return (Buffer (One)\r
+ {\r
+ 0x01 // .\r
+ })\r
+ }\r
+ }\r
+ }\r
+ Else\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ }\r
+ }\r
+\r
+ Device (SAR2)\r
+ {\r
+ Name (_ADR, Zero) // _ADR: Address\r
+ Name (_HID, "SAM0207") // _HID: Hardware ID\r
+ Name (_UID, 0x02) // _UID: Unique ID\r
+ Name (_DEP, Package (0x01) // _DEP: Dependencies\r
+ {\r
+ \_SB.IC11\r
+ })\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ I2cSerialBusV2 (0x0028, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.IC11",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x004F\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.SAR2._CRS.RBUF */\r
+ }\r
+\r
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method\r
+ {\r
+ If ((Arg0 == ToUUID ("37305404-87d8-4117-b665-c877ec1ce7db")))\r
+ {\r
+ If ((Arg2 == Zero))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x3F // ?\r
+ })\r
+ }\r
+\r
+ If ((Arg2 == One))\r
+ {\r
+ Return (Buffer (0x40)\r
+ {\r
+ /* 0000 */ 0x10, 0x16, 0x05, 0x60, 0x11, 0x28, 0x27, 0x07, // ...`.('.\r
+ /* 0008 */ 0x28, 0x00, 0x29, 0x00, 0x2A, 0x00, 0x2B, 0x04, // (.).*.+.\r
+ /* 0010 */ 0x33, 0x20, 0x35, 0x14, 0x36, 0x08, 0x37, 0x28, // 3 5.6.7(\r
+ /* 0018 */ 0x4A, 0x40, 0x4D, 0x04, 0x06, 0x00, 0x07, 0x80, // J@M.....\r
+ /* 0020 */ 0x2D, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // -.......\r
+ /* 0028 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........\r
+ /* 0030 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........\r
+ /* 0038 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF // ........\r
+ })\r
+ }\r
+\r
+ If ((Arg2 == 0x02))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x02 // .\r
+ })\r
+ }\r
+\r
+ If ((Arg2 == 0x03))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_0, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_0 = ToInteger (\_SB.GRST)\r
+ If ((_T_0 == Zero))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == One))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x01 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x02))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x02 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x03))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x03 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x04))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x04 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x05))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x05 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x06))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x06 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x07))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x07 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x08))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x08 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x09))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x09 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0A))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0A // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0B))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0B // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0C))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0C // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0D))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0D // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0E))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0E // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0F))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0F // .\r
+ })\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+\r
+ If ((Arg2 == 0x04))\r
+ {\r
+ ADBG ("Grip2 WORKING!")\r
+ \_SB.GRST |= 0x02\r
+ While (One)\r
+ {\r
+ Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_1 = ToInteger (\_SB.GRST)\r
+ If ((_T_1 == Zero))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == One))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x01 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x02))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x02 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x03))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x03 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x04))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x04 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x05))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x05 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x06))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x06 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x07))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x07 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x08))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x08 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x09))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x09 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0A))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0A // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0B))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0B // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0C))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0C // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0D))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0D // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0E))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0E // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0F))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0F // .\r
+ })\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+\r
+ If ((Arg2 == 0x05))\r
+ {\r
+ ADBG ("Grip2 RELEASE!")\r
+ \_SB.GRST &= ~0x02\r
+ While (One)\r
+ {\r
+ Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_2 = ToInteger (\_SB.GRST)\r
+ If ((_T_2 == Zero))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == One))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x01 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x02))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x02 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x03))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x03 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x04))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x04 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x05))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x05 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x06))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x06 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x07))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x07 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x08))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x08 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x09))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x09 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0A))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0A // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0B))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0B // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0C))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0C // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0D))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0D // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0E))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0E // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0F))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0F // .\r
+ })\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+\r
+ If ((Arg2 == 0x06))\r
+ {\r
+ ADBG ("Disp ON by Grip2")\r
+ ADBG (Concatenate ("GRST: ", ToHexString (\_SB.GRST)))\r
+ If ((\_SB.GRST == Zero))\r
+ {\r
+ ADBG ("GRST is Already 0")\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ \_SB.GRST = Zero\r
+ ADBG ("Set GRST to 0")\r
+ ADBG (Concatenate ("GRST: ", ToHexString (\_SB.GRST)))\r
+ ADBG ("LID Close noti")\r
+ \_SB.LID0.LIDB = Zero\r
+ Notify (\_SB.LID0, 0x80) // Status Change\r
+ ADBG ("Grip2 Sleep 500")\r
+ Sleep (0x01F4)\r
+ ADBG ("LID Open noti")\r
+ \_SB.LID0.LIDB = One\r
+ Notify (\_SB.LID0, 0x80) // Status Change\r
+ Return (Buffer (One)\r
+ {\r
+ 0x01 // .\r
+ })\r
+ }\r
+ }\r
+ }\r
+ Else\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ }\r
+ }\r
+\r
+ Device (SAR3)\r
+ {\r
+ Name (_ADR, Zero) // _ADR: Address\r
+ Name (_HID, "SAM0207") // _HID: Hardware ID\r
+ Name (_UID, 0x03) // _UID: Unique ID\r
+ Name (_DEP, Package (0x01) // _DEP: Dependencies\r
+ {\r
+ \_SB.I2C5\r
+ })\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ I2cSerialBusV2 (0x0028, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.I2C5",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0073\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.SAR3._CRS.RBUF */\r
+ }\r
+\r
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method\r
+ {\r
+ If ((Arg0 == ToUUID ("37305404-87d8-4117-b665-c877ec1ce7db")))\r
+ {\r
+ If ((Arg2 == Zero))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x3F // ?\r
+ })\r
+ }\r
+\r
+ If ((Arg2 == One))\r
+ {\r
+ Return (Buffer (0x40)\r
+ {\r
+ /* 0000 */ 0x10, 0x16, 0x05, 0x60, 0x11, 0x28, 0x27, 0x7F, // ...`.('.\r
+ /* 0008 */ 0x28, 0x00, 0x29, 0x00, 0x2A, 0x00, 0x2B, 0x04, // (.).*.+.\r
+ /* 0010 */ 0x33, 0x20, 0x35, 0x14, 0x36, 0x08, 0x37, 0x1D, // 3 5.6.7.\r
+ /* 0018 */ 0x4A, 0x40, 0x4D, 0x04, 0x06, 0x00, 0x07, 0x80, // J@M.....\r
+ /* 0020 */ 0x2D, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // -.......\r
+ /* 0028 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........\r
+ /* 0030 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........\r
+ /* 0038 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF // ........\r
+ })\r
+ }\r
+\r
+ If ((Arg2 == 0x02))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x03 // .\r
+ })\r
+ }\r
+\r
+ If ((Arg2 == 0x03))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_0, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_0 = ToInteger (\_SB.GRST)\r
+ If ((_T_0 == Zero))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == One))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x01 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x02))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x02 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x03))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x03 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x04))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x04 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x05))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x05 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x06))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x06 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x07))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x07 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x08))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x08 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x09))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x09 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0A))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0A // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0B))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0B // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0C))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0C // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0D))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0D // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0E))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0E // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0F))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0F // .\r
+ })\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+\r
+ If ((Arg2 == 0x04))\r
+ {\r
+ ADBG ("Grip3 WORKING!")\r
+ \_SB.GRST |= 0x04\r
+ While (One)\r
+ {\r
+ Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_1 = ToInteger (\_SB.GRST)\r
+ If ((_T_1 == Zero))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == One))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x01 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x02))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x02 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x03))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x03 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x04))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x04 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x05))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x05 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x06))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x06 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x07))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x07 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x08))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x08 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x09))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x09 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0A))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0A // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0B))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0B // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0C))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0C // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0D))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0D // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0E))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0E // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0F))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0F // .\r
+ })\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+\r
+ If ((Arg2 == 0x05))\r
+ {\r
+ ADBG ("Grip3 RELEASE!")\r
+ \_SB.GRST &= ~0x04\r
+ While (One)\r
+ {\r
+ Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_2 = ToInteger (\_SB.GRST)\r
+ If ((_T_2 == Zero))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == One))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x01 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x02))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x02 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x03))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x03 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x04))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x04 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x05))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x05 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x06))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x06 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x07))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x07 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x08))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x08 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x09))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x09 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0A))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0A // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0B))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0B // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0C))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0C // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0D))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0D // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0E))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0E // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0F))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0F // .\r
+ })\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+\r
+ If ((Arg2 == 0x06))\r
+ {\r
+ ADBG ("Disp ON by Grip3")\r
+ ADBG (Concatenate ("GRST: ", ToHexString (\_SB.GRST)))\r
+ If ((\_SB.GRST == Zero))\r
+ {\r
+ ADBG ("GRST is Already 0")\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ \_SB.GRST = Zero\r
+ ADBG ("Set GRST to 0")\r
+ ADBG (Concatenate ("GRST: ", ToHexString (\_SB.GRST)))\r
+ ADBG ("LID Close noti")\r
+ \_SB.LID0.LIDB = Zero\r
+ Notify (\_SB.LID0, 0x80) // Status Change\r
+ ADBG ("Grip3 Sleep 500")\r
+ Sleep (0x01F4)\r
+ ADBG ("LID Open noti")\r
+ \_SB.LID0.LIDB = One\r
+ Notify (\_SB.LID0, 0x80) // Status Change\r
+ Return (Buffer (One)\r
+ {\r
+ 0x01 // .\r
+ })\r
+ }\r
+ }\r
+ }\r
+ Else\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ }\r
+ }\r
+\r
+ Device (SAR4)\r
+ {\r
+ Name (_ADR, Zero) // _ADR: Address\r
+ Name (_HID, "SAM0207") // _HID: Hardware ID\r
+ Name (_UID, 0x04) // _UID: Unique ID\r
+ Name (_DEP, Package (0x01) // _DEP: Dependencies\r
+ {\r
+ \_SB.IC11\r
+ })\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ I2cSerialBusV2 (0x002C, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.IC11",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0079\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.SAR4._CRS.RBUF */\r
+ }\r
+\r
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method\r
+ {\r
+ If ((Arg0 == ToUUID ("37305404-87d8-4117-b665-c877ec1ce7db")))\r
+ {\r
+ If ((Arg2 == Zero))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x3F // ?\r
+ })\r
+ }\r
+\r
+ If ((Arg2 == One))\r
+ {\r
+ Return (Buffer (0x40)\r
+ {\r
+ /* 0000 */ 0x10, 0x0F, 0x05, 0x60, 0x11, 0x28, 0x27, 0x07, // ...`.('.\r
+ /* 0008 */ 0x28, 0x00, 0x29, 0x00, 0x2A, 0x00, 0x2B, 0x04, // (.).*.+.\r
+ /* 0010 */ 0x33, 0x20, 0x35, 0x14, 0x36, 0x08, 0x37, 0x1A, // 3 5.6.7.\r
+ /* 0018 */ 0x4A, 0x40, 0x4D, 0x04, 0x06, 0x00, 0x07, 0x80, // J@M.....\r
+ /* 0020 */ 0x2D, 0x08, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // -.......\r
+ /* 0028 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........\r
+ /* 0030 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // ........\r
+ /* 0038 */ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF // ........\r
+ })\r
+ }\r
+\r
+ If ((Arg2 == 0x02))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x04 // .\r
+ })\r
+ }\r
+\r
+ If ((Arg2 == 0x03))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_0, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_0 = ToInteger (\_SB.GRST)\r
+ If ((_T_0 == Zero))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == One))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x01 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x02))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x02 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x03))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x03 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x04))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x04 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x05))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x05 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x06))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x06 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x07))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x07 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x08))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x08 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x09))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x09 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0A))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0A // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0B))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0B // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0C))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0C // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0D))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0D // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0E))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0E // .\r
+ })\r
+ }\r
+ ElseIf ((_T_0 == 0x0F))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0F // .\r
+ })\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+\r
+ If ((Arg2 == 0x04))\r
+ {\r
+ ADBG ("Grip4 WORKING!")\r
+ \_SB.GRST |= 0x08\r
+ While (One)\r
+ {\r
+ Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_1 = ToInteger (\_SB.GRST)\r
+ If ((_T_1 == Zero))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == One))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x01 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x02))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x02 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x03))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x03 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x04))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x04 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x05))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x05 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x06))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x06 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x07))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x07 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x08))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x08 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x09))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x09 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0A))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0A // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0B))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0B // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0C))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0C // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0D))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0D // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0E))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0E // .\r
+ })\r
+ }\r
+ ElseIf ((_T_1 == 0x0F))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0F // .\r
+ })\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+\r
+ If ((Arg2 == 0x05))\r
+ {\r
+ ADBG ("Grip4 RELEASE!")\r
+ \_SB.GRST &= ~0x08\r
+ While (One)\r
+ {\r
+ Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_2 = ToInteger (\_SB.GRST)\r
+ If ((_T_2 == Zero))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == One))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x01 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x02))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x02 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x03))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x03 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x04))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x04 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x05))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x05 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x06))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x06 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x07))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x07 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x08))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x08 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x09))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x09 // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0A))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0A // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0B))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0B // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0C))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0C // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0D))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0D // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0E))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0E // .\r
+ })\r
+ }\r
+ ElseIf ((_T_2 == 0x0F))\r
+ {\r
+ Return (Buffer (0x04)\r
+ {\r
+ 0x0F // .\r
+ })\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+\r
+ If ((Arg2 == 0x06))\r
+ {\r
+ ADBG ("Disp ON by Grip4")\r
+ ADBG (Concatenate ("GRST: ", ToHexString (\_SB.GRST)))\r
+ If ((\_SB.GRST == Zero))\r
+ {\r
+ ADBG ("GRST is Already 0")\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ \_SB.GRST = Zero\r
+ ADBG ("Set GRST to 0")\r
+ ADBG (Concatenate ("GRST: ", ToHexString (\_SB.GRST)))\r
+ ADBG ("LID Close noti")\r
+ \_SB.LID0.LIDB = Zero\r
+ Notify (\_SB.LID0, 0x80) // Status Change\r
+ ADBG ("Grip4 Sleep 500")\r
+ Sleep (0x01F4)\r
+ ADBG ("LID Open noti")\r
+ \_SB.LID0.LIDB = One\r
+ Notify (\_SB.LID0, 0x80) // Status Change\r
+ Return (Buffer (One)\r
+ {\r
+ 0x01 // .\r
+ })\r
+ }\r
+ }\r
+ }\r
+ Else\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+ }\r
+ }\r
+\r
+ Device (LED1)\r
+ {\r
+ Name (_ADR, Zero) // _ADR: Address\r
+ Name (_HID, "SAM0608") // _HID: Hardware ID\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_DEP, Package (0x01) // _DEP: Dependencies\r
+ {\r
+ \_SB.I2C3\r
+ })\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ I2cSerialBusV2 (0x0030, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.I2C3",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ })\r
+ Return (RBUF) /* \_SB_.LED1._CRS.RBUF */\r
+ }\r
+\r
+ Name (LEDR, Zero)\r
+ Method (RLED, 2, Serialized)\r
+ {\r
+ If ((Arg1 == One))\r
+ {\r
+ LEDR |= Arg0\r
+ }\r
+ Else\r
+ {\r
+ Local0 = ~Arg0\r
+ LEDR &= Local0\r
+ }\r
+\r
+ ADBG (Concatenate ("LEDR=", ToHexString (LEDR)))\r
+ Notify (\_SB.LED1, 0x80) // Status Change\r
+ }\r
+\r
+ Method (GLED, 0, NotSerialized)\r
+ {\r
+ Return (LEDR) /* \_SB_.LED1.LEDR */\r
+ }\r
+\r
+ Method (SLED, 1, NotSerialized)\r
+ {\r
+ LEDR = Arg0\r
+ Return (Zero)\r
+ }\r
+\r
+ Name (RGBC, Zero)\r
+ Method (GLCR, 0, NotSerialized)\r
+ {\r
+ RGBC |= 0x06\r
+ RGBC |= 0x0200\r
+ RGBC |= 0x00170000\r
+ Return (RGBC) /* \_SB_.LED1.RGBC */\r
+ }\r
+ }\r
+\r
+ Device (LID0)\r
+ {\r
+ Name (_HID, "PNP0C0D" /* Lid Device */) // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (LIDB, One)\r
+ Method (_LID, 0, NotSerialized) // _LID: Lid Status\r
+ {\r
+ Return (LIDB) /* \_SB_.LID0.LIDB */\r
+ }\r
+ }\r
+\r
+ Method (ADDR, 0, NotSerialized)\r
+ {\r
+ If ((\_SB.SVMJ == One))\r
+ {\r
+ Return (0x0390B000)\r
+ }\r
+ ElseIf ((\_SB.SVMJ == 0x02))\r
+ {\r
+ Return (0x0350B000)\r
+ }\r
+ }\r
+\r
+ OperationRegion (NM11, SystemMemory, ADDR (), 0x14)\r
+ Field (NM11, DWordAcc, NoLock, Preserve)\r
+ {\r
+ PI1C, 32, \r
+ PIN1, 32, \r
+ PI1N, 32, \r
+ PI1S, 32, \r
+ PI1L, 32\r
+ }\r
+\r
+ Method (_MID, 0, Serialized)\r
+ {\r
+ Name (NMID, Zero)\r
+ NMID = PIN1 /* \_SB_.PIN1 */\r
+ Return (NMID) /* \_SB_._MID.NMID */\r
+ }\r
+\r
+ Scope (\_SB)\r
+ {\r
+ Device (SAMO)\r
+ {\r
+ Name (_HID, "SAM0101") // _HID: Hardware ID\r
+ Name (_CID, "SAM0101") // _CID: Compatible ID\r
+ Name (_SUB, "C153144D") // _SUB: Subsystem ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.I2C4, \r
+ \_SB.GIO0\r
+ })\r
+ Name (AVBL, Zero)\r
+ Method (_REG, 2, NotSerialized) // _REG: Region Availability\r
+ {\r
+ If ((Arg0 == 0x9A))\r
+ {\r
+ ^AVBL = Arg1\r
+ }\r
+ }\r
+\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Local0 = 0x0F\r
+ Return (Local0)\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ I2cSerialBusV2 (0x002C, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.I2C4",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ GpioInt (Edge, ActiveHigh, Exclusive, PullNone, 0x1388,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x001D\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.SAMO._CRS.RBUF */\r
+ }\r
+ }\r
+ }\r
+\r
+ Scope (\_SB.SAMO)\r
+ {\r
+ OperationRegion (SMOP, 0x9A, Zero, One)\r
+ Field (SMOP, ByteAcc, Lock, Preserve)\r
+ {\r
+ BRLV, 8\r
+ }\r
+ }\r
+\r
+#if 0\r
+ Scope (\_SB)\r
+ {\r
+ Device (SAFI)\r
+ {\r
+ Name (_HID, "SAM0701") // _HID: Hardware ID\r
+ Name (_CID, "SAM0701") // _CID: Compatible ID\r
+ Name (_SUB, "C153144D") // _SUB: Subsystem ID\r
+ Name (_DDN, "Samsung Firmware Interface") // _DDN: DOS Device Name\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (AVBL, Zero)\r
+ Method (_REG, 2, NotSerialized) // _REG: Region Availability\r
+ {\r
+ If ((Arg0 == 0x9F))\r
+ {\r
+ ^AVBL = Arg1\r
+ }\r
+ }\r
+\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Local0 = 0x0F\r
+ Return (Local0)\r
+ }\r
+\r
+ OperationRegion (ECM2, 0x9F, Zero, 0x38)\r
+ Field (ECM2, ByteAcc, Lock, Preserve)\r
+ {\r
+ ELG0, 8, \r
+ ELG1, 8, \r
+ ELG2, 8, \r
+ ELG3, 8, \r
+ ELG4, 8, \r
+ ELG5, 8, \r
+ ELG6, 8, \r
+ ELG7, 8, \r
+ ELG8, 8, \r
+ ELG9, 8, \r
+ AAAA, 128, \r
+ MADD, 32, \r
+ MVAL, 32\r
+ }\r
+\r
+ Method (OPID, 0, NotSerialized)\r
+ {\r
+ Local0 = One\r
+ Return (0x9F)\r
+ }\r
+\r
+ Method (GCAP, 0, NotSerialized)\r
+ {\r
+ Local0 = Zero\r
+ Return (Local0)\r
+ }\r
+\r
+ Method (PCAP, 1, NotSerialized)\r
+ {\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (PRNT, 1, Serialized)\r
+ {\r
+ If ((\_SB.SAFI.AVBL == One))\r
+ {\r
+ AAAA = Arg0\r
+ Notify (\_SB.SAFI, 0x89) // Device-Specific\r
+ }\r
+ }\r
+\r
+ Method (SABM, 0, Serialized)\r
+ {\r
+ Return (Zero)\r
+ }\r
+\r
+ Event (DSEV)\r
+ Method (DSBB, 1, Serialized)\r
+ {\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (DSBE, 0, Serialized)\r
+ {\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (CHTY, 0, Serialized)\r
+ {\r
+ Local0 = \_SB.EMEC.CHTY\r
+ Return (Local0)\r
+ }\r
+\r
+ Name (UCNP, Package (0x04)\r
+ {\r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ })\r
+ Method (TRSD, 1, NotSerialized)\r
+ {\r
+ Name (RBUF, Package (0x04)\r
+ {\r
+ 0x70, \r
+ Zero, \r
+ 0x70, \r
+ Zero\r
+ })\r
+ Return (RBUF) /* \_SB_.SAFI.TRSD.RBUF */\r
+ }\r
+\r
+ Method (GUCN, 1, Serialized)\r
+ {\r
+ If ((\_SB.EMEC.AVBL == One))\r
+ {\r
+ If ((Arg0 == One))\r
+ {\r
+ UCNP [Zero] = Zero\r
+ UCNP [One] = \_SB.EMEC.CCST\r
+ UCNP [0x02] = \_SB.EMEC.HPDS\r
+ UCNP [0x03] = \_SB.EMEC.PINA\r
+ }\r
+\r
+ If ((Arg0 == 0x02))\r
+ {\r
+ UCNP [Zero] = Zero\r
+ UCNP [One] = \_SB.EMEC.CCS2\r
+ UCNP [0x02] = \_SB.EMEC.HPD2\r
+ UCNP [0x03] = \_SB.EMEC.PIN2\r
+ }\r
+ }\r
+ Else\r
+ {\r
+ ADBG ("EMECNotReady")\r
+ }\r
+\r
+ Return (UCNP) /* \_SB_.SAFI.UCNP */\r
+ }\r
+\r
+ Method (SLED, 1, Serialized)\r
+ {\r
+ Local0 = 0x02\r
+ \_SB.LED1.RLED (Local0, Arg0)\r
+ Return (Zero)\r
+ }\r
+ }\r
+ }\r
+\r
+ Scope (\_SB)\r
+ {\r
+ Device (SIC2)\r
+ {\r
+ Name (_HID, "SWI2CD1") // _HID: Hardware ID\r
+ Name (_DDN, "SW I2C") // _DDN: DOS Device Name\r
+ Name (_UID, 0x02) // _UID: Unique ID\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Local0 = Zero\r
+ Return (Local0)\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x005E\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x005D\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.SIC2._CRS.RBUF */\r
+ }\r
+\r
+ Method (SI2C, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x0D)\r
+ {\r
+ 0x03D5E004, \r
+ 0x03D5D004, \r
+ 0x03D5E004, \r
+ 0x03D5D004, \r
+ 0x03D5E000, \r
+ 0x03D5D000, \r
+ 0x03D5E000, \r
+ 0x03D5D000, \r
+ 0x0200, \r
+ 0x0200, \r
+ Zero, \r
+ 0x04, \r
+ 0x02\r
+ })\r
+ Return (CFG0) /* \_SB_.SIC2.SI2C.CFG0 */\r
+ }\r
+ }\r
+ }\r
+#endif\r
+\r
+#if 0\r
+ Scope (\_SB)\r
+ {\r
+ Device (EMEC)\r
+ {\r
+ Name (_HID, "SAM0604") // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_SUB, "C153144D") // _SUB: Subsystem ID\r
+ Name (_DEP, Package (0x06) // _DEP: Dependencies\r
+ {\r
+ \_SB.I2C1, \r
+ \_SB.IC13, \r
+ \_SB.IC15, \r
+ \_SB.I2C8, \r
+ \_SB.GIO0, \r
+ \_SB.PM01\r
+ })\r
+ Name (AVBL, Zero)\r
+ Method (_REG, 2, NotSerialized) // _REG: Region Availability\r
+ {\r
+ If ((Arg0 == 0x9C))\r
+ {\r
+ AVBL = Arg1\r
+ }\r
+ }\r
+\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBF1, ResourceTemplate ()\r
+ {\r
+ I2cSerialBusV2 (0x0033, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.IC13",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ I2cSerialBusV2 (0x0025, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.IC15",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ I2cSerialBusV2 (0x0009, ControllerInitiated, 0x000186A0,\r
+ AddressingMode7Bit, "\\_SB.I2C8",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ I2cSerialBusV2 (0x000B, ControllerInitiated, 0x000186A0,\r
+ AddressingMode7Bit, "\\_SB.I2C8",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ I2cSerialBusV2 (0x001A, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.IC13",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x001A\r
+ }\r
+ GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x002C\r
+ }\r
+ GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x007A\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0026\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0050\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0067\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0080\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0084\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0018\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0068\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0024\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x008E\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0090\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x003D\r
+ }\r
+ })\r
+ Name (RBF2, ResourceTemplate ()\r
+ {\r
+ I2cSerialBusV2 (0x0033, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.IC13",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ I2cSerialBusV2 (0x0025, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.IC15",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ I2cSerialBusV2 (0x0009, ControllerInitiated, 0x000186A0,\r
+ AddressingMode7Bit, "\\_SB.I2C8",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ I2cSerialBusV2 (0x000B, ControllerInitiated, 0x000186A0,\r
+ AddressingMode7Bit, "\\_SB.I2C8",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ I2cSerialBusV2 (0x001A, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.IC13",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ I2cSerialBusV2 (0x0033, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.I2C1",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ I2cSerialBusV2 (0x0025, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.I2C1",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ I2cSerialBusV2 (0x0008, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.IC15",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0140\r
+ }\r
+ GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x002C\r
+ }\r
+ GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x01C0\r
+ }\r
+ GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0200\r
+ }\r
+ GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0034\r
+ }\r
+ GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0033\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0026\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0050\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0067\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0080\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0084\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0018\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0068\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0024\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x008E\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0090\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x003D\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0007\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x004E\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0025\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x004D\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0086\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0083\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x000B\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0072\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x003F\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0045\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0053\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x005C\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0010\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionInputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0016\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0023\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0009\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0028\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionOutputOnly,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0002\r
+ }\r
+ })\r
+ If ((BDRV == One))\r
+ {\r
+ Return (RBF1) /* \_SB_.EMEC._CRS.RBF1 */\r
+ }\r
+ Else\r
+ {\r
+ Return (RBF2) /* \_SB_.EMEC._CRS.RBF2 */\r
+ }\r
+ }\r
+\r
+ Name (CVER, 0x03)\r
+ Method (GVER, 0, NotSerialized)\r
+ {\r
+ Local0 = CVER /* \_SB_.EMEC.CVER */\r
+ Return (Local0)\r
+ }\r
+\r
+ Name (BDRV, 0x02)\r
+ Method (GBDR, 0, NotSerialized)\r
+ {\r
+ Local0 = 0x05\r
+ Return (Local0)\r
+ }\r
+\r
+ Method (GBPV, 0, NotSerialized)\r
+ {\r
+ Local0 = \_SB.MDID\r
+ Return (Local0)\r
+ }\r
+ }\r
+ }\r
+\r
+ Scope (\_SB.EMEC)\r
+ {\r
+ OperationRegion (EMOP, 0x9C, Zero, 0x0100)\r
+ Field (EMOP, DWordAcc, NoLock, Preserve)\r
+ {\r
+ DRL1, 8, \r
+ DRL2, 8, \r
+ Offset (0x04), \r
+ PRL1, 8, \r
+ PRL2, 8, \r
+ Offset (0x08), \r
+ CHST, 32, \r
+ SOC, 32, \r
+ VOLT, 32, \r
+ CHGC, 32, \r
+ CHTY, 32, \r
+ Offset (0x80), \r
+ CCST, 32, \r
+ HSFL, 32, \r
+ HPDS, 32, \r
+ PINA, 32, \r
+ HPDB, 32, \r
+ Offset (0xA0), \r
+ CCS2, 32, \r
+ HPD2, 32, \r
+ PIN2, 32\r
+ }\r
+\r
+ Method (CBLN, 1, NotSerialized)\r
+ {\r
+ If ((Arg0 == One))\r
+ {\r
+ Notify (\_SB.UCME, 0x80) // Status Change\r
+ Notify (\_SB.SAFI, 0xA4) // Device-Specific\r
+ }\r
+\r
+ If ((Arg0 == 0x02))\r
+ {\r
+ Notify (\_SB.SAFI, 0xA4) // Device-Specific\r
+ }\r
+\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (PCCD, 1, NotSerialized)\r
+ {\r
+ ADBG (Concatenate ("PCCD=", ToHexString (Arg0)))\r
+ If ((Arg0 == 0x02))\r
+ {\r
+ Return (Zero)\r
+ }\r
+\r
+ \_SB.CCST = \_SB.EMEC.CCST\r
+ \_SB.HSFL = \_SB.EMEC.HSFL\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (PHPD, 1, NotSerialized)\r
+ {\r
+ ADBG (Concatenate ("PHPD=", ToHexString (Arg0)))\r
+ If ((Arg0 == 0x02))\r
+ {\r
+ Return (Zero)\r
+ }\r
+\r
+#if 0\r
+ \_SB.HPDS = \_SB.EMEC.HPDS\r
+ \_SB.PINA = \_SB.EMEC.PINA\r
+ \_SB.HPDB = \_SB.EMEC.HPDB\r
+ Notify (\_SB.GPU0, \_SB.HPDB)\r
+#endif\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (HPDF, 3, NotSerialized)\r
+ {\r
+ \_SB.HPDS = Arg0\r
+ \_SB.PINA = Arg1\r
+ \_SB.HPDB = Arg2\r
+#if 0 \r
+ Notify (\_SB.GPU0, \_SB.HPDB)\r
+#endif\r
+ }\r
+\r
+ Method (CCOT, 2, NotSerialized)\r
+ {\r
+ \_SB.CCST = Arg0\r
+ \_SB.HSFL = Arg1\r
+ }\r
+\r
+ Method (PLDR, 1, NotSerialized)\r
+ {\r
+ Local0 = Zero\r
+ \_SB.LED1.RLED (0xF0, Zero)\r
+ If ((CHST == 0x05))\r
+ {\r
+ Local0 |= 0x20\r
+ }\r
+\r
+ If ((CHST == 0x11))\r
+ {\r
+ Local0 |= 0x40\r
+ }\r
+\r
+ If ((CHST == 0x21))\r
+ {\r
+ Local0 |= 0x10\r
+ }\r
+\r
+ If ((CHST == 0x40))\r
+ {\r
+ Local0 |= 0x80\r
+ }\r
+\r
+ \_SB.LED1.RLED (Local0, Arg0)\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (PLID, 1, Serialized)\r
+ {\r
+ ADBG (Concatenate ("PLID=", ToHexString (Arg0)))\r
+ \_SB.LID0.LIDB = Arg0\r
+ Notify (\_SB.LID0, 0x80) // Status Change\r
+ Return (\_SB.LID0.LIDB)\r
+ }\r
+\r
+ Method (PHID, 1, Serialized)\r
+ {\r
+ ADBG (Concatenate ("PHID=", ToHexString (Arg0)))\r
+ Notify (\_SB.SVBI, Arg0)\r
+ Return (Zero)\r
+ }\r
+\r
+ Method (PPGS, 1, Serialized)\r
+ {\r
+ ADBG (Concatenate ("PPGS=", ToHexString (Arg0)))\r
+ Notify (\_SB.SAFI, 0xA3) // Device-Specific\r
+ Return (Zero)\r
+ }\r
+ }\r
+\r
+ Scope (\_SB)\r
+ {\r
+ Device (UCME)\r
+ {\r
+ Name (_HID, "SAM0605") // _HID: Hardware ID\r
+ Name (_CID, "SAM0605") // _CID: Compatible ID\r
+ Name (_SUB, "C153144D") // _SUB: Subsystem ID\r
+ Name (_DDN, "UCM Emulation") // _DDN: DOS Device Name\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (AVBL, Zero)\r
+ Method (_REG, 2, NotSerialized) // _REG: Region Availability\r
+ {\r
+ If ((Arg0 == 0x9F))\r
+ {\r
+ ^AVBL = Arg1\r
+ }\r
+ }\r
+\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Local0 = 0x0F\r
+ Return (Local0)\r
+ }\r
+\r
+ Method (GDRO, 1, NotSerialized)\r
+ {\r
+ If ((Arg0 == One))\r
+ {\r
+ Local0 = \_SB.EMEC.DRL1\r
+ }\r
+\r
+ If ((Arg0 == 0x02))\r
+ {\r
+ Local0 = \_SB.EMEC.DRL2\r
+ }\r
+\r
+ Return (Local0)\r
+ }\r
+\r
+ Method (GPRO, 1, NotSerialized)\r
+ {\r
+ If ((Arg0 == One))\r
+ {\r
+ Local0 = \_SB.EMEC.PRL1\r
+ }\r
+\r
+ If ((Arg0 == 0x02))\r
+ {\r
+ Local0 = \_SB.EMEC.PRL2\r
+ }\r
+\r
+ Return (Local0)\r
+ }\r
+\r
+ Device (POR0)\r
+ {\r
+ Name (_ADR, Zero) // _ADR: Address\r
+ Name (_PLD, Package (0x01) // _PLD: Physical Location of Device\r
+ {\r
+ ToPLD (\r
+ PLD_Revision = 0x2,\r
+ PLD_IgnoreColor = 0x1,\r
+ PLD_Red = 0x0,\r
+ PLD_Green = 0x0,\r
+ PLD_Blue = 0x0,\r
+ PLD_Width = 0x0,\r
+ PLD_Height = 0x0,\r
+ PLD_UserVisible = 0x1,\r
+ PLD_Dock = 0x0,\r
+ PLD_Lid = 0x0,\r
+ PLD_Panel = "BACK",\r
+ PLD_VerticalPosition = "CENTER",\r
+ PLD_HorizontalPosition = "LEFT",\r
+ PLD_Shape = "VERTICALRECTANGLE",\r
+ PLD_GroupOrientation = 0x0,\r
+ PLD_GroupToken = 0x0,\r
+ PLD_GroupPosition = 0x1,\r
+ PLD_Bay = 0x0,\r
+ PLD_Ejectable = 0x0,\r
+ PLD_EjectRequired = 0x0,\r
+ PLD_CabinetNumber = 0x0,\r
+ PLD_CardCageNumber = 0x0,\r
+ PLD_Reference = 0x0,\r
+ PLD_Rotation = 0x0,\r
+ PLD_Order = 0x0,\r
+ PLD_VerticalOffset = 0xFFFF,\r
+ PLD_HorizontalOffset = 0xFFFF)\r
+\r
+ })\r
+ Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities\r
+ {\r
+ One, \r
+ 0x09, \r
+ Zero, \r
+ Zero\r
+ })\r
+ }\r
+ }\r
+ }\r
+\r
+ Scope (\_SB)\r
+ {\r
+ Device (MCTL)\r
+ {\r
+ Name (_HID, "SAM0602") // _HID: Hardware ID\r
+ Name (_CID, "SAM0602") // _CID: Compatible ID\r
+ Name (_SUB, "C153144D") // _SUB: Subsystem ID\r
+ Name (_DDN, "ModemCtrl") // _DDN: DOS Device Name\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_DEP, Package (0x01) // _DEP: Dependencies\r
+ {\r
+ \_SB.PM01\r
+ })\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ GpioInt (Edge, ActiveHigh, SharedAndWake, PullNone, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0061\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.MCTL._CRS.RBUF */\r
+ }\r
+\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Local0 = 0x0F\r
+ Return (Local0)\r
+ }\r
+ }\r
+ }\r
+\r
+ Scope (\_SB)\r
+ {\r
+ Device (AGNT)\r
+ {\r
+ Name (_ADR, Zero) // _ADR: Address\r
+ Name (_HID, "SAM0603") // _HID: Hardware ID\r
+ Name (_CID, "SAM0603") // _CID: Compatible ID\r
+ Name (_SUB, "C153144D") // _SUB: Subsystem ID\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_STA, 0x0F) // _STA: Status\r
+ }\r
+ }\r
+#endif\r
+\r
+\r
+\r
+ Method (ADBG, 1, Serialized)\r
+ {\r
+ \r
+ }\r
+ \r
+ Name (HPDB, Zero)\r
+ Name (PINA, Zero)\r
+ Name (CCST, Buffer (One)\r
+ {\r
+ 0x02 // .\r
+ })\r
+ Name (HSFL, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ Name (USBC, Buffer (One)\r
+ {\r
+ 0x0B // .\r
+ })\r
+\r
+ //Name (QUFN, Zero)\r
+ Name (QUFN, One)\r
+ Name (DPP0, Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ \r
+\r\r
+ Device (UCP0)\r\r
+ {\r\r
+ Name (_HID, "QCOM02D0") // _HID: Hardware ID\r\r
+ Name (_DEP, Package (0x03) // _DEP: Dependencies\r\r
+ {\r\r
+ \_SB.PEP0, \r\r
+ \_SB.PTCC, \r\r
+ \_SB.URS0\r\r
+ })\r\r
+ Device (CON0)\r\r
+ {\r\r
+ Name (_ADR, Zero) // _ADR: Address\r\r
+ Name (_PLD, Package (0x01) // _PLD: Physical Location of Device\r\r
+ {\r\r
+ ToPLD (\r\r
+ PLD_Revision = 0x2,\r\r
+ PLD_IgnoreColor = 0x1,\r\r
+ PLD_Red = 0x0,\r\r
+ PLD_Green = 0x0,\r\r
+ PLD_Blue = 0x0,\r\r
+ PLD_Width = 0x0,\r\r
+ PLD_Height = 0x0,\r\r
+ PLD_UserVisible = 0x1,\r\r
+ PLD_Dock = 0x0,\r\r
+ PLD_Lid = 0x0,\r\r
+ PLD_Panel = "BACK",\r\r
+ PLD_VerticalPosition = "CENTER",\r\r
+ PLD_HorizontalPosition = "LEFT",\r\r
+ PLD_Shape = "VERTICALRECTANGLE",\r\r
+ PLD_GroupOrientation = 0x0,\r\r
+ PLD_GroupToken = 0x0,\r\r
+ PLD_GroupPosition = 0x1,\r\r
+ PLD_Bay = 0x0,\r\r
+ PLD_Ejectable = 0x0,\r\r
+ PLD_EjectRequired = 0x0,\r\r
+ PLD_CabinetNumber = 0x0,\r\r
+ PLD_CardCageNumber = 0x0,\r\r
+ PLD_Reference = 0x0,\r\r
+ PLD_Rotation = 0x0,\r\r
+ PLD_Order = 0x0,\r\r
+ PLD_VerticalOffset = 0xFFFF,\r\r
+ PLD_HorizontalOffset = 0xFFFF)\r\r
+\r\r
+ })\r\r
+ Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities\r\r
+ {\r\r
+ One, \r\r
+ 0x08, \r\r
+ Zero, \r\r
+ Zero\r\r
+ })\r\r
+ Name (_DSD, Package (0x02) // _DSD: Device-Specific Data\r\r
+ {\r\r
+ ToUUID ("6b856e62-40f4-4688-bd46-5e888a2260de"), \r\r
+ Package (0x0A)\r\r
+ {\r\r
+ Package (0x02)\r\r
+ {\r\r
+ One, \r\r
+ 0x04\r\r
+ }, \r\r
+\r\r
+ Package (0x02)\r\r
+ {\r\r
+ 0x02, \r\r
+ 0x03\r\r
+ }, \r\r
+\r\r
+ Package (0x02)\r\r
+ {\r\r
+ 0x03, \r\r
+ Zero\r\r
+ }, \r\r
+\r\r
+ Package (0x02)\r\r
+ {\r\r
+ 0x04, \r\r
+ One\r\r
+ }, \r\r
+\r\r
+ Package (0x02)\r\r
+ {\r\r
+ 0x05, \r\r
+ 0x03\r\r
+ }, \r\r
+\r\r
+ Package (0x02)\r\r
+ {\r\r
+ 0x06, \r\r
+ Package (0x01)\r\r
+ {\r\r
+ 0x0001905A\r\r
+ }\r\r
+ }, \r\r
+\r\r
+ Package (0x02)\r\r
+ {\r\r
+ 0x07, \r\r
+ Package (0x02)\r\r
+ {\r\r
+ 0x0001912C, \r\r
+ 0x0002D0C8\r\r
+ }\r\r
+ }, \r\r
+\r\r
+ Package (0x02)\r\r
+ {\r\r
+ 0x08, \r\r
+ Package (0x02)\r\r
+ {\r\r
+ 0xFF01, \r\r
+ 0x3C86\r\r
+ }\r\r
+ }, \r\r
+\r\r
+ Package (0x02)\r\r
+ {\r\r
+ 0x09, \r\r
+ One\r\r
+ }, \r\r
+\r\r
+ Package (0x02)\r\r
+ {\r\r
+ 0x0A, \r\r
+ One\r\r
+ }\r\r
+ }\r\r
+ })\r\r
+ }\r\r
+\r\r
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method\r\r
+ {\r\r
+ While (One)\r\r
+ {\r\r
+ Name (_T_0, Buffer (0x01) // _T_x: Emitted by ASL Compiler\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.UCP0._DSM._T_0 */\r\r
+ If ((_T_0 == ToUUID ("18de299f-9476-4fc9-b43b-8aeb713ed751")))\r\r
+ {\r\r
+ While (One)\r\r
+ {\r\r
+ Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler\r\r
+ _T_1 = ToInteger (Arg2)\r\r
+ If ((_T_1 == Zero))\r\r
+ {\r\r
+ While (One)\r\r
+ {\r\r
+ Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler\r\r
+ _T_2 = ToInteger (Arg1)\r\r
+ If ((_T_2 == Zero))\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x01 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+ Else\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x01 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+\r\r
+ Break\r\r
+ }\r\r
+\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+ ElseIf ((_T_1 == One))\r\r
+ {\r\r
+ While (One)\r\r
+ {\r\r
+ Name (_T_3, 0x00) // _T_x: Emitted by ASL Compiler\r\r
+ _T_3 = ToInteger (Arg3)\r\r
+ If ((_T_3 == Zero))\r\r
+ {\r\r
+ Return (Package (0x01)\r\r
+ {\r\r
+ 0x36019050\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+ ElseIf ((_T_3 == One))\r\r
+ {\r\r
+ Return (Package (0x01)\r\r
+ {\r\r
+ 0x3601912C\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+ Else\r\r
+ {\r\r
+ Return (Package (0x01)\r\r
+ {\r\r
+ Zero\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+\r\r
+ Break\r\r
+ }\r\r
+ }\r\r
+ Else\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+\r\r
+ Break\r\r
+ }\r\r
+ }\r\r
+ Else\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+\r\r
+ Break\r\r
+ }\r\r
+ }\r\r
+\r\r
+ Method (CCOT, 2, NotSerialized)\r\r
+ {\r\r
+ \_SB.CCST = Arg0\r\r
+ \_SB.HSFL = Arg1\r\r
+ }\r\r
+\r\r
+ Method (CCVL, 0, NotSerialized)\r\r
+ {\r\r
+ Return (\_SB.CCST)\r\r
+ }\r\r
+\r\r
+ Method (HPDS, 0, NotSerialized)\r\r
+ {\r\r
+ Notify (\_SB.GPU0, 0x94) // Device-Specific\r\r
+ }\r\r
+\r\r
+ Method (HPDF, 2, NotSerialized)\r\r
+ {\r\r
+ \_SB.HPDB = Arg0\r\r
+ \_SB.PINA = Arg1\r\r
+ Notify (\_SB.GPU0, \_SB.HPDB)\r\r
+ }\r\r
+\r\r
+ Method (HPDV, 0, NotSerialized)\r\r
+ {\r\r
+ Return (\_SB.HPDB)\r\r
+ }\r\r
+\r\r
+ Method (PINV, 0, NotSerialized)\r\r
+ {\r\r
+ Return (\_SB.PINA)\r\r
+ }\r\r
+ }\r\r
+ \r\r
+ Device (URS0)\r\r
+ {\r\r
+ Method (URSI, 0, NotSerialized)\r\r
+ {\r\r
+ If ((QUFN == Zero))\r\r
+ {\r\r
+ Return ("QCOM0304")\r\r
+ }\r\r
+ Else\r\r
+ {\r\r
+ Return ("QCOM0305")\r\r
+ }\r\r
+ }\r\r
+\r\r
+ Alias (URSI, _HID)\r\r
+ Name (_CID, "PNP0CA1") // _CID: Compatible ID\r\r
+ Alias (PSUB, _SUB)\r\r
+ Name (_UID, Zero) // _UID: Unique ID\r\r
+ Name (_CCA, Zero) // _CCA: Cache Coherency Attribute\r\r
+ Name (_DEP, Package (0x01) // _DEP: Dependencies\r\r
+ {\r\r
+ PEP0\r\r
+ })\r\r
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings\r\r
+ {\r\r
+ Memory32Fixed (ReadWrite,\r\r
+ 0x0A600000, // Address Base\r\r
+ 0x000FFFFF, // Address Length\r\r
+ )\r\r
+ })\r\r
+ Device (USB0)\r\r
+ {\r\r
+ Name (_ADR, Zero) // _ADR: Address\r\r
+ Name (_S0W, 0x03) // _S0W: S0 Device Wake State\r\r
+ Name (_PLD, Package (0x01) // _PLD: Physical Location of Device\r\r
+ {\r\r
+ ToPLD (\r\r
+ PLD_Revision = 0x2,\r\r
+ PLD_IgnoreColor = 0x1,\r\r
+ PLD_Red = 0x0,\r\r
+ PLD_Green = 0x0,\r\r
+ PLD_Blue = 0x0,\r\r
+ PLD_Width = 0x0,\r\r
+ PLD_Height = 0x0,\r\r
+ PLD_UserVisible = 0x1,\r\r
+ PLD_Dock = 0x0,\r\r
+ PLD_Lid = 0x0,\r\r
+ PLD_Panel = "BACK",\r\r
+ PLD_VerticalPosition = "CENTER",\r\r
+ PLD_HorizontalPosition = "LEFT",\r\r
+ PLD_Shape = "VERTICALRECTANGLE",\r\r
+ PLD_GroupOrientation = 0x0,\r\r
+ PLD_GroupToken = 0x0,\r\r
+ PLD_GroupPosition = 0x1,\r\r
+ PLD_Bay = 0x0,\r\r
+ PLD_Ejectable = 0x0,\r\r
+ PLD_EjectRequired = 0x0,\r\r
+ PLD_CabinetNumber = 0x0,\r\r
+ PLD_CardCageNumber = 0x0,\r\r
+ PLD_Reference = 0x0,\r\r
+ PLD_Rotation = 0x0,\r\r
+ PLD_Order = 0x0,\r\r
+ PLD_VerticalOffset = 0xFFFF,\r\r
+ PLD_HorizontalOffset = 0xFFFF)\r\r
+\r\r
+ })\r\r
+ Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities\r\r
+ {\r\r
+ One, \r\r
+ 0x09, \r\r
+ Zero, \r\r
+ Zero\r\r
+ })\r\r
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings\r\r
+ {\r\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )\r\r
+ {\r\r
+ 0x000000A5,\r\r
+ }\r\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, SharedAndWake, ,, )\r\r
+ {\r\r
+ 0x0000017A,\r\r
+ }\r\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, SharedAndWake, ,, )\r\r
+ {\r\r
+ 0x00000206,\r\r
+ }\r\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, SharedAndWake, ,, )\r\r
+ {\r\r
+ 0x00000208,\r\r
+ }\r\r
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, SharedAndWake, ,, )\r\r
+ {\r\r
+ 0x00000209,\r\r
+ }\r\r
+ })\r\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r\r
+ {\r\r
+ Return (0x0F)\r\r
+ }\r\r
+\r\r
+ Method (DPM0, 1, NotSerialized)\r\r
+ {\r\r
+ DPP0 = Arg0\r\r
+ Notify (PEP0, 0xA0) // Device-Specific\r\r
+ }\r\r
+\r\r
+ Method (CCVL, 0, NotSerialized)\r\r
+ {\r\r
+ Return (CCST) /* \_SB_.CCST */\r\r
+ }\r\r
+\r\r
+ Method (HSEN, 0, NotSerialized)\r\r
+ {\r\r
+ Return (HSFL) /* \_SB_.HSFL */\r\r
+ }\r\r
+\r\r
+ Name (HSEI, ResourceTemplate ()\r\r
+ {\r\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone,\r\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r\r
+ )\r\r
+ { // Pin list\r\r
+ 0x003E\r\r
+ }\r\r
+ })\r\r
+ Scope (^^GIO0)\r\r
+ {\r\r
+ OperationRegion (HLEN, GeneralPurposeIo, Zero, One)\r\r
+ }\r\r
+\r\r
+ Field (^^GIO0.HLEN, ByteAcc, NoLock, Preserve)\r\r
+ {\r\r
+ Connection (HSEI), \r\r
+ MOD1, 1\r\r
+ }\r\r
+\r\r
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method\r\r
+ {\r\r
+ While (One)\r\r
+ {\r\r
+ Name (_T_0, Buffer (One) // _T_x: Emitted by ASL Compiler\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.URS0.USB0._DSM._T_0 */\r\r
+ If ((_T_0 == ToUUID ("ce2ee385-00e6-48cb-9f05-2edb927c4899") /* USB Controller */))\r\r
+ {\r\r
+ While (One)\r\r
+ {\r\r
+ Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler\r\r
+ _T_1 = ToInteger (Arg2)\r\r
+ If ((_T_1 == Zero))\r\r
+ {\r\r
+ While (One)\r\r
+ {\r\r
+ Name (_T_2, Zero) // _T_x: Emitted by ASL Compiler\r\r
+ _T_2 = ToInteger (Arg1)\r\r
+ If ((_T_2 == Zero))\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x1D // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+ Else\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x01 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+\r\r
+ Break\r\r
+ }\r\r
+\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+ ElseIf ((_T_1 == 0x02))\r\r
+ {\r\r
+ Return (Zero)\r\r
+ Break\r\r
+ }\r\r
+ ElseIf ((_T_1 == 0x03))\r\r
+ {\r\r
+ Return (One)\r\r
+ Break\r\r
+ }\r\r
+ ElseIf ((_T_1 == 0x04))\r\r
+ {\r\r
+ Return (0x02)\r\r
+ Break\r\r
+ }\r\r
+ Else\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+\r\r
+ Break\r\r
+ }\r\r
+ }\r\r
+ ElseIf ((_T_0 == ToUUID ("a9a82a56-95a1-4b4a-b014-3be47df1b7d5")))\r\r
+ {\r\r
+ While (One)\r\r
+ {\r\r
+ Name (_T_3, Zero) // _T_x: Emitted by ASL Compiler\r\r
+ _T_3 = ToInteger (Arg1)\r\r
+ If ((_T_3 == One))\r\r
+ {\r\r
+ While (One)\r\r
+ {\r\r
+ Name (_T_4, Zero) // _T_x: Emitted by ASL Compiler\r\r
+ _T_4 = ToInteger (Arg2)\r\r
+ If ((_T_4 == One))\r\r
+ {\r\r
+ ADBG ("MOD1+")\r\r
+ MOD1 = One\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x01 // .\r\r
+ })\r\r
+ }\r\r
+ ElseIf ((_T_4 == Zero))\r\r
+ {\r\r
+ ADBG ("MOD1-")\r\r
+ MOD1 = Zero\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x01 // .\r\r
+ })\r\r
+ }\r\r
+ Else\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ }\r\r
+\r\r
+ Break\r\r
+ }\r\r
+ }\r\r
+ Else\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ }\r\r
+\r\r
+ Break\r\r
+ }\r\r
+ }\r\r
+ Else\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+\r\r
+ Break\r\r
+ }\r\r
+ }\r\r
+\r\r
+ Method (PHYC, 0, NotSerialized)\r\r
+ {\r\r
+ Name (CFG0, Package (0x01)\r\r
+ {\r\r
+ Package (0x03)\r\r
+ {\r\r
+ Zero, \r\r
+ 0x088E2198, \r\r
+ 0x20\r\r
+ }\r\r
+ })\r\r
+ Return (CFG0) /* \_SB_.URS0.USB0.PHYC.CFG0 */\r\r
+ }\r\r
+\r\r
+ Device (RHUB)\r\r
+ {\r\r
+ Name (_ADR, Zero) // _ADR: Address\r\r
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method\r\r
+ {\r\r
+ While (One)\r\r
+ {\r\r
+ Name (_T_0, Buffer (One) // _T_x: Emitted by ASL Compiler\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.URS0.USB0.RHUB._DSM._T_0 */\r\r
+ If ((_T_0 == ToUUID ("a9a82a56-95a1-4b4a-b014-3be47df1b7d5")))\r\r
+ {\r\r
+ While (One)\r\r
+ {\r\r
+ Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler\r\r
+ _T_1 = ToInteger (Arg1)\r\r
+ If ((_T_1 == One))\r\r
+ {\r\r
+ While (One)\r\r
+ {\r\r
+ Name (_T_2, Zero) // _T_x: Emitted by ASL Compiler\r\r
+ _T_2 = ToInteger (Arg2)\r\r
+ If ((_T_2 == One))\r\r
+ {\r\r
+ ADBG ("MOD1++")\r\r
+ MOD1 = One\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x01 // .\r\r
+ })\r\r
+ }\r\r
+ ElseIf ((_T_2 == Zero))\r\r
+ {\r\r
+ ADBG ("MOD1--")\r\r
+ MOD1 = Zero\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x01 // .\r\r
+ })\r\r
+ }\r\r
+ Else\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ }\r\r
+\r\r
+ Break\r\r
+ }\r\r
+ }\r\r
+ Else\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ }\r\r
+\r\r
+ Break\r\r
+ }\r\r
+ }\r\r
+ Else\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+\r\r
+ Break\r\r
+ }\r\r
+ }\r\r
+ }\r\r
+ }\r\r
+\r\r
+ Device (UFN0)\r\r
+ {\r\r
+ Name (_ADR, One) // _ADR: Address\r\r
+ Name (_S0W, 0x03) // _S0W: S0 Device Wake State\r\r
+ Name (_PLD, Package (0x01) // _PLD: Physical Location of Device\r\r
+ {\r\r
+ ToPLD (\r\r
+ PLD_Revision = 0x2,\r\r
+ PLD_IgnoreColor = 0x1,\r\r
+ PLD_Red = 0x0,\r\r
+ PLD_Green = 0x0,\r\r
+ PLD_Blue = 0x0,\r\r
+ PLD_Width = 0x0,\r\r
+ PLD_Height = 0x0,\r\r
+ PLD_UserVisible = 0x1,\r\r
+ PLD_Dock = 0x0,\r\r
+ PLD_Lid = 0x0,\r\r
+ PLD_Panel = "BACK",\r\r
+ PLD_VerticalPosition = "CENTER",\r\r
+ PLD_HorizontalPosition = "LEFT",\r\r
+ PLD_Shape = "VERTICALRECTANGLE",\r\r
+ PLD_GroupOrientation = 0x0,\r\r
+ PLD_GroupToken = 0x0,\r\r
+ PLD_GroupPosition = 0x1,\r\r
+ PLD_Bay = 0x0,\r\r
+ PLD_Ejectable = 0x0,\r\r
+ PLD_EjectRequired = 0x0,\r\r
+ PLD_CabinetNumber = 0x0,\r\r
+ PLD_CardCageNumber = 0x0,\r\r
+ PLD_Reference = 0x0,\r\r
+ PLD_Rotation = 0x0,\r\r
+ PLD_Order = 0x0,\r\r
+ PLD_VerticalOffset = 0xFFFF,\r\r
+ PLD_HorizontalOffset = 0xFFFF)\r\r
+\r\r
+ })\r\r
+ Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities\r\r
+ {\r\r
+ One, \r\r
+ 0x09, \r\r
+ Zero, \r\r
+ Zero\r\r
+ })\r\r
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings\r\r
+ {\r\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, )\r\r
+ {\r\r
+ 0x000000A5,\r\r
+ }\r\r
+ Interrupt (ResourceConsumer, Level, ActiveHigh, SharedAndWake, ,, )\r\r
+ {\r\r
+ 0x000000A2,\r\r
+ }\r\r
+ })\r\r
+ Method (CCVL, 0, NotSerialized)\r\r
+ {\r\r
+ Return (CCST) /* \_SB_.CCST */\r\r
+ }\r\r
+\r\r
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method\r\r
+ {\r\r
+ While (One)\r\r
+ {\r\r
+ Name (_T_0, Buffer (One) // _T_x: Emitted by ASL Compiler\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.URS0.UFN0._DSM._T_0 */\r\r
+ If ((_T_0 == ToUUID ("fe56cfeb-49d5-4378-a8a2-2978dbe54ad2")))\r\r
+ {\r\r
+ While (One)\r\r
+ {\r\r
+ Name (_T_1, Zero) // _T_x: Emitted by ASL Compiler\r\r
+ _T_1 = ToInteger (Arg2)\r\r
+ If ((_T_1 == Zero))\r\r
+ {\r\r
+ While (One)\r\r
+ {\r\r
+ Name (_T_2, Zero) // _T_x: Emitted by ASL Compiler\r\r
+ _T_2 = ToInteger (Arg1)\r\r
+ If ((_T_2 == Zero))\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x03 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+ Else\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x01 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+\r\r
+ Break\r\r
+ }\r\r
+\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+ ElseIf ((_T_1 == One))\r\r
+ {\r\r
+ Return (0x20)\r\r
+ Break\r\r
+ }\r\r
+ Else\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+\r\r
+ Break\r\r
+ }\r\r
+ }\r\r
+ ElseIf ((_T_0 == ToUUID ("18de299f-9476-4fc9-b43b-8aeb713ed751")))\r\r
+ {\r\r
+ While (One)\r\r
+ {\r\r
+ Name (_T_3, Zero) // _T_x: Emitted by ASL Compiler\r\r
+ _T_3 = ToInteger (Arg2)\r\r
+ If ((_T_3 == Zero))\r\r
+ {\r\r
+ While (One)\r\r
+ {\r\r
+ Name (_T_4, Zero) // _T_x: Emitted by ASL Compiler\r\r
+ _T_4 = ToInteger (Arg1)\r\r
+ If ((_T_4 == Zero))\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x03 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+ Else\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x01 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+\r\r
+ Break\r\r
+ }\r\r
+\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+ ElseIf ((_T_3 == One))\r\r
+ {\r\r
+ Return (0x39)\r\r
+ Break\r\r
+ }\r\r
+ Else\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+\r\r
+ Break\r\r
+ }\r\r
+ }\r\r
+ Else\r\r
+ {\r\r
+ Return (Buffer (One)\r\r
+ {\r\r
+ 0x00 // .\r\r
+ })\r\r
+ Break\r\r
+ }\r\r
+\r\r
+ Break\r\r
+ }\r\r
+ }\r\r
+\r\r
+ Method (PHYC, 0, NotSerialized)\r\r
+ {\r\r
+ Name (CFG0, Package (0x12)\r\r
+ {\r\r
+ /*Package (0x03)\r\r
+ {\r\r
+ Zero, \r\r
+ 0x088E2198, \r\r
+ 0x20\r\r
+ }*/\r\r
+ \r\r
+ Package (0x03) { Zero, 0x088E2210, 0x23 },\r\r
+ Package (0x03) { Zero, 0x088E2004, 0x03 },\r\r
+ Package (0x03) { Zero, 0x088E218c, 0x7c },\r\r
+ Package (0x03) { Zero, 0x088E202c, 0x80 },\r\r
+ Package (0x03) { Zero, 0x088E2184, 0x0a },\r\r
+ Package (0x03) { Zero, 0x088E20b4, 0x19 },\r\r
+ Package (0x03) { Zero, 0x088E2194, 0x40 },\r\r
+ Package (0x03) { Zero, 0x088E2198, 0x28 },\r\r
+ Package (0x03) { Zero, 0x088E2214, 0x21 },\r\r
+ Package (0x03) { Zero, 0x088E2220, 0x00 },\r\r
+ Package (0x03) { Zero, 0x088E2224, 0x58 },\r\r
+ Package (0x03) { Zero, 0x088E2240, 0x35 },\r\r
+ Package (0x03) { Zero, 0x088E2244, 0x29 },\r\r
+ Package (0x03) { Zero, 0x088E2248, 0xca },\r\r
+ Package (0x03) { Zero, 0x088E224c, 0x04 },\r\r
+ Package (0x03) { Zero, 0x088E2250, 0x03 },\r\r
+ Package (0x03) { Zero, 0x088E223c, 0x00 },\r\r
+ Package (0x03) { Zero, 0x088E2210, 0x22 }\r\r
+ })\r\r
+ Return (CFG0) /* \_SB_.URS0.UFN0.PHYC.CFG0 */\r\r
+ }\r\r
+ }\r\r
+ }\r
+ \r
+\r
+ Device (TSC1)\r
+ {\r
+ Name (_HID, "MSHW1003") // _HID: Hardware ID\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_DEP, Package (0x03) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0,\r
+ \_SB.GIO0, \r
+ \_SB.IC13\r
+ })\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ I2cSerialBusV2 (0x0020, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.IC13",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullUp, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x007D\r
+ }\r
+ GpioIo (Exclusive, PullNone, 0x0000, 0x0000, IoRestrictionNone,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0063\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.TSC1._CRS.RBUF */\r
+ }\r
+\r
+ /*Method (INFO, 0, NotSerialized)\r
+ {\r
+ Name (RBUF, Buffer (0x04)\r
+ {\r
+ 0x0F, 0x01, 0x00, 0x00 // ....\r
+ })\r
+ Return (RBUF)\r
+ }*/\r
+\r
+ // PEP Proxy Support\r
+ Name (PGID, Buffer (0x0A)\r
+ {\r
+ "\\_SB.TSC1"\r
+ }) // Device ID buffer - PGID( Pep given ID )\r
+ Name (DBUF, Buffer (DBFL){}) // Device ID buffer - PGID( Pep given ID )\r
+ CreateByteField (DBUF, Zero, STAT) // STATUS 1 BYTE\r
+ // HIDDEN 1 BYTE ( SIZE )\r
+ CreateByteField (DBUF, 0x02, DVAL) // Packet value, 1 BYTES Device Status\r
+ CreateField (DBUF, 0x18, 0xA0, DEID)// Device ID, 20 BYTES(160 Bits)\r
+ Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State\r
+ {\r
+ Return (0x03)\r
+ }\r
+\r
+ Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State\r
+ {\r
+ Return (0x03)\r
+ }\r
+\r
+ Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State\r
+ {\r
+ Return (0x03)\r
+ }\r
+\r
+ Method (_PS0, 0, NotSerialized) // _PS0: Power State 0\r
+ {\r
+ DEID = Buffer (ESNL){}\r
+ DVAL = Zero\r
+ DEID = PGID /* \_SB_.TSC1.PGID */\r
+ If (\_SB.ABD.AVBL)\r
+ {\r
+ \_SB.PEP0.FLD0 = DBUF /* \_SB_.TSC1.DBUF */\r
+ }\r
+ }\r
+\r
+ Method (_PS3, 0, NotSerialized) // _PS3: Power State 3\r
+ {\r
+ DEID = Buffer (ESNL){}\r
+ DVAL = 0x03\r
+ DEID = PGID /* \_SB_.TSC1.PGID */\r
+ If (\_SB.ABD.AVBL)\r
+ {\r
+ \_SB.PEP0.FLD0 = DBUF /* \_SB_.TSC1.DBUF */\r
+ }\r
+ }\r
+ }\r
+\r
+ // CPU Aggregator Device -- Required for Thermal Parking\r
+ Device (AGR0)\r
+ {\r
+ Name (_HID, "ACPI000C" /* Processor Aggregator Device */) // _HID: Hardware ID\r
+ Name (_PUR, Package (0x02) // _PUR: Processor Utilization Request\r
+ {\r
+ One, \r
+ Zero\r
+ })\r
+ Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication\r
+ {\r
+ \_SB.PEP0.ROST = Arg2\r
+ }\r
+ }\r
+ \r
+ /*Device (OPBT)\r
+ {\r
+ Name (_HID, "OPHW1001")\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0,\r
+ \_SB.IC11\r
+ })\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ I2CSerialBus (0x55, ControllerInitiated, 100000, AddressingMode7Bit, "\\_SB.IC11", , )\r
+ })\r
+ Return (RBUF)\r
+ }\r
+ }*/\r
+ \r
+ Device (OP3P)\r
+ {\r
+ Name (_HID, "QCOM2456")\r
+ Method (_CRS, 0x0, NotSerialized) {\r
+ Name (RBUF, ResourceTemplate () {\r
+ I2CSerialBus( 0x55, ControllerInitiated, 100000, AddressingMode7Bit, "\\_SB.IC11", , )\r
+ })\r
+ \r
+ Return (RBUF)\r
+ } // Number of args in CFG0 must match value of NUM_PMIC_3P_ACPI_ARGS 10 in PmicAcpi.c\r
+ Method (PMCF) {\r
+ Name (CFG0, \r
+ Package(){\r
+ // Charger Info \r
+ 0, // I2c Index - Resource Index\r
+ 1, // Charger IC Type - PLAT_CONFIG_CHG_IC_SMB1360\r
+ 1, // Charger Connector Type - PLAT_CONFIG_CHG_CONN_WALL \r
+ 1, // PMIC Watch Dog Timer On - PMIC_TRUE\r
+ 20, // PMIC Watch Dog Timer Seconds\r
+\r
+ // Gauging Info\r
+ 0, // I2c Index - Gauge Resource Index\r
+ 2, // I2c Index - Gauge GPIO Expander Resource Index\r
+ 0, // Gauge GPIO Expander present\r
+ 1, // Gauge IC - PM_THIRD_PARTY_GAUGE_IC_SMB1360\r
+\r
+ // Battery Info\r
+ 1, // Battery Type - PLAT_CONFIG_BATT_CELL_TYPE_1S2P \r
+ \r
+ // GPIO Present\r
+ 0 // 0- GPIO not present, 1- GPIO present\r
+ })\r
+ Return (CFG0)\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ0)\r
+ {\r
+ Name (_HID, "QCOM02B0") // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_TZD, Package (0x04) // _TZD: Thermal Zone Devices\r
+ {\r
+ \_SB.SYSM.CLUS.CPU0, \r
+ \_SB.SYSM.CLUS.CPU1, \r
+ \_SB.SYSM.CLUS.CPU2, \r
+ \_SB.SYSM.CLUS.CPU3\r
+ })\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ1)\r
+ {\r
+ Name (_HID, "QCOM02B0") // _HID: Hardware ID\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_TZD, Package (0x01) // _TZD: Thermal Zone Devices\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ Name (TPSV, 0x0EF6)\r
+ Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature\r
+ {\r
+ Return (\_SB.TZ1.TPSV)\r
+ }\r
+\r
+ Name (_MTL, 0x14) // _MTL: Minimum Throttle Limit\r
+ Name (TTC1, Zero)\r
+ Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1\r
+ {\r
+ Return (\_SB.TZ1.TTC1)\r
+ }\r
+\r
+ Name (TTC2, One)\r
+ Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2\r
+ {\r
+ Return (\_SB.TZ1.TTC2)\r
+ }\r
+\r
+ Name (TTSP, 0x32)\r
+ Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period\r
+ {\r
+ Return (\_SB.TZ1.TTSP)\r
+ }\r
+\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ2)\r
+ {\r
+ Name (_HID, "QCOM02B1") // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_TZD, Package (0x04) // _TZD: Thermal Zone Devices\r
+ {\r
+ \_SB.SYSM.CLUS.CPU4, \r
+ \_SB.SYSM.CLUS.CPU5, \r
+ \_SB.SYSM.CLUS.CPU6, \r
+ \_SB.SYSM.CLUS.CPU7\r
+ })\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ3)\r
+ {\r
+ Name (_HID, "QCOM02B1") // _HID: Hardware ID\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_TZD, Package (0x01) // _TZD: Thermal Zone Devices\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ Name (TPSV, 0x0EF6)\r
+ Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature\r
+ {\r
+ Return (\_SB.TZ3.TPSV)\r
+ }\r
+\r
+ Name (TTC1, Zero)\r
+ Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1\r
+ {\r
+ Return (\_SB.TZ3.TTC1)\r
+ }\r
+\r
+ Name (TTC2, One)\r
+ Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2\r
+ {\r
+ Return (\_SB.TZ3.TTC2)\r
+ }\r
+\r
+ Name (TTSP, One)\r
+ Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period\r
+ {\r
+ Return (\_SB.TZ3.TTSP)\r
+ }\r
+\r
+ Name (_MTL, 0x14) // _MTL: Minimum Throttle Limit\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ20)\r
+ {\r
+ Name (_HID, "QCOM02AB") // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_TZD, Package (0x01) // _TZD: Thermal Zone Devices\r
+ {\r
+ //\_SB.SYSM.CLUS.CPU6\r
+//#if 0\r
+ \_SB.GPU0\r
+//#endif\r
+ })\r
+ Name (TPSV, 0x0E60)\r
+ Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature\r
+ {\r
+ Return (\_SB.TZ20.TPSV)\r
+ }\r
+\r
+ Name (TTC1, One)\r
+ Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1\r
+ {\r
+ Return (\_SB.TZ20.TTC1)\r
+ }\r
+\r
+ Name (TTC2, 0x02)\r
+ Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2\r
+ {\r
+ Return (\_SB.TZ20.TTC2)\r
+ }\r
+\r
+ Name (TTSP, 0x02)\r
+ Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period\r
+ {\r
+ Return (\_SB.TZ20.TTSP)\r
+ }\r
+\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ21)\r
+ {\r
+ Name (_HID, "QCOM02AC") // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_TZD, Package (0x1) //(0x01) // _TZD: Thermal Zone Devices\r
+ {\r
+ //\_SB.SYSM.CLUS.CPU6\r
+//#if 0\r
+ \_SB.GPU0\r
+//#endif\r
+ })\r
+ Name (TPSV, 0x0E60)\r
+ Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature\r
+ {\r
+ Return (\_SB.TZ21.TPSV)\r
+ }\r
+\r
+ Name (TTC1, One)\r
+ Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1\r
+ {\r
+ Return (\_SB.TZ21.TTC1)\r
+ }\r
+\r
+ Name (TTC2, 0x02)\r
+ Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2\r
+ {\r
+ Return (\_SB.TZ21.TTC2)\r
+ }\r
+\r
+ Name (TTSP, 0x02)\r
+ Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period\r
+ {\r
+ Return (\_SB.TZ21.TTSP)\r
+ }\r
+\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ }\r
+ }\r
+\r
+\r
+ ThermalZone (TZ32)\r
+ {\r
+ Name (_HID, "QCOM02C9") // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_TZD, Package (0x01) //(0x01) // _TZD: Thermal Zone Devices\r
+ {\r
+ //\_SB.SYSM.CLUS.CPU6\r
+ \_SB.GPU0.AVS0\r
+ })\r
+ Name (TPSV, 0x0E60)\r
+ Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature\r
+ {\r
+ Return (\_SB.TZ32.TPSV)\r
+ }\r
+\r
+ Name (TTC1, One)\r
+ Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1\r
+ {\r
+ Return (\_SB.TZ32.TTC1)\r
+ }\r
+\r
+ Name (TTC2, 0x02)\r
+ Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2\r
+ {\r
+ Return (\_SB.TZ32.TTC2)\r
+ }\r
+\r
+ Name (TTSP, 0x0A)\r
+ Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period\r
+ {\r
+ Return (\_SB.TZ32.TTSP)\r
+ }\r
+\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ33)\r
+ {\r
+ Name (_HID, "QCOM02CB") // _HID: Hardware ID\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_TZD, Package (0x01) // _TZD: Thermal Zone Devices\r
+ {\r
+ \_SB.AMSS\r
+ })\r
+ Name (TPSV, 0x0E60)\r
+ Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature\r
+ {\r
+ Return (\_SB.TZ33.TPSV)\r
+ }\r
+\r
+ Name (TTC1, One)\r
+ Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1\r
+ {\r
+ Return (\_SB.TZ33.TTC1)\r
+ }\r
+\r
+ Name (TTC2, 0x02)\r
+ Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2\r
+ {\r
+ Return (\_SB.TZ33.TTC2)\r
+ }\r
+\r
+ Name (TTSP, 0x0A)\r
+ Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period\r
+ {\r
+ Return (\_SB.TZ33.TTSP)\r
+ }\r
+\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ36)\r
+ {\r
+ Name (_HID, "QCOM029E") // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_TZD, Package (0x08) // _TZD: Thermal Zone Devices\r
+ {\r
+ \_SB.SYSM.CLUS.CPU0, \r
+ \_SB.SYSM.CLUS.CPU1, \r
+ \_SB.SYSM.CLUS.CPU2, \r
+ \_SB.SYSM.CLUS.CPU3, \r
+ \_SB.SYSM.CLUS.CPU4, \r
+ \_SB.SYSM.CLUS.CPU5, \r
+ \_SB.SYSM.CLUS.CPU6, \r
+ \_SB.SYSM.CLUS.CPU7//, \r
+ //\_SB.PMBM\r
+ })\r
+ Name (TPSV, 0x0EC4)\r
+ Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature\r
+ {\r
+ Return (\_SB.TZ36.TPSV)\r
+ }\r
+\r
+ Name (TTC1, 0x04)\r
+ Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1\r
+ {\r
+ Return (\_SB.TZ36.TTC1)\r
+ }\r
+\r
+ Name (TTC2, 0x03)\r
+ Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2\r
+ {\r
+ Return (\_SB.TZ36.TTC2)\r
+ }\r
+\r
+ Name (TTSP, 0x32)\r
+ Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period\r
+ {\r
+ Return (\_SB.TZ36.TTSP)\r
+ }\r
+\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x02)\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.ADC1\r
+ })\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ37)\r
+ {\r
+ Name (_HID, "QCOM029E") // _HID: Hardware ID\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_TZD, Package (0x01) // _TZD: Thermal Zone Devices\r
+ {\r
+ \_SB.PEP0//, \r
+ //\_SB.PMBM\r
+ })\r
+ Name (TPSV, 0x0F8C)\r
+ Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature\r
+ {\r
+ Return (\_SB.TZ37.TPSV)\r
+ }\r
+\r
+ Name (TCRT, 0x1054)\r
+ Method (_CRT, 0, NotSerialized) // _CRT: Critical Temperature\r
+ {\r
+ Return (\_SB.TZ37.TCRT)\r
+ }\r
+\r
+ Name (TTC1, 0x04)\r
+ Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1\r
+ {\r
+ Return (\_SB.TZ37.TTC1)\r
+ }\r
+\r
+ Name (TTC2, 0x03)\r
+ Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2\r
+ {\r
+ Return (\_SB.TZ37.TTC2)\r
+ }\r
+\r
+ Name (TTSP, 0x32)\r
+ Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period\r
+ {\r
+ Return (\_SB.TZ37.TTSP)\r
+ }\r
+\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x02)\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.ADC1\r
+ })\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ38)\r
+ {\r
+ Name (_HID, "QCOM029E") // _HID: Hardware ID\r
+ Name (_UID, 0x02) // _UID: Unique ID\r
+ Name (_TZD, Package (0x01) // _TZD: Thermal Zone Devices\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ Method (INVT, 0, NotSerialized)\r
+ {\r
+ Return (One)\r
+ }\r
+\r
+ Method (_MTL, 0, NotSerialized) // _MTL: Minimum Throttle Limit\r
+ {\r
+ Return (0x3C)\r
+ }\r
+\r
+ Name (TPSV, 0x0B0E)\r
+ Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature\r
+ {\r
+ Return (\_SB.TZ38.TPSV)\r
+ }\r
+\r
+ Name (TTC1, 0x04)\r
+ Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1\r
+ {\r
+ Return (\_SB.TZ38.TTC1)\r
+ }\r
+\r
+ Name (TTC2, 0x03)\r
+ Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2\r
+ {\r
+ Return (\_SB.TZ38.TTC2)\r
+ }\r
+\r
+ Name (TTSP, 0x0A)\r
+ Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period\r
+ {\r
+ Return (\_SB.TZ38.TTSP)\r
+ }\r
+\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x02)\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.ADC1\r
+ })\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ40)\r
+ {\r
+ Name (_HID, "QCOM02AF") // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_TZD, Package (0x01) // _TZD: Thermal Zone Devices\r
+ {\r
+ \_SB.COEX\r
+ })\r
+ Name (TPSV, 0x0DFC)\r
+ Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature\r
+ {\r
+ Return (\_SB.TZ40.TPSV)\r
+ }\r
+\r
+ Name (TTC1, One)\r
+ Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1\r
+ {\r
+ Return (\_SB.TZ40.TTC1)\r
+ }\r
+\r
+ Name (TTC2, 0x05)\r
+ Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2\r
+ {\r
+ Return (\_SB.TZ40.TTC2)\r
+ }\r
+\r
+ Name (TTSP, 0x1E)\r
+ Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period\r
+ {\r
+ Return (\_SB.TZ40.TTSP)\r
+ }\r
+\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ41)\r
+ {\r
+ Name (_HID, "QCOM0295") // _HID: Hardware ID\r
+ Name (_UID, One) // _UID: Unique ID\r
+ Name (_TSP, 0x32) // _TSP: Thermal Sampling Period\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ }\r
+\r
+ ThermalZone (TZ44)\r
+ {\r
+ Name (_HID, "QCOM02CC") // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_TZD, Package (0x04) // _TZD: Thermal Zone Devices\r
+ {\r
+ \_SB.SYSM.CLUS.CPU4, \r
+ \_SB.SYSM.CLUS.CPU5, \r
+ \_SB.SYSM.CLUS.CPU6, \r
+ \_SB.SYSM.CLUS.CPU7\r
+ })\r
+ Name (TPSV, 0x0E60)\r
+ Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature\r
+ {\r
+ Return (\_SB.TZ44.TPSV)\r
+ }\r
+\r
+ Name (TTC1, Zero)\r
+ Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1\r
+ {\r
+ Return (\_SB.TZ44.TTC1)\r
+ }\r
+\r
+ Name (TTC2, One)\r
+ Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2\r
+ {\r
+ Return (\_SB.TZ44.TTC2)\r
+ }\r
+\r
+ Name (TTSP, One)\r
+ Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period\r
+ {\r
+ Return (\_SB.TZ44.TTSP)\r
+ }\r
+\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ99)\r
+ {\r
+ Name (_HID, "QCOM02B2") // _HID: Hardware ID\r
+ Name (_UID, 0x64) // _UID: Unique ID\r
+ Name (TCRT, 0x0EF6)\r
+ Method (_CRT, 0, NotSerialized) // _CRT: Critical Temperature\r
+ {\r
+ Return (\_SB.TZ99.TCRT)\r
+ }\r
+\r
+ Name (TTC1, 0x04)\r
+ Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1\r
+ {\r
+ Return (\_SB.TZ99.TTC1)\r
+ }\r
+\r
+ Name (TTC2, 0x03)\r
+ Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2\r
+ {\r
+ Return (\_SB.TZ99.TTC2)\r
+ }\r
+\r
+ Name (TTSP, 0x0A)\r
+ Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period\r
+ {\r
+ Return (\_SB.TZ99.TTSP)\r
+ }\r
+\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x01)\r
+ {\r
+ \_SB.PEP0\r
+ })\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ4)\r
+ {\r
+ Name (_HID, "QCOM0299") // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_TZD, Package (0x0A) // _TZD: Thermal Zone Devices\r
+ {\r
+ \_SB.SYSM.CLUS.CPU0, \r
+ \_SB.SYSM.CLUS.CPU1, \r
+ \_SB.SYSM.CLUS.CPU2, \r
+ \_SB.SYSM.CLUS.CPU3, \r
+ \_SB.SYSM.CLUS.CPU4, \r
+ \_SB.SYSM.CLUS.CPU5, \r
+ \_SB.SYSM.CLUS.CPU6, \r
+ \_SB.SYSM.CLUS.CPU7, \r
+ \_SB.GPU0.MON0, \r
+ \_SB.GPU0\r
+ })\r
+ Name (TPSV, 0x0E92)\r
+ Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature\r
+ {\r
+ Return (\_SB.TZ4.TPSV)\r
+ }\r
+\r
+ Name (TTC1, One)\r
+ Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1\r
+ {\r
+ Return (\_SB.TZ4.TTC1)\r
+ }\r
+\r
+ Name (TTC2, One)\r
+ Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2\r
+ {\r
+ Return (\_SB.TZ4.TTC2)\r
+ }\r
+\r
+ Name (TTSP, 0x32)\r
+ Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period\r
+ {\r
+ Return (\_SB.TZ4.TTSP)\r
+ }\r
+\r
+ Name (_MTL, 0x19) // _MTL: Minimum Throttle Limit\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x02)\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.ADC1\r
+ })\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ5)\r
+ {\r
+ Name (_HID, "QCOM029A") // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_TZD, Package (0x08) // _TZD: Thermal Zone Devices\r
+ {\r
+ \_SB.SYSM.CLUS.CPU0, \r
+ \_SB.SYSM.CLUS.CPU1, \r
+ \_SB.SYSM.CLUS.CPU2, \r
+ \_SB.SYSM.CLUS.CPU3, \r
+ \_SB.SYSM.CLUS.CPU4, \r
+ \_SB.SYSM.CLUS.CPU5, \r
+ \_SB.SYSM.CLUS.CPU6, \r
+ \_SB.SYSM.CLUS.CPU7\r
+ })\r
+ Name (TPSV, 0x0E92)\r
+ Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature\r
+ {\r
+ Return (\_SB.TZ5.TPSV)\r
+ }\r
+\r
+ Name (TTC1, One)\r
+ Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1\r
+ {\r
+ Return (\_SB.TZ5.TTC1)\r
+ }\r
+\r
+ Name (TTC2, One)\r
+ Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2\r
+ {\r
+ Return (\_SB.TZ5.TTC2)\r
+ }\r
+\r
+ Name (TTSP, 0x32)\r
+ Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period\r
+ {\r
+ Return (\_SB.TZ5.TTSP)\r
+ }\r
+\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x02)\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.ADC1\r
+ })\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ6)\r
+ {\r
+ Name (_HID, "QCOM029B") // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_TZD, Package (0x01) // _TZD: Thermal Zone Devices\r
+ {\r
+ \_SB.COEX\r
+ })\r
+ Name (TPSV, 0x0E92)\r
+ Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature\r
+ {\r
+ Return (\_SB.TZ6.TPSV)\r
+ }\r
+\r
+ Name (TTC1, One)\r
+ Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1\r
+ {\r
+ Return (\_SB.TZ6.TTC1)\r
+ }\r
+\r
+ Name (TTC2, One)\r
+ Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2\r
+ {\r
+ Return (\_SB.TZ6.TTC2)\r
+ }\r
+\r
+ Name (TTSP, 0x32)\r
+ Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period\r
+ {\r
+ Return (\_SB.TZ6.TTSP)\r
+ }\r
+\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x02)\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.ADC1\r
+ })\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ7)\r
+ {\r
+ Name (_HID, "QCOM029C") // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_TZD, Package (0x08) // _TZD: Thermal Zone Devices\r
+ {\r
+ \_SB.SYSM.CLUS.CPU0, \r
+ \_SB.SYSM.CLUS.CPU1, \r
+ \_SB.SYSM.CLUS.CPU2, \r
+ \_SB.SYSM.CLUS.CPU3, \r
+ \_SB.SYSM.CLUS.CPU4, \r
+ \_SB.SYSM.CLUS.CPU5, \r
+ \_SB.SYSM.CLUS.CPU6, \r
+ \_SB.SYSM.CLUS.CPU7\r
+ })\r
+ Name (TCRT, 0x0DCA)\r
+ Method (_CRT, 0, NotSerialized) // _CRT: Critical Temperature\r
+ {\r
+ Return (\_SB.TZ7.TCRT)\r
+ }\r
+\r
+ Name (TPSV, 0x0DC0)\r
+ Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature\r
+ {\r
+ Return (\_SB.TZ7.TPSV)\r
+ }\r
+\r
+ Name (TTC1, One)\r
+ Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1\r
+ {\r
+ Return (\_SB.TZ7.TTC1)\r
+ }\r
+\r
+ Name (TTC2, One)\r
+ Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2\r
+ {\r
+ Return (\_SB.TZ7.TTC2)\r
+ }\r
+\r
+ Name (TTSP, 0x32)\r
+ Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period\r
+ {\r
+ Return (\_SB.TZ7.TTSP)\r
+ }\r
+\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x02)\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.ADC1\r
+ })\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ8)\r
+ {\r
+ Name (_HID, "QCOM029D") // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_TZD, Package (0x0A) // _TZD: Thermal Zone Devices\r
+ {\r
+ \_SB.SYSM.CLUS.CPU0, \r
+ \_SB.SYSM.CLUS.CPU1, \r
+ \_SB.SYSM.CLUS.CPU2, \r
+ \_SB.SYSM.CLUS.CPU3, \r
+ \_SB.SYSM.CLUS.CPU4, \r
+ \_SB.SYSM.CLUS.CPU5, \r
+ \_SB.SYSM.CLUS.CPU6, \r
+ \_SB.SYSM.CLUS.CPU7, \r
+ \_SB.GPU0.MON0, \r
+ \_SB.GPU0\r
+ })\r
+ Name (TPSV, 0x0E92)\r
+ Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature\r
+ {\r
+ Return (\_SB.TZ8.TPSV)\r
+ }\r
+\r
+ Name (TTC1, One)\r
+ Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1\r
+ {\r
+ Return (\_SB.TZ8.TTC1)\r
+ }\r
+\r
+ Name (TTC2, One)\r
+ Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2\r
+ {\r
+ Return (\_SB.TZ8.TTC2)\r
+ }\r
+\r
+ Name (TTSP, 0x32)\r
+ Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period\r
+ {\r
+ Return (\_SB.TZ8.TTSP)\r
+ }\r
+\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ Name (_MTL, 0x19) // _MTL: Minimum Throttle Limit\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x02)\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.ADC1\r
+ })\r
+ }\r
+ }\r
+\r
+ ThermalZone (TZ9)\r
+ {\r
+ Name (_HID, "QCOM029F") // _HID: Hardware ID\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Name (_TZD, Package (0x0A) // _TZD: Thermal Zone Devices\r
+ {\r
+ \_SB.SYSM.CLUS.CPU0, \r
+ \_SB.SYSM.CLUS.CPU1, \r
+ \_SB.SYSM.CLUS.CPU2, \r
+ \_SB.SYSM.CLUS.CPU3, \r
+ \_SB.SYSM.CLUS.CPU4, \r
+ \_SB.SYSM.CLUS.CPU5, \r
+ \_SB.SYSM.CLUS.CPU6, \r
+ \_SB.SYSM.CLUS.CPU7, \r
+ \_SB.GPU0.MON0, \r
+ \_SB.GPU0\r
+ })\r
+ Name (TPSV, 0x0E92)\r
+ Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature\r
+ {\r
+ Return (\_SB.TZ9.TPSV)\r
+ }\r
+\r
+ Name (TTC1, One)\r
+ Method (_TC1, 0, NotSerialized) // _TC1: Thermal Constant 1\r
+ {\r
+ Return (\_SB.TZ9.TTC1)\r
+ }\r
+\r
+ Name (TTC2, One)\r
+ Method (_TC2, 0, NotSerialized) // _TC2: Thermal Constant 2\r
+ {\r
+ Return (\_SB.TZ9.TTC2)\r
+ }\r
+\r
+ Name (TTSP, 0x32)\r
+ Method (_TSP, 0, NotSerialized) // _TSP: Thermal Sampling Period\r
+ {\r
+ Return (\_SB.TZ9.TTSP)\r
+ }\r
+\r
+ Name (_TZP, Zero) // _TZP: Thermal Zone Polling\r
+ Name (_MTL, 0x19) // _MTL: Minimum Throttle Limit\r
+ Method (_DEP, 0, NotSerialized) // _DEP: Dependencies\r
+ {\r
+ Return (Package (0x02)\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.ADC1\r
+ })\r
+ }\r
+ }\r
+\r
+ Name (HWNH, Zero)\r
+ Name (HWNL, Zero)\r
+ //\r
+ //HWN Haptics\r
+ //\r
+ Device (HWN1)\r
+ {\r
+ Name (_HID, "QCOM02A9") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ If ((\_SB.HWNH == Zero))\r
+ {\r
+ Return (Zero)\r
+ }\r
+ Else\r
+ {\r
+ Return (0x0F)\r
+ }\r
+ }\r
+\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.PMIC\r
+ })\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ GpioInt (Level, ActiveHigh, Exclusive, PullNone, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0190\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.HWN1._CRS.RBUF */\r
+ }\r
+\r
+ Method (HAPI, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x03)\r
+ {\r
+ One, // Total HWN Vibs\r
+ One, // PMIC number PMI8998\r
+ One // Flag indicated wheterh to read configuration from ACPI or registry\r
+ // 0 -> Read from registry\r
+ // 1 -> Read from ACPI HAPC method\r
+ })\r
+ Return (CFG0) /* \_SB_.HWN1.HAPI.CFG0 */\r
+ }\r
+\r
+ // Haptics configuration method\r
+ Method (HAPC, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x16)\r
+ {\r
+ Zero, \r
+ 0x0984, \r
+ Zero, \r
+ One, \r
+ One, \r
+ One, \r
+ One, \r
+ Zero, \r
+ 0x04, \r
+ One, \r
+ 0x03, \r
+ 0x14, \r
+ One, \r
+ 0x03, \r
+ Zero, \r
+ Zero, \r
+ 0x06, \r
+ Zero, \r
+ Zero, \r
+ 0x0535, \r
+ 0x03, \r
+ One\r
+ })\r
+ Return (CFG0) /* \_SB_.HWN1.HAPC.CFG0 */\r
+ }\r
+ }\r
+\r
+ // HWN LED\r
+ Device (HWN0)\r
+ {\r
+ Name (_HID, "QCOM02A8") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ If ((\_SB.HWNL == Zero))\r
+ {\r
+ Return (Zero)\r
+ }\r
+ Else\r
+ {\r
+ Return (0x0F)\r
+ }\r
+ }\r
+\r
+ // ACPI method for LED Configs\r
+ Method (HWNL, 0, NotSerialized)\r
+ {\r
+ Name (CFG0, Package (0x10)\r
+ {\r
+ One, \r
+ 0x03, \r
+ 0x019B, \r
+ 0x14, \r
+ 0x20, \r
+ 0x02, \r
+ 0x40, \r
+ 0x03, \r
+ 0x80, \r
+ 0x04, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ One, \r
+ One\r
+ })\r
+ Return (CFG0) /* \_SB_.HWN0.HWNL.CFG0 */\r
+ }\r
+ }\r
+ \r
+ // \r
+ // Modembridge Driver\r
+ // \r
+ Device (MBRG)\r
+ {\r
+ Name (_HID, "QCOM020D") // _HID: Hardware ID\r
+ }\r
+\r
+ Device (CONT)\r
+ {\r
+ Name (_HID, "CONT1234") // _HID: Hardware ID\r
+ Name (_CID, "PNP0C60" /* Display Sensor Device */) // _CID: Compatible ID\r
+ }\r
+\r
+ Device (POWR)\r
+ {\r
+ Name (_HID, "POWR1234") // _HID: Hardware ID\r
+ Name (_CID, "PNP0C40" /* Standard Button Controller */) // _CID: Compatible ID\r
+ }\r
+\r
+ Device (SVBI)\r
+ {\r
+ Name (_HID, "SAMM0901") // _HID: Hardware ID\r
+ Name (_SUB, "C153144D") // _SUB: Subsystem ID\r
+ }\r
+\r
+#if 0\r
+ Device (TSC1)\r
+ {\r
+ Name (_HID, "SYNP1234") // _HID: Hardware ID\r
+ Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID\r
+ Name (_SUB, "C153144D") // _SUB: Subsystem ID\r
+ Name (_HRV, One) // _HRV: Hardware Revision\r
+ Name (_ADR, Zero) // _ADR: Address\r
+ Name (_DEP, Package (0x03) // _DEP: Dependencies\r
+ {\r
+ \_SB.GIO0, \r
+ \_SB.IC12, \r
+ \_SB.PEP0\r
+ })\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ I2cSerialBusV2 (0x0020, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.IC12",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ GpioInt (Level, ActiveLow, Exclusive, PullNone, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0078\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.TSC1._CRS.RBUF */\r
+ }\r
+\r
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_0, Buffer (0x01) // _T_x: Emitted by ASL Compiler\r
+ {\r
+ 0x00 // .\r
+ })\r
+ CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.TSC1._DSM._T_0 */\r
+ If ((_T_0 == ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_1 = ToInteger (Arg2)\r
+ If ((_T_1 == Zero))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_2 = ToInteger (Arg1)\r
+ If ((_T_2 == One))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x03 // .\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_1 == One))\r
+ {\r
+ Debug = "Method _DSM Function HID"\r
+ Return (0x20)\r
+ }\r
+ Else\r
+ {\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ Else\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+\r
+ Name (PGID, Buffer (0x0A)\r
+ {\r
+ "\\_SB.TSC1"\r
+ })\r
+ Name (DBUF, Buffer (DBFL){})\r
+ CreateByteField (DBUF, Zero, STAT)\r
+ CreateByteField (DBUF, 0x02, DVAL)\r
+ CreateField (DBUF, 0x18, 0xA0, DEID)\r
+ Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State\r
+ {\r
+ Return (0x03)\r
+ }\r
+\r
+ Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State\r
+ {\r
+ Return (0x03)\r
+ }\r
+\r
+ Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State\r
+ {\r
+ Return (0x03)\r
+ }\r
+\r
+ Method (_PS0, 0, NotSerialized) // _PS0: Power State 0\r
+ {\r
+ DEID = Buffer (ESNL){}\r
+ DVAL = Zero\r
+ DEID = PGID /* \_SB_.TSC1.PGID */\r
+ If (\_SB.ABD.AVBL)\r
+ {\r
+ \_SB.PEP0.FLD0 = DBUF /* \_SB_.TSC1.DBUF */\r
+ }\r
+ }\r
+\r
+ Method (_PS3, 0, NotSerialized) // _PS3: Power State 3\r
+ {\r
+ DEID = Buffer (ESNL){}\r
+ DVAL = 0x03\r
+ DEID = PGID /* \_SB_.TSC1.PGID */\r
+ If (\_SB.ABD.AVBL)\r
+ {\r
+ \_SB.PEP0.FLD0 = DBUF /* \_SB_.TSC1.DBUF */\r
+ }\r
+ }\r
+ }\r
+\r
+ Device (PEN1)\r
+ {\r
+ Name (_HID, "WCOM0027") // _HID: Hardware ID\r
+ Name (_CID, "PNP0C50" /* HID Protocol Device (I2C bus) */) // _CID: Compatible ID\r
+ Name (_SUB, "C153144D") // _SUB: Subsystem ID\r
+ Name (_HRV, One) // _HRV: Hardware Revision\r
+ Name (_ADR, Zero) // _ADR: Address\r
+ Name (_DEP, Package (0x03) // _DEP: Dependencies\r
+ {\r
+ \_SB.GIO0, \r
+ \_SB.IC16, \r
+ \_SB.PEP0\r
+ })\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ I2cSerialBusV2 (0x0009, ControllerInitiated, 0x00061A80,\r
+ AddressingMode7Bit, "\\_SB.IC16",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ GpioInt (Level, ActiveLow, Exclusive, PullNone, 0x0000,\r
+ "\\_SB.GIO0", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0077\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.PEN1._CRS.RBUF */\r
+ }\r
+\r
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_0, Buffer (0x01) // _T_x: Emitted by ASL Compiler\r
+ {\r
+ 0x00 // .\r
+ })\r
+ CopyObject (ToBuffer (Arg0), _T_0) /* \_SB_.PEN1._DSM._T_0 */\r
+ If ((_T_0 == ToUUID ("3cdff6f7-4267-4555-ad05-b30a3d8938de") /* HID I2C Device */))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_1, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_1 = ToInteger (Arg2)\r
+ If ((_T_1 == Zero))\r
+ {\r
+ While (One)\r
+ {\r
+ Name (_T_2, 0x00) // _T_x: Emitted by ASL Compiler\r
+ _T_2 = ToInteger (Arg1)\r
+ If ((_T_2 == One))\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x03 // .\r
+ })\r
+ }\r
+ Else\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ ElseIf ((_T_1 == One))\r
+ {\r
+ Debug = "Method _DSM Function HID"\r
+ Return (One)\r
+ }\r
+ Else\r
+ {\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+ Else\r
+ {\r
+ Return (Buffer (One)\r
+ {\r
+ 0x00 // .\r
+ })\r
+ }\r
+\r
+ Break\r
+ }\r
+ }\r
+\r
+ Name (PGID, Buffer (0x0A)\r
+ {\r
+ "\\_SB.PEN1"\r
+ })\r
+ Name (DBUF, Buffer (DBFL){})\r
+ CreateByteField (DBUF, Zero, STAT)\r
+ CreateByteField (DBUF, 0x02, DVAL)\r
+ CreateField (DBUF, 0x18, 0xA0, DEID)\r
+ Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State\r
+ {\r
+ Return (0x03)\r
+ }\r
+\r
+ Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State\r
+ {\r
+ Return (0x03)\r
+ }\r
+\r
+ Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State\r
+ {\r
+ Return (0x03)\r
+ }\r
+\r
+ Method (_PS0, 0, NotSerialized) // _PS0: Power State 0\r
+ {\r
+ DEID = Buffer (ESNL){}\r
+ DVAL = Zero\r
+ DEID = PGID /* \_SB_.PEN1.PGID */\r
+ If (\_SB.ABD.AVBL)\r
+ {\r
+ \_SB.PEP0.FLD0 = DBUF /* \_SB_.PEN1.DBUF */\r
+ }\r
+ }\r
+\r
+ Method (_PS3, 0, NotSerialized) // _PS3: Power State 3\r
+ {\r
+ DEID = Buffer (ESNL){}\r
+ DVAL = 0x03\r
+ DEID = PGID /* \_SB_.PEN1.PGID */\r
+ If (\_SB.ABD.AVBL)\r
+ {\r
+ \_SB.PEP0.FLD0 = DBUF /* \_SB_.PEN1.DBUF */\r
+ }\r
+ }\r
+ }\r
+#endif\r
+\r
+ Device (BTNS)\r
+ {\r
+ Name (_HID, "ACPI0011" /* Generic Buttons Device */) // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (RBUF, ResourceTemplate ()\r
+ {\r
+ GpioInt (Edge, ActiveBoth, Exclusive, PullDown, 0x0010,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0000\r
+ }\r
+ GpioInt (Edge, ActiveBoth, ExclusiveAndWake, PullNone, 0x000E,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0085\r
+ }\r
+ GpioInt (Edge, ActiveBoth, ExclusiveAndWake, PullDown, 0x0010,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ )\r
+ { // Pin list\r
+ 0x0001\r
+ }\r
+ })\r
+ Return (RBUF) /* \_SB_.BTNS._CRS.RBUF */\r
+ }\r
+\r
+ Name (_DSD, Package (0x02) // _DSD: Device-Specific Data\r
+ {\r
+ ToUUID ("fa6bd625-9ce8-470d-a2c7-b3ca36c4282e"), \r
+ Package (0x06)\r
+ {\r
+ // Portable Device Control Application Collection\r
+ Package (0x05)\r
+ {\r
+ Zero, \r
+ One, \r
+ Zero, \r
+ One, \r
+ 0x0D\r
+ }, \r
+\r
+ // Sleep\r
+ Package (0x05)\r
+ {\r
+ One, \r
+ Zero, \r
+ One, \r
+ One, \r
+ 0x81\r
+ }, \r
+\r
+ // Volume Increment \r
+ Package (0x05)\r
+ {\r
+ One, \r
+ One, \r
+ One, \r
+ 0x0C, \r
+ 0xE9\r
+ }, \r
+\r
+ // Volume Decrement\r
+ Package (0x05)\r
+ {\r
+ One, \r
+ 0x02, \r
+ One, \r
+ 0x0C, \r
+ 0xEA\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ One, \r
+ 0x03, \r
+ One, \r
+ 0x90, \r
+ 0x20\r
+ }, \r
+\r
+ Package (0x05)\r
+ {\r
+ One, \r
+ 0x04, \r
+ One, \r
+ 0x90, \r
+ 0x21\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ //\r
+ //Qualcomm Diagnostic Consumer Interface\r
+ //\r
+ Device (QDCI)\r
+ {\r
+ Name (_DEP, Package (One) // _DEP: Dependencies\r
+ {\r
+ \_SB.GLNK\r
+ })\r
+ Name (_HID, "QCOM0224") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ }\r
+\r
+ Device (BTH0)\r
+ {\r
+ Name (_HID, "NOPE02B5") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_DEP, Package (0x03) // _DEP: Dependencies\r
+ {\r
+ \_SB.PEP0, \r
+ \_SB.PMIC, \r
+ \_SB.UAR7\r
+ })\r
+ Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake\r
+ {\r
+ Zero, \r
+ Zero\r
+ })\r
+ Name (_S4W, 0x02) // _S4W: S4 Device Wake State\r
+ Name (_S0W, 0x02) // _S0W: S0 Device Wake State\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (PBUF, ResourceTemplate ()\r
+ {\r
+ UartSerialBusV2 (0x0001C200, DataBitsEight, StopBitsOne,\r
+ 0xC0, LittleEndian, ParityTypeNone, FlowControlHardware,\r
+ 0x0020, 0x0020, "\\_SB.UAR7",\r
+ 0x00, ResourceConsumer, , Exclusive,\r
+ )\r
+ })\r
+ Return (PBUF) /* \_SB_.BTH0._CRS.PBUF */\r
+ }\r
+\r
+ Method (_STA, 0, NotSerialized) // _STA: Status\r
+ {\r
+ Return (0x0F)\r
+ }\r
+ }\r
+//here\r
+\r
+ Device (ADC1)\r
+ {\r
+ Name (_DEP, Package (0x02) // _DEP: Dependencies\r
+ {\r
+ \_SB.SPMI, \r
+ \_SB.PMIC\r
+ })\r
+ Name (_HID, "QCOM0221") // _HID: Hardware ID\r
+ Alias (\_SB.PSUB, _SUB)\r
+ Name (_UID, Zero) // _UID: Unique ID\r
+ Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings\r
+ {\r
+ Name (INTB, ResourceTemplate ()\r
+ {\r
+ GpioInt (Edge, ActiveHigh, ExclusiveAndWake, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ RawDataBuffer (0x01) // Vendor Data\r
+ {\r
+ 0x02\r
+ })\r
+ { // Pin list\r
+ 0x0020\r
+ }\r
+ GpioInt (Edge, ActiveHigh, ExclusiveAndWake, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ RawDataBuffer (0x01) // Vendor Data\r
+ {\r
+ 0x02\r
+ })\r
+ { // Pin list\r
+ 0x0028\r
+ }\r
+ GpioInt (Edge, ActiveHigh, ExclusiveAndWake, PullUp, 0x0000,\r
+ "\\_SB.PM01", 0x00, ResourceConsumer, ,\r
+ RawDataBuffer (0x01) // Vendor Data\r
+ {\r
+ 0x02\r
+ })\r
+ { // Pin list\r
+ 0x0168\r
+ }\r
+ })\r
+ Name (NAM, Buffer (0x0A)\r
+ {\r
+ "\\_SB.SPMI"\r
+ })\r
+ Name (VUSR, Buffer (0x0C)\r
+ {\r
+ /* 0000 */ 0x8E, 0x13, 0x00, 0x01, 0x00, 0xC1, 0x02, 0x00, // ........\r
+ /* 0008 */ 0x31, 0x01, 0x00, 0x00 // 1...\r
+ })\r
+ Name (VBTM, Buffer (0x0C)\r
+ {\r
+ /* 0000 */ 0x8E, 0x13, 0x00, 0x01, 0x00, 0xC1, 0x02, 0x00, // ........\r
+ /* 0008 */ 0x34, 0x01, 0x00, 0x00 // 4...\r
+ })\r
+ Name (FGRR, Buffer (0x0C)\r
+ {\r
+ /* 0000 */ 0x8E, 0x13, 0x00, 0x01, 0x00, 0xC1, 0x02, 0x02, // ........\r
+ /* 0008 */ 0x45, 0x01, 0x00, 0x00 // E...\r
+ })\r
+ Concatenate (VUSR, NAM, Local1)\r
+ Concatenate (VBTM, NAM, Local2)\r
+ Concatenate (FGRR, NAM, Local3)\r
+ Concatenate (Local1, Local2, Local4)\r
+ Concatenate (Local3, INTB, Local5)\r
+ Concatenate (Local4, Local5, Local0)\r
+ Return (Local0)\r
+ }\r
+\r
+ Method (ADDV, 0, NotSerialized)\r
+ {\r
+ Return (Package (0x03)\r
+ {\r
+ One, \r
+ One, \r
+ One\r
+ })\r
+ }\r
+\r
+ Method (GENP, 0, NotSerialized)\r
+ {\r
+ Return (Package (0x0A)\r
+ {\r
+ Zero, \r
+ 0x4000, \r
+ 0x001C9C38, \r
+ 0x0007A120, \r
+ 0x11, \r
+ Zero, \r
+ Zero, \r
+ 0x0300, \r
+ 0x0100, \r
+ 0x08\r
+ })\r
+ }\r
+\r
+ Method (PTCF, 1, NotSerialized)\r
+ {\r
+ Local0 = (Arg0 >> One)\r
+ Local0 -= 0x00042B08\r
+ Return (Local0)\r
+ }\r
+\r
+ Method (PTCI, 1, NotSerialized)\r
+ {\r
+ Local0 = (Arg0 + 0x00042B08)\r
+ Local0 <<= One\r
+ Return (Local0)\r
+ }\r
+\r
+ Method (VGIO, 0, NotSerialized)\r
+ {\r
+ Return (Package (0x08)\r
+ {\r
+ Package (0x02)\r
+ {\r
+ 0x08, \r
+ Buffer (0x04)\r
+ {\r
+ 0x12, 0x32, 0x52, 0x72 // .2Rr\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x09, \r
+ Buffer (0x04)\r
+ {\r
+ 0x13, 0x33, 0x53, 0x73 // .3Ss\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0A, \r
+ Buffer (0x04)\r
+ {\r
+ 0x14, 0x34, 0x54, 0x74 // .4Tt\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0B, \r
+ Buffer (0x04)\r
+ {\r
+ 0x15, 0x35, 0x55, 0x75 // .5Uu\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0C, \r
+ Buffer (0x04)\r
+ {\r
+ 0x16, 0x36, 0x56, 0x76 // .6Vv\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x15, \r
+ Buffer (0x05)\r
+ {\r
+ 0x17, 0x37, 0x57, 0x77, 0x97 // .7Ww.\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x16, \r
+ Buffer (0x05)\r
+ {\r
+ 0x18, 0x38, 0x58, 0x78, 0x98 // .8Xx.\r
+ }\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x17, \r
+ Buffer (0x05)\r
+ {\r
+ 0x19, 0x39, 0x59, 0x79, 0x99 // .9Yy.\r
+ }\r
+ }\r
+ })\r
+ }\r
+\r
+ Method (VTGN, 0, NotSerialized)\r
+ {\r
+ Return (Package (0x09)\r
+ {\r
+ 0x02, \r
+ 0x02, \r
+ 0x4000, \r
+ 0x001C9C38, \r
+ Zero, \r
+ Zero, \r
+ 0x0300, \r
+ 0x0100, \r
+ 0x08\r
+ })\r
+ }\r
+\r
+ Method (GENF, 0, NotSerialized)\r
+ {\r
+ Return (Package (0x0D)\r
+ {\r
+ 0xFFFFFFE2, \r
+ 0x61, \r
+ 0xFFFFFFCE, \r
+ 0xA0, \r
+ 0x03FF, \r
+ 0x002625A0, \r
+ 0x01F4, \r
+ 0x04, \r
+ 0x0334, \r
+ 0x004C4B40, \r
+ 0x02, \r
+ One, \r
+ 0x0D\r
+ })\r
+ }\r
+\r
+ Method (FCHN, 0, NotSerialized)\r
+ {\r
+ Return (Package (0x0C)\r
+ {\r
+ Package (0x08)\r
+ {\r
+ "BATT_ID_OHMS", \r
+ One, \r
+ One, \r
+ Zero, \r
+ One, \r
+ One, \r
+ One, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x08)\r
+ {\r
+ "BATT_ID_OHMS_FRESH", \r
+ 0x02, \r
+ One, \r
+ Zero, \r
+ One, \r
+ One, \r
+ One, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x08)\r
+ {\r
+ "BATT_THERM", \r
+ 0x06, \r
+ One, \r
+ Zero, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x08)\r
+ {\r
+ "AUX_THERM", \r
+ 0x07, \r
+ One, \r
+ Zero, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x08)\r
+ {\r
+ "SKIN_THERM", \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ One, \r
+ One, \r
+ 0x03, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x08)\r
+ {\r
+ "PMIC_TEMP2", \r
+ 0x0C, \r
+ One, \r
+ Zero, \r
+ 0x03, \r
+ 0x02, \r
+ 0x02, \r
+ FGDT\r
+ }, \r
+\r
+ Package (0x08)\r
+ {\r
+ "CHG_TEMP", \r
+ 0x0D, \r
+ One, \r
+ Zero, \r
+ 0x03, \r
+ 0x02, \r
+ 0x02, \r
+ FGCT\r
+ }, \r
+\r
+ Package (0x08)\r
+ {\r
+ "USB_IN", \r
+ 0x08, \r
+ One, \r
+ Zero, \r
+ One, \r
+ 0x08, \r
+ Zero, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x08)\r
+ {\r
+ "USB_IN_I", \r
+ 0x09, \r
+ One, \r
+ Zero, \r
+ One, \r
+ One, \r
+ 0x04, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x08)\r
+ {\r
+ "DC_IN", \r
+ 0x0A, \r
+ One, \r
+ Zero, \r
+ One, \r
+ 0x08, \r
+ Zero, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x08)\r
+ {\r
+ "DC_IN_I", \r
+ 0x0B, \r
+ One, \r
+ Zero, \r
+ One, \r
+ One, \r
+ 0x04, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x08)\r
+ {\r
+ "FG_GPIO", \r
+ 0x0E, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ 0x02, \r
+ Zero, \r
+ Zero\r
+ }\r
+ })\r
+ }\r
+\r
+ Method (FGDT, 0, NotSerialized)\r
+ {\r
+ Return (Package (0x02)\r
+ {\r
+ Package (0x02)\r
+ {\r
+ 0x01C2, \r
+ 0xFFFF3CB0\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0366, \r
+ 0x00027100\r
+ }\r
+ })\r
+ }\r
+\r
+ Method (FGCT, 0, NotSerialized)\r
+ {\r
+ Return (Package (0x02)\r
+ {\r
+ Package (0x02)\r
+ {\r
+ 0x0633, \r
+ 0xFFFF3CB0\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0318, \r
+ 0x00027100\r
+ }\r
+ })\r
+ }\r
+ }\r
+\r
+ Scope (\_SB.ADC1)\r
+ {\r
+ Method (CHAN, 0, NotSerialized)\r
+ {\r
+ Name (CBUF, Package (0x08)\r
+ {\r
+ Package (0x0D)\r
+ {\r
+ "VPH_PWR", \r
+ 0x83, \r
+ Zero, \r
+ Zero, \r
+ 0x02, \r
+ 0x02, \r
+ One, \r
+ 0x03, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x0D)\r
+ {\r
+ "VCOIN", \r
+ 0x85, \r
+ Zero, \r
+ Zero, \r
+ 0x02, \r
+ 0x02, \r
+ One, \r
+ 0x03, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x0D)\r
+ {\r
+ "PMIC_THERM", \r
+ 0x06, \r
+ Zero, \r
+ Zero, \r
+ 0x02, \r
+ 0x02, \r
+ One, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ PTCF,\r
+ 0x02\r
+ }, \r
+\r
+ Package (0x0D)\r
+ {\r
+ "XO_THERM", \r
+ 0x4C, \r
+ 0x08, \r
+ Zero, \r
+ 0x02, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x02, \r
+ 0x000186A0, \r
+ XTTB, \r
+ Zero, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x0D)\r
+ {\r
+ "XO_THERM_GPS", \r
+ 0x4C, \r
+ 0x08, \r
+ 0x02, \r
+ 0x02, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x02, \r
+ 0x000186A0, \r
+ XTTB, \r
+ Zero, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x0D)\r
+ {\r
+ "SYS_THERM1", \r
+ 0x4D, \r
+ One, \r
+ Zero, \r
+ 0x02, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x02, \r
+ 0x000186A0, \r
+ SYTB, \r
+ Zero, \r
+ Zero\r
+ }\r
+#if 0 \r
+ , \r
+\r
+ Package (0x0D)\r
+ {\r
+ "SYS_THERM2", \r
+ 0x4E, \r
+ One, \r
+ Zero, \r
+ 0x02, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x02, \r
+ 0x000186A0, \r
+ SYTB, \r
+ Zero, \r
+ Zero\r
+ }\r
+#endif\r
+ , \r
+\r
+ Package (0x0D)\r
+ {\r
+ "PA_THERM", \r
+ 0x4F, \r
+ One, \r
+ Zero, \r
+ 0x02, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x02, \r
+ 0x000186A0, \r
+ SYTB, \r
+ Zero, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x0D)\r
+ {\r
+ "PA_THERM1", \r
+ 0x50, \r
+ One, \r
+ Zero, \r
+ 0x02, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x02, \r
+ 0x000186A0, \r
+ SYTB, \r
+ Zero, \r
+ Zero\r
+ }\r
+#if 0\r
+ , \r
+\r
+ Package (0x0D)\r
+ {\r
+ "SYS_THERM3", \r
+ 0x51, \r
+ One, \r
+ Zero, \r
+ 0x02, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x02, \r
+ 0x000186A0, \r
+ SYTB, \r
+ Zero, \r
+ Zero\r
+ }\r
+ , \r
+\r
+ Package (0x0D)\r
+ {\r
+ "VMUX_SOC", \r
+ 0x17, \r
+ Zero, \r
+ Zero, \r
+ 0x02, \r
+ 0x02, \r
+ One, \r
+ 0x03, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero\r
+ }\r
+#endif\r
+ })\r
+#if 0\r
+ DerefOf (CBUF [0x0A]) [One] = \_SB.VMXC\r
+ DerefOf (CBUF [0x0A]) [0x06] = \_SB.VMXN\r
+ DerefOf (CBUF [0x0A]) [0x07] = \_SB.VMXD\r
+#endif\r
+ Return (CBUF) /* \_SB_.ADC1.CHAN.CBUF */\r
+ }\r
+\r
+ Method (SYTB, 0, NotSerialized)\r
+ {\r
+ Return (Package (0x22)\r
+ {\r
+ Package (0x02)\r
+ {\r
+ 0x0040DD78, \r
+ 0xFFFFFFD8\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x002DD9E4, \r
+ 0xFFFFFFDD\r
+ }, \r
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+ Package (0x02)\r
+ {\r
+ 0x0020CA24, \r
+ 0xFFFFFFE2\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0017B588, \r
+ 0xFFFFFFE7\r
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+ Package (0x02)\r
+ {\r
+ 0x001152C4, \r
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+ Package (0x02)\r
+ {\r
+ 0x000CC8A8, \r
+ 0xFFFFFFF1\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x000985E4, \r
+ 0xFFFFFFF6\r
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+ Package (0x02)\r
+ {\r
+ 0x0007286C, \r
+ 0xFFFFFFFB\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x00056D10, \r
+ Zero\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x000425B8, \r
+ 0x05\r
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+ Package (0x02)\r
+ {\r
+ 0x000331F8, \r
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+ Package (0x02)\r
+ {\r
+ 0x00027AC4, \r
+ 0x0F\r
+ }, \r
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+ Package (0x02)\r
+ {\r
+ 0x0001F018, \r
+ 0x14\r
+ }, \r
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+ Package (0x02)\r
+ {\r
+ 0x000186A0, \r
+ 0x19\r
+ }, \r
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+ Package (0x02)\r
+ {\r
+ 0x00013560, \r
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+ Package (0x02)\r
+ {\r
+ 0xF6E0, \r
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+ Package (0x02)\r
+ {\r
+ 0xC60C, \r
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+ Package (0x02)\r
+ {\r
+ 0x9FC4, \r
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+ }, \r
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+ Package (0x02)\r
+ {\r
+ 0x81B0, \r
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+ Package (0x02)\r
+ {\r
+ 0x69DC, \r
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+ }, \r
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+ Package (0x02)\r
+ {\r
+ 0x56B8, \r
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+ }, \r
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+ Package (0x02)\r
+ {\r
+ 0x477C, \r
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+ Package (0x02)\r
+ {\r
+ 0x3B60, \r
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+ Package (0x02)\r
+ {\r
+ 0x3138, \r
+ 0x4B\r
+ }, \r
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+ Package (0x02)\r
+ {\r
+ 0x2968, \r
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+ }, \r
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+ Package (0x02)\r
+ {\r
+ 0x22BA, \r
+ 0x55\r
+ }, \r
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+ Package (0x02)\r
+ {\r
+ 0x1D4C, \r
+ 0x5A\r
+ }, \r
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+ Package (0x02)\r
+ {\r
+ 0x18D8, \r
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+ }, \r
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+ Package (0x02)\r
+ {\r
+ 0x1522, \r
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+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x120C, \r
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+ Package (0x02)\r
+ {\r
+ 0x0F82, \r
+ 0x6E\r
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+ Package (0x02)\r
+ {\r
+ 0x0D5C, \r
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+ Package (0x02)\r
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+\r
+ Package (0x02)\r
+ {\r
+ 0x0A00, \r
+ 0x7D\r
+ }\r
+ })\r
+ }\r
+\r
+ Method (XTTB, 0, NotSerialized)\r
+ {\r
+ Return (Package (0xA8)\r
+ {\r
+ Package (0x02)\r
+ {\r
+ 0x0040DC21, \r
+ 0xFFFF6000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x003C74E5, \r
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+ Package (0x02)\r
+ {\r
+ 0x0038611B, \r
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+ Package (0x02)\r
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+ Package (0x02)\r
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+ Package (0x02)\r
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+ Package (0x02)\r
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+ Package (0x02)\r
+ {\r
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+ Package (0x02)\r
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+ Package (0x02)\r
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+ Package (0x02)\r
+ {\r
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+ Package (0x02)\r
+ {\r
+ 0x001EB4FE, \r
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+ Package (0x02)\r
+ {\r
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+ Package (0x02)\r
+ {\r
+ 0x001AF5BE, \r
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+ Package (0x02)\r
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+ Package (0x02)\r
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+ 0x0014E329, \r
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+ Package (0x02)\r
+ {\r
+ 0x00139DD6, \r
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+ Package (0x02)\r
+ {\r
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+ Package (0x02)\r
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+ Package (0x02)\r
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+ Package (0x02)\r
+ {\r
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+ Package (0x02)\r
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+ Package (0x02)\r
+ {\r
+ 0x000D92CE, \r
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+ Package (0x02)\r
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+ Package (0x02)\r
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+ 0x000C0AED, \r
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+ Package (0x02)\r
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+ Package (0x02)\r
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+ Package (0x02)\r
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+ Package (0x02)\r
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+ 0x0005BB2D, \r
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+ Package (0x02)\r
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+ Package (0x02)\r
+ {\r
+ 0x00052387, \r
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+ Package (0x02)\r
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+ Package (0x02)\r
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+ Package (0x02)\r
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+ 0x000425BE, \r
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+ Package (0x02)\r
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+ Package (0x02)\r
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+ Package (0x02)\r
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+ Package (0x02)\r
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+ Package (0x02)\r
+ {\r
+ 0x000331EE, \r
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+ Package (0x02)\r
+ {\r
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+ Package (0x02)\r
+ {\r
+ 0x0002E270, \r
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+ Package (0x02)\r
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+ 0x0002BDF2, \r
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+ Package (0x02)\r
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+ Package (0x02)\r
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+ {\r
+ 0x3FE3, \r
+ 0x00011000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x3D8B, \r
+ 0x00011400\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x3B4C, \r
+ 0x00011800\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x3924, \r
+ 0x00011C00\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x3713, \r
+ 0x00012000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x3518, \r
+ 0x00012400\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x3332, \r
+ 0x00012800\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x3160, \r
+ 0x00012C00\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x2FA0, \r
+ 0x00013000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x2DF2, \r
+ 0x00013400\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x2C56, \r
+ 0x00013800\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x2ACA, \r
+ 0x00013C00\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x294E, \r
+ 0x00014000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x27E1, \r
+ 0x00014400\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x2682, \r
+ 0x00014800\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x2531, \r
+ 0x00014C00\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x23ED, \r
+ 0x00015000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x22B6, \r
+ 0x00015400\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x218B, \r
+ 0x00015800\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x206B, \r
+ 0x00015C00\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x1F57, \r
+ 0x00016000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x1E4D, \r
+ 0x00016400\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x1D4D, \r
+ 0x00016800\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x1C56, \r
+ 0x00016C00\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x1B69, \r
+ 0x00017000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x1A85, \r
+ 0x00017400\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x19AA, \r
+ 0x00017800\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x18D6, \r
+ 0x00017C00\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x180B, \r
+ 0x00018000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x1747, \r
+ 0x00018400\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x168A, \r
+ 0x00018800\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x15D4, \r
+ 0x00018C00\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x1524, \r
+ 0x00019000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x147B, \r
+ 0x00019400\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x13D8, \r
+ 0x00019800\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x133B, \r
+ 0x00019C00\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x12A3, \r
+ 0x0001A000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x1211, \r
+ 0x0001A400\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x1184, \r
+ 0x0001A800\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x10FC, \r
+ 0x0001AC00\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x1079, \r
+ 0x0001B000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0FFA, \r
+ 0x0001B400\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0F80, \r
+ 0x0001B800\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0F0A, \r
+ 0x0001BC00\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0E98, \r
+ 0x0001C000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0E2A, \r
+ 0x0001C400\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0DBF, \r
+ 0x0001C800\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0D59, \r
+ 0x0001CC00\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0CF5, \r
+ 0x0001D000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0C95, \r
+ 0x0001D400\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0C39, \r
+ 0x0001D800\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0BDF, \r
+ 0x0001DC00\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0B88, \r
+ 0x0001E000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0B34, \r
+ 0x0001E400\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0AE3, \r
+ 0x0001E800\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0A95, \r
+ 0x0001EC00\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0A49, \r
+ 0x0001F000\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0A00, \r
+ 0x0001F400\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x09B9, \r
+ 0x0001F800\r
+ }, \r
+\r
+ Package (0x02)\r
+ {\r
+ 0x0974, \r
+ 0x0001FC00\r
+ }\r
+ })\r
+ }\r
+\r
+ Method (VTCH, 0, NotSerialized)\r
+ {\r
+ Return (Package (0x05)\r
+ {\r
+ Package (0x10)\r
+ {\r
+ "VPH_PWR", \r
+ 0x83, \r
+ Zero, \r
+ One, \r
+ Zero, \r
+ 0x02, \r
+ One, \r
+ 0x03, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0x15F9\r
+ }, \r
+\r
+ Package (0x10)\r
+ {\r
+ "PMIC_THERM", \r
+ 0x06, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0x02, \r
+ One, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ PTCF,\r
+ PTCI,\r
+ 0x02, \r
+ 0xFFFF3CB0, \r
+ 0x000249F0\r
+ }, \r
+\r
+ Package (0x10)\r
+ {\r
+ "SYS_THERM1", \r
+ 0x4D, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x02, \r
+ 0x000186A0, \r
+ SYTB, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0xFFFFFFD8, \r
+ 0x7D\r
+ }, \r
+\r
+#if 0\r
+ Package (0x10)\r
+ {\r
+ "SYS_THERM2", \r
+ 0x4E, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x02, \r
+ 0x000186A0, \r
+ SYTB, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0xFFFFFFD8, \r
+ 0x7D\r
+ }, \r
+#endif\r
+\r
+ Package (0x10)\r
+ {\r
+ "PA_THERM", \r
+ 0x4F, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x02, \r
+ 0x000186A0, \r
+ SYTB, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0xFFFFFFD8, \r
+ 0x7D\r
+ }, \r
+\r
+ Package (0x10)\r
+ {\r
+ "PA_THERM1", \r
+ 0x50, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x02, \r
+ 0x000186A0, \r
+ SYTB, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0xFFFFFFD8, \r
+ 0x7D\r
+ }\r
+#if 0\r
+ , \r
+\r
+ Package (0x10)\r
+ {\r
+ "SYS_THERM3", \r
+ 0x51, \r
+ One, \r
+ Zero, \r
+ Zero, \r
+ One, \r
+ One, \r
+ One, \r
+ 0x02, \r
+ 0x000186A0, \r
+ SYTB, \r
+ Zero, \r
+ Zero, \r
+ Zero, \r
+ 0xFFFFFFD8, \r
+ 0x7D\r
+ }\r
+#endif\r
+ })\r
+ }\r
+\r
+ Method (VTMT, 0, NotSerialized)\r
+ {\r
+ Return (Package (0x03)\r
+ {\r
+ 0x0B, \r
+ One, \r
+ 0x05\r
+ })\r
+ }\r
+ }\r
+#if 0\r
+ Device(ADC1)\r
+ {\r
+ Name(_DEP, Package(0x2)\r
+ {\r
+ SPMI,\r
+ PMIC\r
+ })\r
+ Name(_HID, "QCOM0221")\r
+ Alias(PSUB, _SUB)\r
+ Name(_UID, Zero)\r
+ Method(_CRS, 0x0, NotSerialized)\r
+ {\r
+ Name(INTB, Buffer(0x4a)\r
+ {\r
+ 0x8c, 0x21, 0x00, 0x01, 0x00, 0x01, 0x00, 0x11, 0x00, 0x01, 0x00, 0x00,\r
+ 0x00, 0x00, 0x17, 0x00, 0x00, 0x19, 0x00, 0x23, 0x00, 0x01, 0x00, 0x20,\r
+ 0x00, 0x5c, 0x5f, 0x53, 0x42, 0x2e, 0x50, 0x4d, 0x30, 0x31, 0x00, 0x02,\r
+ 0x8c, 0x21, 0x00, 0x01, 0x00, 0x01, 0x00, 0x11, 0x00, 0x01, 0x00, 0x00,\r
+ 0x00, 0x00, 0x17, 0x00, 0x00, 0x19, 0x00, 0x23, 0x00, 0x01, 0x00, 0x28,\r
+ 0x00, 0x5c, 0x5f, 0x53, 0x42, 0x2e, 0x50, 0x4d, 0x30, 0x31, 0x00, 0x02,\r
+ 0x79, 0x00\r
+ })\r
+ Name(NAM_, Buffer(0xa)\r
+ {\r
+ 0x5c, 0x5f, 0x53, 0x42, 0x2e, 0x53, 0x50, 0x4d, 0x49, 0x00\r
+ })\r
+ Name(VUSR, Buffer(0xc)\r
+ {\r
+ 0x8e, 0x13, 0x00, 0x01, 0x00, 0xc1, 0x02, 0x00, 0x31, 0x01, 0x00, 0x00\r
+ })\r
+ Name(VBTM, Buffer(0xc)\r
+ {\r
+ 0x8e, 0x13, 0x00, 0x01, 0x00, 0xc1, 0x02, 0x00, 0x34, 0x01, 0x00, 0x00\r
+ })\r
+ Concatenate(VUSR, NAM_, Local1)\r
+ Concatenate(VBTM, NAM_, Local2)\r
+ Concatenate(Local1, Local2, Local3)\r
+ Concatenate(Local3, INTB, Local0)\r
+ Return(Local0)\r
+ }\r
+ Method(ADDV, 0x0, NotSerialized)\r
+ {\r
+ Return(Package(0x3)\r
+ {\r
+ One,\r
+ One,\r
+ Zero\r
+ })\r
+ }\r
+ Method(GENP, 0x0, NotSerialized)\r
+ {\r
+ Return(Package(0xa)\r
+ {\r
+ Zero,\r
+ 0x4000,\r
+ 0x1c9c38,\r
+ 0x7a120,\r
+ 0x11,\r
+ Zero,\r
+ Zero,\r
+ 0x300,\r
+ 0x100,\r
+ 0x8\r
+ })\r
+ }\r
+ Method(PTCF, 0x1, NotSerialized)\r
+ {\r
+ ShiftRight(Arg0, One, Local0)\r
+ Subtract(Local0, 0x42b08, Local0)\r
+ Return(Local0)\r
+ }\r
+ Method(PTCI, 0x1, NotSerialized)\r
+ {\r
+ Add(Arg0, 0x42b08, Local0)\r
+ ShiftLeft(Local0, One, Local0)\r
+ Return(Local0)\r
+ }\r
+ Method(VGIO, 0x0, NotSerialized)\r
+ {\r
+ Return(Package(0x8)\r
+ {\r
+ Package(0x2)\r
+ {\r
+ 0x8,\r
+ Buffer(0x4)\r
+ {\r
+ 0x12, 0x32, 0x52, 0x72\r
+ }\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0x9,\r
+ Buffer(0x4)\r
+ {\r
+ 0x13, 0x33, 0x53, 0x73\r
+ }\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0xa,\r
+ Buffer(0x4)\r
+ {\r
+ 0x14, 0x34, 0x54, 0x74\r
+ }\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0xb,\r
+ Buffer(0x4)\r
+ {\r
+ 0x15, 0x35, 0x55, 0x75\r
+ }\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0xc,\r
+ Buffer(0x4)\r
+ {\r
+ 0x16, 0x36, 0x56, 0x76\r
+ }\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0x15,\r
+ Buffer(0x5)\r
+ {\r
+ 0x17, 0x37, 0x57, 0x77, 0x97\r
+ }\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0x16,\r
+ Buffer(0x5)\r
+ {\r
+ 0x18, 0x38, 0x58, 0x78, 0x98\r
+ }\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0x17,\r
+ Buffer(0x5)\r
+ {\r
+ 0x19, 0x39, 0x59, 0x79, 0x99\r
+ }\r
+ }\r
+ })\r
+ }\r
+ Method(VTGN, 0x0, NotSerialized)\r
+ {\r
+ Return(Package(0x9)\r
+ {\r
+ 0x2,\r
+ 0x2,\r
+ 0x4000,\r
+ 0x1c9c38,\r
+ Zero,\r
+ Zero,\r
+ 0x300,\r
+ 0x100,\r
+ 0x8\r
+ })\r
+ }\r
+ Method(GENF, 0x0, NotSerialized)\r
+ {\r
+ Return(Package(0xd)\r
+ {\r
+ 0xffffffe2,\r
+ 0x61,\r
+ 0xffffffce,\r
+ 0xa0,\r
+ 0x3ff,\r
+ 0x2625a0,\r
+ 0x1f4,\r
+ 0x4,\r
+ 0x334,\r
+ 0x4c4b40,\r
+ 0x2,\r
+ One,\r
+ 0xd\r
+ })\r
+ }\r
+ Method(FCHN, 0x0, NotSerialized)\r
+ {\r
+ Return(Package(0xc)\r
+ {\r
+ Package(0x8)\r
+ {\r
+ "BATT_ID_OHMS",\r
+ One,\r
+ One,\r
+ Zero,\r
+ One,\r
+ One,\r
+ One,\r
+ Zero\r
+ },\r
+ Package(0x8)\r
+ {\r
+ "BATT_ID_OHMS_FRESH",\r
+ 0x2,\r
+ One,\r
+ Zero,\r
+ One,\r
+ One,\r
+ One,\r
+ Zero\r
+ },\r
+ Package(0x8)\r
+ {\r
+ "BATT_THERM",\r
+ 0x6,\r
+ One,\r
+ Zero,\r
+ One,\r
+ One,\r
+ 0x3,\r
+ Zero\r
+ },\r
+ Package(0x8)\r
+ {\r
+ "AUX_THERM",\r
+ 0x7,\r
+ One,\r
+ Zero,\r
+ One,\r
+ One,\r
+ 0x3,\r
+ Zero\r
+ },\r
+ Package(0x8)\r
+ {\r
+ "SKIN_THERM",\r
+ Zero,\r
+ One,\r
+ Zero,\r
+ One,\r
+ One,\r
+ 0x3,\r
+ Zero\r
+ },\r
+ Package(0x8)\r
+ {\r
+ "PMIC_TEMP2",\r
+ 0xc,\r
+ One,\r
+ Zero,\r
+ 0x3,\r
+ 0x2,\r
+ 0x2,\r
+ FGDT\r
+ },\r
+ Package(0x8)\r
+ {\r
+ "CHG_TEMP",\r
+ 0xd,\r
+ One,\r
+ Zero,\r
+ 0x3,\r
+ 0x2,\r
+ 0x2,\r
+ FGCT\r
+ },\r
+ Package(0x8)\r
+ {\r
+ "USB_IN",\r
+ 0x8,\r
+ One,\r
+ Zero,\r
+ One,\r
+ 0x8,\r
+ Zero,\r
+ Zero\r
+ },\r
+ Package(0x8)\r
+ {\r
+ "USB_IN_I",\r
+ 0x9,\r
+ One,\r
+ Zero,\r
+ One,\r
+ One,\r
+ 0x4,\r
+ Zero\r
+ },\r
+ Package(0x8)\r
+ {\r
+ "DC_IN",\r
+ 0xa,\r
+ One,\r
+ Zero,\r
+ One,\r
+ 0x8,\r
+ Zero,\r
+ Zero\r
+ },\r
+ Package(0x8)\r
+ {\r
+ "DC_IN_I",\r
+ 0xb,\r
+ One,\r
+ Zero,\r
+ One,\r
+ One,\r
+ 0x4,\r
+ Zero\r
+ },\r
+ Package(0x8)\r
+ {\r
+ "FG_GPIO",\r
+ 0xe,\r
+ Zero,\r
+ Zero,\r
+ One,\r
+ 0x2,\r
+ Zero,\r
+ Zero\r
+ }\r
+ })\r
+ }\r
+ Method(FGDT, 0x0, NotSerialized)\r
+ {\r
+ Return(Package(0x2)\r
+ {\r
+ Package(0x2)\r
+ {\r
+ 0x1c2,\r
+ 0xffff3cb0\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0x366,\r
+ 0x27100\r
+ }\r
+ })\r
+ }\r
+ Method(FGCT, 0x0, NotSerialized)\r
+ {\r
+ Return(Package(0x2)\r
+ {\r
+ Package(0x2)\r
+ {\r
+ 0x633,\r
+ 0xffff3cb0\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0x318,\r
+ 0x27100\r
+ }\r
+ })\r
+ }\r
+ }\r
+ Scope(ADC1)\r
+ {\r
+ Method(CHAN, 0x0, NotSerialized)\r
+ {\r
+ Return(Package(0xc)\r
+ {\r
+ Package(0xd)\r
+ {\r
+ "VPH_PWR",\r
+ 0x83,\r
+ Zero,\r
+ Zero,\r
+ 0x2,\r
+ 0x2,\r
+ One,\r
+ 0x3,\r
+ Zero,\r
+ Zero,\r
+ Zero,\r
+ Zero,\r
+ Zero\r
+ },\r
+ Package(0xd)\r
+ {\r
+ "VCOIN",\r
+ 0x85,\r
+ Zero,\r
+ Zero,\r
+ 0x2,\r
+ 0x2,\r
+ One,\r
+ 0x3,\r
+ Zero,\r
+ Zero,\r
+ Zero,\r
+ Zero,\r
+ Zero\r
+ },\r
+ Package(0xd)\r
+ {\r
+ "PMIC_THERM",\r
+ 0x6,\r
+ Zero,\r
+ Zero,\r
+ 0x2,\r
+ 0x2,\r
+ One,\r
+ One,\r
+ Zero,\r
+ Zero,\r
+ Zero,\r
+ 0x2\r
+ },\r
+ Package(0xd)\r
+ {\r
+ "XO_THERM",\r
+ 0x4c,\r
+ 0x8,\r
+ Zero,\r
+ 0x2,\r
+ One,\r
+ One,\r
+ One,\r
+ 0x2,\r
+ 0x186a0,\r
+ XTTB,\r
+ Zero,\r
+ Zero\r
+ },\r
+ Package(0xd)\r
+ {\r
+ "XO_THERM_GPS",\r
+ 0x4c,\r
+ 0x8,\r
+ 0x2,\r
+ 0x2,\r
+ One,\r
+ One,\r
+ One,\r
+ 0x2,\r
+ 0x186a0,\r
+ XTTB,\r
+ Zero,\r
+ Zero\r
+ },\r
+ Package(0xd)\r
+ {\r
+ "SYS_THERM1",\r
+ 0x4d,\r
+ One,\r
+ Zero,\r
+ 0x2,\r
+ One,\r
+ One,\r
+ One,\r
+ 0x2,\r
+ 0x186a0,\r
+ SYTB,\r
+ Zero,\r
+ Zero\r
+ },\r
+ Package(0xd)\r
+ {\r
+ "SYS_THERM2",\r
+ 0x50,\r
+ One,\r
+ Zero,\r
+ 0x2,\r
+ One,\r
+ One,\r
+ One,\r
+ 0x2,\r
+ 0x186a0,\r
+ SYTB,\r
+ Zero,\r
+ Zero\r
+ },\r
+ Package(0xd)\r
+ {\r
+ "PA_THERM",\r
+ 0x52,\r
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+ },\r
+ Package(0x2)\r
+ {\r
+ 0xcf5,\r
+ 0x1d000\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0xc95,\r
+ 0x1d400\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0xc39,\r
+ 0x1d800\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0xbdf,\r
+ 0x1dc00\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0xb88,\r
+ 0x1e000\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0xb34,\r
+ 0x1e400\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0xae3,\r
+ 0x1e800\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0xa95,\r
+ 0x1ec00\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0xa49,\r
+ 0x1f000\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0xa00,\r
+ 0x1f400\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0x9b9,\r
+ 0x1f800\r
+ },\r
+ Package(0x2)\r
+ {\r
+ 0x974,\r
+ 0x1fc00\r
+ }\r
+ })\r
+ }\r
+ Method(VTCH, 0x0, NotSerialized)\r
+ {\r
+ Return(Package(0x8)\r
+ {\r
+ Package(0x10)\r
+ {\r
+ "VPH_PWR",\r
+ 0x83,\r
+ Zero,\r
+ One,\r
+ Zero,\r
+ 0x2,\r
+ One,\r
+ 0x3,\r
+ Zero,\r
+ Zero,\r
+ Zero,\r
+ Zero,\r
+ Zero,\r
+ Zero,\r
+ Zero,\r
+ 0x15f9\r
+ },\r
+ Package(0x10)\r
+ {\r
+ "PMIC_THERM",\r
+ 0x6,\r
+ Zero,\r
+ Zero,\r
+ Zero,\r
+ 0x2,\r
+ One,\r
+ One,\r
+ Zero,\r
+ Zero,\r
+ Zero,\r
+ 0x2,\r
+ 0xffff3cb0,\r
+ 0x249f0\r
+ },\r
+ Package(0x10)\r
+ {\r
+ "SYS_THERM1",\r
+ 0x4d,\r
+ One,\r
+ Zero,\r
+ Zero,\r
+ One,\r
+ One,\r
+ One,\r
+ 0x2,\r
+ 0x186a0,\r
+ SYTB,\r
+ Zero,\r
+ Zero,\r
+ Zero,\r
+ 0xffffffd8,\r
+ 0x7d\r
+ },\r
+ Package(0x10)\r
+ {\r
+ "SYS_THERM2",\r
+ 0x50,\r
+ One,\r
+ Zero,\r
+ Zero,\r
+ One,\r
+ One,\r
+ One,\r
+ 0x2,\r
+ 0x186a0,\r
+ SYTB,\r
+ Zero,\r
+ Zero,\r
+ Zero,\r
+ 0xffffffd8,\r
+ 0x7d\r
+ },\r
+ Package(0x10)\r
+ {\r
+ "PA_THERM",\r
+ 0x52,\r
+ One,\r
+ Zero,\r
+ Zero,\r
+ One,\r
+ One,\r
+ One,\r
+ 0x2,\r
+ 0x186a0,\r
+ SYTB,\r
+ Zero,\r
+ Zero,\r
+ Zero,\r
+ 0xffffffd8,\r
+ 0x7d\r
+ },\r
+ Package(0x10)\r
+ {\r
+ "PA_THERM1",\r
+ 0x56,\r
+ One,\r
+ Zero,\r
+ Zero,\r
+ One,\r
+ One,\r
+ One,\r
+ 0x2,\r
+ 0x186a0,\r
+ SYTB,\r
+ Zero,\r
+ Zero,\r
+ Zero,\r
+ 0xffffffd8,\r
+ 0x7d\r
+ },\r
+ Package(0x10)\r
+ {\r
+ "SYS_THERM3",\r
+ 0x55,\r
+ One,\r
+ Zero,\r
+ Zero,\r
+ One,\r
+ One,\r
+ One,\r
+ 0x2,\r
+ 0x186a0,\r
+ SYTB,\r
+ Zero,\r
+ Zero,\r
+ Zero,\r
+ 0xffffffd8,\r
+ 0x7d\r
+ },\r
+ Package(0x10)\r
+ {\r
+ "BAT_THERM",\r
+ 0x57,\r
+ One,\r
+ Zero,\r
+ Zero,\r
+ One,\r
+ One,\r
+ One,\r
+ 0x2,\r
+ 0x186a0,\r
+ SYTB,\r
+ Zero,\r
+ Zero,\r
+ Zero,\r
+ 0xffffffd8,\r
+ 0x7d\r
+ }\r
+ })\r
+ }\r
+ Method(VTMT, 0x0, NotSerialized)\r
+ {\r
+ Return(Package(0x3)\r
+ {\r
+ 0xb,\r
+ One,\r
+ 0x5\r
+ })\r
+ }\r
+ }\r
+#endif\r
+ }\r
+\r
+\r
+ Name (WAKP, Package (0x02)\r
+ {\r
+ Zero, \r
+ Zero\r
+ })\r
+ Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep\r
+ {\r
+ \_SB.ADBG (Concatenate ("_PTS:ARG0:", ToHexString (Arg0)))\r
+ \_SB.LED1.LEDR = Zero\r
+ \_SB.LID0.LIDB = One\r
+ \_SB.ADBG ("PLID1")\r
+ \_SB.ADBG (Concatenate ("_PTS:LEDR:", ToHexString (\_SB.LED1.LEDR)))\r
+ If (Arg0){}\r
+ }\r
+\r
+ Method (_WAK, 1, NotSerialized) // _WAK: Wake\r
+ {\r
+ \_SB.ADBG (Concatenate ("_WAK:ARG0:", ToHexString (Arg0)))\r
+ \_SB.LED1.LEDR = 0x04\r
+ \_SB.ADBG (Concatenate ("_WAK:LEDR:", ToHexString (\_SB.LED1.LEDR)))\r
+ Return (WAKP) /* \WAKP */\r
+ }\r
+}
\ No newline at end of file
é¡¹ç® / edk2-sdm845.git / commitdiff